Searched refs:ExtReg (Results 1 – 6 of 6) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86CallLowering.cpp | 130 unsigned ExtReg; in assignValueToReg() local 144 ExtReg = MIB->getOperand(0).getReg(); in assignValueToReg() 146 ExtReg = extendRegister(ValVReg, VA); in assignValueToReg() 148 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg() 153 unsigned ExtReg = extendRegister(ValVReg, VA); in assignValueToAddress() local 157 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMCallLowering.cpp | 122 unsigned ExtReg = extendRegister(ValVReg, VA); in assignValueToReg() local 123 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg() 132 unsigned ExtReg = extendRegister(ValVReg, VA); in assignValueToAddress() local 136 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64CallLowering.cpp | 152 unsigned ExtReg = extendRegister(ValVReg, VA); in assignValueToReg() local 153 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 884 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp() local 885 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp() 887 SrcReg1 = ExtReg; in PPCEmitCmp() 890 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp() local 891 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp() 893 SrcReg2 = ExtReg; in PPCEmitCmp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 933 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp() local 934 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp() 936 SrcReg1 = ExtReg; in PPCEmitCmp() 939 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp() local 940 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp() 942 SrcReg2 = ExtReg; in PPCEmitCmp()
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D | PPCISelLowering.cpp | 9762 unsigned ExtReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); in EmitAtomicBinary() local 9764 ExtReg).addReg(dest); in EmitAtomicBinary() 9766 .addReg(incr).addReg(ExtReg); in EmitAtomicBinary()
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