| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 31 createRegisterBank(AArch64::GPRRegBankID, "GPR"); in AArch64RegisterBankInfo()
34 addRegBankCoverage(AArch64::GPRRegBankID, AArch64::GPR64allRegClassID, TRI); in AArch64RegisterBankInfo()
35 const RegisterBank &RBGPR = getRegBank(AArch64::GPRRegBankID); in AArch64RegisterBankInfo()
108 return getRegBank(AArch64::GPRRegBankID); in getRegBankFromRegClass()
141 getRegBank(AArch64::GPRRegBankID)); in getInstrAlternativeMappings()
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| D | AArch64RegisterBankInfo.h | 25 GPRRegBankID = 0, /// General Purpose Registers: W, X. enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 128 assert((RegBank->getID() == ARM::GPRRegBankID || in guessRegClass()
183 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectMergeValues()
188 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectMergeValues()
209 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectUnmergeValues()
214 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectUnmergeValues()
254 if (RegBank == ARM::GPRRegBankID) { in selectLoadStoreOpCode()
422 if (!validReg(MRI, ResReg, 1, ARM::GPRRegBankID)) in selectCmp()
627 assert(validReg(MRI, CondReg, 1, ARM::GPRRegBankID) && in selectSelect()
641 assert(validOpRegPair(MRI, ResReg, TrueReg, 32, ARM::GPRRegBankID) && in selectSelect()
642 validOpRegPair(MRI, TrueReg, FalseReg, 32, ARM::GPRRegBankID) && in selectSelect()
[all …]
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| D | ARMRegisterBankInfo.cpp | 58 checkPartMapping(PartMappings[PMI_GPR - PMI_Min], 0, 32, GPRRegBankID) && in checkPartialMappings()
145 const RegisterBank &RBGPR = getRegBank(ARM::GPRRegBankID); in ARMRegisterBankInfo()
185 return getRegBank(ARM::GPRRegBankID); in getRegBankFromRegClass()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 52 const RegisterBank &RBGPR = getRegBank(AArch64::GPRRegBankID); in AArch64RegisterBankInfo()
255 return getRegBank(AArch64::GPRRegBankID); in getRegBankFromRegClass()
308 getCopyMapping(AArch64::GPRRegBankID, AArch64::GPRRegBankID, Size), in getInstrAlternativeMappings()
317 getCopyMapping(AArch64::FPRRegBankID, AArch64::GPRRegBankID, Size), in getInstrAlternativeMappings()
322 getCopyMapping(AArch64::GPRRegBankID, AArch64::FPRRegBankID, Size), in getInstrAlternativeMappings()
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| D | AArch64InstructionSelector.cpp | 145 if (RB.getID() == AArch64::GPRRegBankID) { in getRegClassForTypeOnBank()
225 case AArch64::GPRRegBankID: in selectBinaryOp()
297 case AArch64::GPRRegBankID: in selectLoadStoreUIOp()
606 if (RB.getID() != AArch64::GPRRegBankID) in selectCompareBranch()
841 if (RB.getID() != AArch64::GPRRegBankID) { in select()
1023 assert(PtrRB.getID() == AArch64::GPRRegBankID && in select()
1086 if (RB.getID() != AArch64::GPRRegBankID) { in select()
1164 if (DstRB.getID() == AArch64::GPRRegBankID) { in select()
1214 if (RBDst.getID() != AArch64::GPRRegBankID) { in select()
1221 if (RBSrc.getID() != AArch64::GPRRegBankID) { in select()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterBank.inc | 15 GPRRegBankID,
81 RegisterBank GPRRegBank(/* ID */ ARM::GPRRegBankID, /* Name */ "GPRB", /* Size */ 32, /* CoveredReg…
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 170 if (RB.getID() == X86::GPRRegBankID) { in getRegClass()
244 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
245 DstRegBank.getID() == X86::GPRRegBankID) { in selectCopy()
280 if (SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
281 DstRegBank.getID() == X86::GPRRegBankID && SrcSize > DstSize && in selectCopy()
401 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
404 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
407 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
415 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
623 if (RBI.getRegBank(DefReg, MRI, TRI)->getID() != X86::GPRRegBankID) in selectConstant()
[all …]
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| D | X86RegisterBankInfo.cpp | 33 const RegisterBank &RBGPR = getRegBank(X86::GPRRegBankID); in X86RegisterBankInfo()
51 return getRegBank(X86::GPRRegBankID); in getRegBankFromRegClass()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterBank.inc | 16 GPRRegBankID,
113 RegisterBank GPRRegBank(/* ID */ AArch64::GPRRegBankID, /* Name */ "GPR", /* Size */ 64, /* Covered…
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterBank.inc | 14 GPRRegBankID,
108 RegisterBank GPRRegBank(/* ID */ X86::GPRRegBankID, /* Name */ "GPR", /* Size */ 64, /* CoveredRegC…
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