| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 71 ISH = 11, enumerator
85 case ISH: return "ish"; in MemBOptToString()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 134 ISH = 11, enumerator
148 case ISH: return "ish"; in MemBOptToString()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 125 ISH = 11, enumerator
138 case ISH: return "ish"; in MemBOptToString()
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | invalid-DSB-arm.txt | 9 # Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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| D | invalid-DMB-thumb.txt | 9 # Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 363 __ dmb(ISH); \
368 __ dmb(ISH); \
371 __ dmb(ISH); \
378 __ dmb(ISH); \
384 __ dmb(ISH); \
392 __ dmb(ISH); \
401 __ dmb(ISH); \
408 __ dmb(ISH); \
416 __ dmb(ISH); \
423 __ dmb(ISH); \
[all …]
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 523 case ISH: in GetName()
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| D | instructions-aarch32.h | 1246 ISH = 0xb, enumerator
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| /external/v8/src/arm/ |
| D | constants-arm.h | 211 ISH = 0xb, enumerator
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| /external/llvm/lib/Target/ARM/ |
| D | ARM.td | 131 // than ISH
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| D | ARMISelLowering.cpp | 3015 ARM_MB::MemBOpt Domain = ARM_MB::ISH; in LowerATOMIC_FENCE()
12375 return makeDMB(Builder, ARM_MB::ISH); in emitLeadingFence()
12393 return makeDMB(Builder, ARM_MB::ISH); in emitTrailingFence()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARM.td | 177 // than ISH
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| D | ARMISelLowering.cpp | 3448 ARM_MB::MemBOpt Domain = ARM_MB::ISH; in LowerATOMIC_FENCE()
14358 return makeDMB(Builder, ARM_MB::ISH); in emitLeadingFence()
14376 return makeDMB(Builder, ARM_MB::ISH); in emitTrailingFence()
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| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 3784 COMPARE_BOTH(Dmb(ISH), "dmb ish\n"); in TEST()
3794 COMPARE_BOTH(Dsb(ISH), "dsb ish\n"); in TEST()
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| D | test-assembler-aarch32.cc | 4390 __ Dmb(ISH); in TEST()
4400 __ Dsb(ISH); in TEST()
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| /external/skia/src/compute/skc/platforms/cl_12/kernels/ |
| D | rasterize.cl | 1397 // SIMD APPROACH 1: SIMT'ISH
1416 // SIMD APPROACH 2: SCALAR'ISH
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 2277 .Case("sh", ARM_MB::ISH) in parseMemBarrierOptOperand()
2278 .Case("ish", ARM_MB::ISH) in parseMemBarrierOptOperand()
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| /external/skqp/src/compute/skc/platforms/cl_12/kernels/ |
| D | rasterize.cl | 1397 // SIMD APPROACH 1: SIMT'ISH
1416 // SIMD APPROACH 2: SCALAR'ISH
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 1118 { "ISH", 8 },
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 3897 .Case("sh", ARM_MB::ISH) in parseMemBarrierOptOperand()
3898 .Case("ish", ARM_MB::ISH) in parseMemBarrierOptOperand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4181 .Case("sh", ARM_MB::ISH) in parseMemBarrierOptOperand()
4182 .Case("ish", ARM_MB::ISH) in parseMemBarrierOptOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2297 DMBOpt = isOnlyStoreBarrier ? ARM_MB::ISHST : ARM_MB::ISH; in LowerMEMBARRIER()
2318 DAG.getConstant(ARM_MB::ISH, MVT::i32)); in LowerATOMIC_FENCE()
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| /external/syzkaller/dashboard/config/ |
| D | upstream-kmsan.config | 3828 # Intel ISH HID support
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| D | upstream-kasan.config | 3879 # Intel ISH HID support
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| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | ApproximateWidth.txt | 1261 120D3..120D7; 3; # CUNEIFORM SIGN GA2 TIMES HAL PLUS LA..CUNEIFORM SIGN GA2 TIMES ISH PLUS HU PLUS …
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