Searched refs:Is128Bit (Results 1 – 13 of 13) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86SpeculativeLoadHardening.cpp | 1772 bool Is128Bit = OpRC->hasSuperClassEq(&X86::VR128RegClass); in hardenLoadAddr() local
1788 TII->get(Is128Bit ? X86::VPBROADCASTQrr in hardenLoadAddr()
1800 TII->get(Is128Bit ? X86::VPORrr : X86::VPORYrr), TmpReg) in hardenLoadAddr()
1810 bool Is128Bit = OpRC->hasSuperClassEq(&X86::VR128XRegClass); in hardenLoadAddr() local
1812 if (Is128Bit || Is256Bit) in hardenLoadAddr()
1818 Is128Bit ? X86::VPBROADCASTQrZ128r in hardenLoadAddr()
1829 unsigned OrOp = Is128Bit ? X86::VPORQZ128rr in hardenLoadAddr()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 35 Is128Bit = (1 << 4), enumerator
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| D | SystemZInstrFP.td | 128 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
144 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
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| D | SystemZInstrInfo.cpp | 1299 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset); in getOpcodeForOffset()
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| D | SystemZInstrInfo.td | 500 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
537 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
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| D | SystemZInstrFormats.td | 59 bit Is128Bit = 0;
88 let TSFlags{4} = Is128Bit;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 41 Is128Bit = (1 << 4), enumerator
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| D | SystemZInstrFP.td | 148 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
164 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
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| D | SystemZInstrInfo.cpp | 1612 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset); in getOpcodeForOffset()
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| D | SystemZInstrInfo.td | 412 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
456 let Has20BitOffset = 1, HasIndex = 1, Is128Bit = 1 in {
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| D | SystemZInstrFormats.td | 63 bit Is128Bit = 0;
92 let TSFlags{4} = Is128Bit;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1256 bool Is128Bit = VT.getSizeInBits() == 128; in SelectStore() local
1258 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectStore()
1279 bool Is128Bit = VT.getSizeInBits() == 128; in SelectPostStore() local
1281 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectPostStore()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1193 bool Is128Bit = VT.getSizeInBits() == 128; in SelectStore() local
1195 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectStore()
1211 bool Is128Bit = VT.getSizeInBits() == 128; in SelectPostStore() local
1213 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectPostStore()
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