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Searched refs:LARGE (Results 1 – 25 of 98) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/XCore/
Dcodemodel.ll9 ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
20 ; LARGE-LABEL: test:
21 ; LARGE: zext r0, 1
22 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
23 ; LARGE: mov r1, r11
24 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
25 ; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]]
26 ; LARGE: mov r11, r1
27 ; LARGE: [[JUMP]]
28 ; LARGE: ldw r0, r11[0]
[all …]
/external/llvm/test/CodeGen/XCore/
Dcodemodel.ll9 ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
20 ; LARGE-LABEL: test:
21 ; LARGE: zext r0, 1
22 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
23 ; LARGE: mov r1, r11
24 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
25 ; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]]
26 ; LARGE: mov r11, r1
27 ; LARGE: [[JUMP]]
28 ; LARGE: ldw r0, r11[0]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dcode-model-elf.ll7 …ion-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC
10 …cation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC
52 ; LARGE-STATIC-LABEL: lea_static_data:
53 ; LARGE-STATIC: # %bb.0:
54 ; LARGE-STATIC-NEXT: movabsq $static_data, %rax
55 ; LARGE-STATIC-NEXT: retq
69 ; LARGE-PIC-LABEL: lea_static_data:
70 ; LARGE-PIC: # %bb.0:
71 ; LARGE-PIC-NEXT: .Ltmp0:
72 ; LARGE-PIC-NEXT: leaq .Ltmp0(%rip), %rcx
[all …]
Dfast-isel-constpool.ll3 … -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
17 ; LARGE-LABEL: constpool_float:
18 ; LARGE: ## %bb.0:
19 ; LARGE-NEXT: movabsq $LCPI0_0, %rax
20 ; LARGE-NEXT: addss (%rax), %xmm0
21 ; LARGE-NEXT: retq
46 ; LARGE-LABEL: constpool_double:
47 ; LARGE: ## %bb.0:
48 ; LARGE-NEXT: movabsq $LCPI1_0, %rax
49 ; LARGE-NEXT: addsd (%rax), %xmm0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dfast-isel-runtime-libcall.ll2 …-fast-isel-abort=1 -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
7 ; LARGE-LABEL: frem_f32
8 ; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE
9 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}}
10 ; LARGE-NEXT: blr [[REG]]
18 ; LARGE-LABEL: frem_f64
19 ; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE
20 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}}
21 ; LARGE-NEXT: blr [[REG]]
29 ; LARGE-LABEL: sin_f32
[all …]
Dliteral_pools_float.ll2 …le=aarch64-none-linux-gnu -code-model=large -mcpu=cyclone | FileCheck --check-prefix=CHECK-LARGE %s
4 …64-none-linux-gnu -code-model=large -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP-LARGE %s
18 ; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g0_nc:[[CURLIT:.LCPI[0-9]+_[0-9]+]]
19 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
20 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
21 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g3:[[CURLIT]]
22 ; CHECK-LARGE: ldr {{s[0-9]+}}, [x[[LITADDR]]]
23 ; CHECK-LARGE: fadd
24 ; CHECK-NOFP-LARGE-NOT: ldr {{s[0-9]+}},
25 ; CHECK-NOFP-LARGE-NOT: fadd
[all …]
Dfpimm.ll2 …el=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
3 …=large -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
40 ; LARGE-LABEL: check_float2
41 ; LARGE: mov [[REG:w[0-9]+]], #4059
42 ; LARGE-NEXT: movk [[REG]], #16457, lsl #16
43 ; LARGE-NEXT: fmov s0, [[REG]]
48 ; LARGE-LABEL: check_double2
49 ; LARGE: mov [[REG:x[0-9]+]], #11544
50 ; LARGE-NEXT: movk [[REG]], #21572, lsl #16
51 ; LARGE-NEXT: movk [[REG]], #8699, lsl #32
[all …]
Dextern-weak.ll3 …-mtriple=aarch64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s
19 ; CHECK-LARGE: movz x0, #:abs_g0_nc:var
20 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var
21 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var
22 ; CHECK-LARGE: movk x0, #:abs_g3:var
40 ; CHECK-LARGE: movz [[ADDR:x[0-9]+]], #:abs_g0_nc:arr_var
41 ; CHECK-LARGE: movk [[ADDR]], #:abs_g1_nc:arr_var
42 ; CHECK-LARGE: movk [[ADDR]], #:abs_g2_nc:arr_var
43 ; CHECK-LARGE: movk [[ADDR]], #:abs_g3:arr_var
54 ; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
[all …]
Darm64-extern-weak.ll3 …-mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s
18 ; CHECK-LARGE: movz x0, #:abs_g0_nc:var
19 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var
20 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var
21 ; CHECK-LARGE: movk x0, #:abs_g3:var
36 ; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g0_nc:arr_var
37 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g1_nc:arr_var
38 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g2_nc:arr_var
39 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g3:arr_var
49 ; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
[all …]
/external/llvm/test/CodeGen/AArch64/
Dfast-isel-runtime-libcall.ll2 …-fast-isel-abort=1 -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
7 ; LARGE-LABEL: frem_f32
8 ; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE
9 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}}
10 ; LARGE-NEXT: blr [[REG]]
18 ; LARGE-LABEL: frem_f64
19 ; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE
20 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}}
21 ; LARGE-NEXT: blr [[REG]]
29 ; LARGE-LABEL: sin_f32
[all …]
Dliteral_pools_float.ll2 …le=aarch64-none-linux-gnu -code-model=large -mcpu=cyclone | FileCheck --check-prefix=CHECK-LARGE %s
4 …64-none-linux-gnu -code-model=large -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP-LARGE %s
18 ; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI[0-9]+_[0-9]+]]
19 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
20 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
21 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]]
22 ; CHECK-LARGE: ldr {{s[0-9]+}}, [x[[LITADDR]]]
23 ; CHECK-LARGE: fadd
24 ; CHECK-NOFP-LARGE-NOT: ldr {{s[0-9]+}},
25 ; CHECK-NOFP-LARGE-NOT: fadd
[all …]
Dfpimm.ll2 …el=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
3 …=large -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
40 ; LARGE-LABEL: check_float2
41 ; LARGE: mov [[REG:w[0-9]+]], #1078525952
42 ; LARGE-NEXT: movk [[REG]], #4059
43 ; LARGE-NEXT: fmov s0, [[REG]]
48 ; LARGE-LABEL: check_double2
49 ; LARGE: mov [[REG:x[0-9]+]], #4614219293217783808
50 ; LARGE-NEXT: movk [[REG]], #8699, lsl #32
51 ; LARGE-NEXT: movk [[REG]], #21572, lsl #16
[all …]
Darm64-extern-weak.ll3 …-mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s
18 ; CHECK-LARGE: movz x0, #:abs_g3:var
19 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var
20 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var
21 ; CHECK-LARGE: movk x0, #:abs_g0_nc:var
36 ; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g3:arr_var
37 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g2_nc:arr_var
38 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g1_nc:arr_var
39 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g0_nc:arr_var
49 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
[all …]
Dextern-weak.ll3 …-mtriple=aarch64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s
19 ; CHECK-LARGE: movz x0, #:abs_g3:var
20 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var
21 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var
22 ; CHECK-LARGE: movk x0, #:abs_g0_nc:var
40 ; CHECK-LARGE: movz [[ADDR:x[0-9]+]], #:abs_g3:arr_var
41 ; CHECK-LARGE: movk [[ADDR]], #:abs_g2_nc:arr_var
42 ; CHECK-LARGE: movk [[ADDR]], #:abs_g1_nc:arr_var
43 ; CHECK-LARGE: movk [[ADDR]], #:abs_g0_nc:arr_var
54 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
[all …]
Dblockaddress.ll2 …gnu -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-LARGE %s
17 ; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g3:[[DEST_LBL:.Ltmp[0-9]+]]
18 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g2_nc:[[DEST_LBL]]
19 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g1_nc:[[DEST_LBL]]
20 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g0_nc:[[DEST_LBL]]
21 ; CHECK-LARGE: str [[ADDR_REG]],
22 ; CHECK-LARGE: ldr [[NEWDEST:x[0-9]+]]
23 ; CHECK-LARGE: br [[NEWDEST]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc32-pic-large.ll1 … %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s
2 …own-linux-gnu -mattr=+secure-plt -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s
16 ; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]:
17 ; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]]
18 ; LARGE-BSS-NEXT: foo:
19 ; LARGE-BSS: stwu 1, -32(1)
20 ; LARGE-BSS: stw 30, 24(1)
21 ; LARGE-BSS: bl [[PB]]
22 ; LARGE-BSS-NEXT: [[PB]]:
23 ; LARGE-BSS: mflr 30
[all …]
Dmcm-4.ll6 ; RUN: -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s
8 ; RUN: -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s
12 ; RUN: -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-P9 %s
39 ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
40 ; LARGE: .quad 4562098671269285104
41 ; LARGE-LABEL: test_double_const:
42 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
43 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
44 ; LARGE: lfd {{[0-9]+}}, 0([[REG2]])
46 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
[all …]
Dmcm-3.ll2 …tatic -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
31 ; LARGE-LABEL: test_file_static:
32 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
33 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
34 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
35 ; LARGE: stw {{[0-9]+}}, 0([[REG2]])
36 ; LARGE: [[VAR]]:
37 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
38 ; LARGE: .type [[VAR2]],@object
39 ; LARGE: .data
[all …]
Dmcm-2.ll2 …: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
28 ; LARGE-LABEL: test_fn_static:
29 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
30 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
31 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
32 ; LARGE: stw {{[0-9]+}}, 0([[REG2]])
33 ; LARGE: [[VAR]]:
34 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
35 ; LARGE: .type [[VAR2]],@object
36 ; LARGE: .lcomm [[VAR2]],4,4
Dmcm-5.ll2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=large <%s | FileCheck -check-prefix=LARGE …
66 ; LARGE-LABEL: test_jump_table:
67 ; LARGE: bl .L0$pb
68 ; LARGE-NEXT: .L0$pb:
69 ; LARGE: mflr [[REGBASE:[0-9]+]]
71 ; LARGE: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
72 ; LARGE: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
73 ; LARGE: lwax [[REG3:[0-9]+]], {{[0-9]+}}, [[REG2]]
74 ; LARGE-NEXT: add [[REG4:[0-9]+]], [[REG3]], [[REGBASE]]
75 ; LARGE-NEXT: mtctr [[REG4]]
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dppc32-pic-large.ll1 … %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s
15 ; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]:
16 ; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]]
17 ; LARGE-BSS-NEXT: foo:
18 ; LARGE-BSS: stw 30, -8(1)
19 ; LARGE-BSS: bl [[PB]]
20 ; LARGE-BSS-NEXT: [[PB]]:
21 ; LARGE-BSS: mflr 30
22 ; LARGE-BSS: lwz [[REG:[0-9]+]], [[POFF]]-[[PB]](30)
23 ; LARGE-BSS-NEXT: add 30, [[REG]], 30
[all …]
Dmcm-3.ll2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
31 ; LARGE-LABEL: test_file_static:
32 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
33 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
34 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
35 ; LARGE: stw {{[0-9]+}}, 0([[REG2]])
36 ; LARGE: [[VAR]]:
37 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
38 ; LARGE: .type [[VAR2]],@object
39 ; LARGE: .data
[all …]
Dmcm-4.ll3 …mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s
4 …=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s
31 ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
32 ; LARGE: .quad 4562098671269285104
33 ; LARGE-LABEL: test_double_const:
34 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
35 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
36 ; LARGE: lfd {{[0-9]+}}, 0([[REG2]])
38 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
39 ; LARGE-VSX: .quad 4562098671269285104
[all …]
Dmcm-2.ll2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
28 ; LARGE-LABEL: test_fn_static:
29 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
30 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
31 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
32 ; LARGE: stw {{[0-9]+}}, 0([[REG2]])
33 ; LARGE: [[VAR]]:
34 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
35 ; LARGE: .type [[VAR2]],@object
36 ; LARGE: .lcomm [[VAR2]],4,4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/
Dselect-blockaddress.mir3 …machineinstrs -run-pass=instruction-select -code-model=large %s | FileCheck %s --check-prefix=LARGE
40 ; LARGE-LABEL: name: test_blockaddress
41 ; LARGE: bb.0 (%ir-block.0):
42 ; LARGE: successors: %bb.1(0x80000000)
43 …; LARGE: [[MOVZXi:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) blockaddress(@te…
44 …; LARGE: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi]], target-flags(aarch64-g1, aarch64-nc) bloc…
45 …; LARGE: [[MOVKXi1:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi]], target-flags(aarch64-g2, aarch64-nc) blo…
46 …; LARGE: [[MOVKXi2:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi1]], target-flags(aarch64-g3) blockaddress(@…
47 ; LARGE: [[MOVZXi1:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) @addr, 0
48 …; LARGE: [[MOVKXi3:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi1]], target-flags(aarch64-g1, aarch64-nc) @a…
[all …]

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