1; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -code-model=small -verify-machineinstrs < %s | FileCheck %s --check-prefix=SMALL
2; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE
3
4define float @frem_f32(float %a, float %b) {
5; SMALL-LABEL: frem_f32
6; SMALL:       bl _fmodf
7; LARGE-LABEL: frem_f32
8; LARGE:       adrp  [[REG:x[0-9]+]], _fmodf@GOTPAGE
9; LARGE:       ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}}
10; LARGE-NEXT:  blr [[REG]]
11  %1 = frem float %a, %b
12  ret float %1
13}
14
15define double @frem_f64(double %a, double %b) {
16; SMALL-LABEL: frem_f64
17; SMALL:       bl _fmod
18; LARGE-LABEL: frem_f64
19; LARGE:       adrp  [[REG:x[0-9]+]], _fmod@GOTPAGE
20; LARGE:       ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}}
21; LARGE-NEXT:  blr [[REG]]
22  %1 = frem double %a, %b
23  ret double %1
24}
25
26define float @sin_f32(float %a) {
27; SMALL-LABEL: sin_f32
28; SMALL:       bl _sinf
29; LARGE-LABEL: sin_f32
30; LARGE:       adrp  [[REG:x[0-9]+]], _sinf@GOTPAGE
31; LARGE:       ldr [[REG]], {{\[}}[[REG]], _sinf@GOTPAGEOFF{{\]}}
32; LARGE-NEXT:  blr [[REG]]
33  %1 = call float @llvm.sin.f32(float %a)
34  ret float %1
35}
36
37define double @sin_f64(double %a) {
38; SMALL-LABEL: sin_f64
39; SMALL:       bl _sin
40; LARGE-LABEL: sin_f64
41; LARGE:       adrp  [[REG:x[0-9]+]], _sin@GOTPAGE
42; LARGE:       ldr [[REG]], {{\[}}[[REG]], _sin@GOTPAGEOFF{{\]}}
43; LARGE-NEXT:  blr [[REG]]
44  %1 = call double @llvm.sin.f64(double %a)
45  ret double %1
46}
47
48define float @cos_f32(float %a) {
49; SMALL-LABEL: cos_f32
50; SMALL:       bl _cosf
51; LARGE-LABEL: cos_f32
52; LARGE:       adrp  [[REG:x[0-9]+]], _cosf@GOTPAGE
53; LARGE:       ldr [[REG]], {{\[}}[[REG]], _cosf@GOTPAGEOFF{{\]}}
54; LARGE-NEXT:  blr [[REG]]
55  %1 = call float @llvm.cos.f32(float %a)
56  ret float %1
57}
58
59define double @cos_f64(double %a) {
60; SMALL-LABEL: cos_f64
61; SMALL:       bl _cos
62; LARGE-LABEL: cos_f64
63; LARGE:       adrp  [[REG:x[0-9]+]], _cos@GOTPAGE
64; LARGE:       ldr [[REG]], {{\[}}[[REG]], _cos@GOTPAGEOFF{{\]}}
65; LARGE-NEXT:  blr [[REG]]
66  %1 = call double @llvm.cos.f64(double %a)
67  ret double %1
68}
69
70define float @pow_f32(float %a, float %b) {
71; SMALL-LABEL: pow_f32
72; SMALL:       bl _powf
73; LARGE-LABEL: pow_f32
74; LARGE:       adrp  [[REG:x[0-9]+]], _powf@GOTPAGE
75; LARGE:       ldr [[REG]], {{\[}}[[REG]], _powf@GOTPAGEOFF{{\]}}
76; LARGE-NEXT:  blr [[REG]]
77  %1 = call float @llvm.pow.f32(float %a, float %b)
78  ret float %1
79}
80
81define double @pow_f64(double %a, double %b) {
82; SMALL-LABEL: pow_f64
83; SMALL:       bl _pow
84; LARGE-LABEL: pow_f64
85; LARGE:       adrp  [[REG:x[0-9]+]], _pow@GOTPAGE
86; LARGE:       ldr [[REG]], {{\[}}[[REG]], _pow@GOTPAGEOFF{{\]}}
87; LARGE-NEXT:  blr [[REG]]
88  %1 = call double @llvm.pow.f64(double %a, double %b)
89  ret double %1
90}
91declare float @llvm.sin.f32(float)
92declare double @llvm.sin.f64(double)
93declare float @llvm.cos.f32(float)
94declare double @llvm.cos.f64(double)
95declare float @llvm.pow.f32(float, float)
96declare double @llvm.pow.f64(double, double)
97