| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 469 static bool checkHighLaneIndex(SDNode *DL, SDValue &LaneOp, int &LaneIdx) { in checkHighLaneIndex() argument
484 LaneIdx = DLidx->getSExtValue() + EVidx->getSExtValue(); in checkHighLaneIndex()
493 SDValue &LaneOp, int &LaneIdx) { in checkV64LaneV128() argument
495 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx)) { in checkV64LaneV128()
497 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx)) in checkV64LaneV128()
513 int LaneIdx = -1; // Will hold the lane index. in tryMLAV64LaneV128() local
517 LaneIdx)) { in tryMLAV64LaneV128()
521 LaneIdx)) in tryMLAV64LaneV128()
525 SDValue LaneIdxVal = CurDAG->getTargetConstant(LaneIdx, dl, MVT::i64); in tryMLAV64LaneV128()
556 int LaneIdx; in tryMULLV64LaneV128() local
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| D | AArch64ISelLowering.cpp | 7184 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR() local
7188 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx); in LowerBUILD_VECTOR()
7243 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR() local
7244 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 419 static bool checkHighLaneIndex(SDNode *DL, SDValue &LaneOp, int &LaneIdx) { in checkHighLaneIndex() argument
434 LaneIdx = DLidx->getSExtValue() + EVidx->getSExtValue(); in checkHighLaneIndex()
443 SDValue &LaneOp, int &LaneIdx) { in checkV64LaneV128() argument
445 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx)) { in checkV64LaneV128()
447 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx)) in checkV64LaneV128()
463 int LaneIdx = -1; // Will hold the lane index. in tryMLAV64LaneV128() local
467 LaneIdx)) { in tryMLAV64LaneV128()
471 LaneIdx)) in tryMLAV64LaneV128()
475 SDValue LaneIdxVal = CurDAG->getTargetConstant(LaneIdx, dl, MVT::i64); in tryMLAV64LaneV128()
506 int LaneIdx; in tryMULLV64LaneV128() local
[all …]
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| D | AArch64ISelLowering.cpp | 6383 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR() local
6387 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx); in LowerBUILD_VECTOR()
6435 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR() local
6436 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1553 unsigned LaneIdx = Lane * VWidthPerLane; in SimplifyDemandedVectorElts() local
1555 unsigned Idx = LaneIdx + Elt + InnerVWidthPerLane * OpNum; in SimplifyDemandedVectorElts()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 4298 int64_t LaneIdx; in parseSwizzleBroadcast() local
4309 if (parseSwizzleOperands(1, &LaneIdx, in parseSwizzleBroadcast()
4312 Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0); in parseSwizzleBroadcast()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5845 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i32); in LowerBUILD_VECTOR() local
5846 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
9803 SDValue LaneIdx = DAG.getConstant(Idx, dl, MVT::i32); in PerformARMBUILD_VECTORCombine() local
9804 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6674 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i32); in LowerBUILD_VECTOR() local
6675 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
11432 SDValue LaneIdx = DAG.getConstant(Idx, dl, MVT::i32); in PerformARMBUILD_VECTORCombine() local
11433 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
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