Searched refs:LowerBits (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringMIPS32.cpp | 1825 const uint32_t LowerBits = Offset & 0xFFFF; in newBaseRegister() local 1827 if (LowerBits) in newBaseRegister() 1828 Target->_ori(ScratchReg, ScratchReg, LowerBits); in newBaseRegister() 2154 const uint32_t LowerBits = Imm & 0xFFFF; in legalizeImmediate() local 2157 if (LowerBits) { in legalizeImmediate() 2159 Target->_ori(Reg, TReg, LowerBits); in legalizeImmediate() 5970 uint32_t LowerBits = Value & 0xFFFF; in legalize() local 5971 if (LowerBits) { in legalize() 5974 _ori(Reg, TReg, LowerBits); in legalize()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1673 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i32, Value, in getAArch64XALUOOp() local 1678 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp() 1701 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i64, Value, in getAArch64XALUOOp() local 1706 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1967 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i32, Value, in getAArch64XALUOOp() local 1972 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp() 1995 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i64, Value, in getAArch64XALUOOp() local 2000 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
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