| /external/llvm/unittests/ADT/ |
| D | BitVectorTest.cpp | 235 const uint32_t Mask1[] = { 0x80000000, 6, 5 }; in TYPED_TEST() local
238 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
243 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
249 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
251 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
255 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
259 A.setBitsInMask(Mask1, 3); in TYPED_TEST()
262 A.setBitsNotInMask(Mask1, 1); in TYPED_TEST()
265 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
273 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTDC.cpp | 289 int Mask0, Mask1; in convertLogicOp() local
292 std::tie(Op1, Mask1, Worthy1) = ConvertedInsts[cast<Instruction>(I.getOperand(1))]; in convertLogicOp()
298 Mask = Mask0 & Mask1; in convertLogicOp()
301 Mask = Mask0 | Mask1; in convertLogicOp()
304 Mask = Mask0 ^ Mask1; in convertLogicOp()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTDC.cpp | 289 int Mask0, Mask1; in convertLogicOp() local
292 std::tie(Op1, Mask1, Worthy1) = ConvertedInsts[cast<Instruction>(I.getOperand(1))]; in convertLogicOp()
298 Mask = Mask0 & Mask1; in convertLogicOp()
301 Mask = Mask0 | Mask1; in convertLogicOp()
304 Mask = Mask0 ^ Mask1; in convertLogicOp()
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/ADT/ |
| D | BitVectorTest.cpp | 458 const uint32_t Mask1[] = { 0x80000000, 6, 5 }; in TYPED_TEST() local
461 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
466 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
472 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
474 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
478 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
482 A.setBitsInMask(Mask1, 3); in TYPED_TEST()
485 A.setBitsNotInMask(Mask1, 1); in TYPED_TEST()
488 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
496 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
[all …]
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| /external/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 7 CHECK-NEXT: Co-Proc Mask1: 0x0
|
| D | mips-options-sec.test | 8 CHECK-NEXT: Co-Proc Mask1: 0x0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 7 CHECK-NEXT: Co-Proc Mask1: 0x0
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| D | mips-options-sec.test | 8 CHECK-NEXT: Co-Proc Mask1: 0x0
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 46 // Mask1 Mask2 Mask3 Enc12, Name
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| D | ARMISelLowering.cpp | 4978 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); in LowerFCOPYSIGN() local
4980 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6024 SmallVector<int, 8> Mask1(4U, -1); in LowerVECTOR_SHUFFLE_128v4() local
6038 Mask1[NumLo] = Idx; in LowerVECTOR_SHUFFLE_128v4()
6043 Mask1[2+NumHi] = Idx; in LowerVECTOR_SHUFFLE_128v4()
6054 V1 = DAG.getVectorShuffle(VT, dl, V1, V2, &Mask1[0]); in LowerVECTOR_SHUFFLE_128v4()
6093 Mask1[0] = PermMask[HiIndex]; in LowerVECTOR_SHUFFLE_128v4()
6094 Mask1[1] = -1; in LowerVECTOR_SHUFFLE_128v4()
6095 Mask1[2] = PermMask[HiIndex^1]; in LowerVECTOR_SHUFFLE_128v4()
6096 Mask1[3] = -1; in LowerVECTOR_SHUFFLE_128v4()
6097 V2 = DAG.getVectorShuffle(VT, dl, V1, V2, &Mask1[0]); in LowerVECTOR_SHUFFLE_128v4()
6100 Mask1[0] = PermMask[0]; in LowerVECTOR_SHUFFLE_128v4()
[all …]
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | BBVectorize.cpp | 2854 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local
2856 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v); in replaceOutputsOfPair()
2861 ConstantVector::get(Mask1), in replaceOutputsOfPair()
2869 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local
2871 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v); in replaceOutputsOfPair()
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| /external/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 64 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
65 ; SCALAR-NEXT: %ToLoad1 = icmp eq i1 %Mask1, true
189 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
190 ; SCALAR-NEXT: %ToStore1 = icmp eq i1 %Mask1, true
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 72 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
73 ; SCALAR-NEXT: %ToLoad1 = icmp eq i1 %Mask1, true
224 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
225 ; SCALAR-NEXT: %ToStore1 = icmp eq i1 %Mask1, true
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 3999 const unsigned char Mask1[3] = {0, 192, 128};
4002 Constant *Mask1Constant = Ctx->getConstantInt32(Mask1[Index - 1]);
8344 Constant *Mask1 =
8350 Func, MemOperand->getType(), MemOperand->getBase(), Mask1);
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3147 SDValue Mask1 = DAG.getConstant(0x80000000, MVT::i32); in LowerFCOPYSIGN() local
3149 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4305 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); in LowerFCOPYSIGN() local
4307 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
|