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Searched refs:MemSDNode (Results 1 – 25 of 65) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td313 return cast<MemSDNode>(N)->getAlignment() % 8 == 0;
317 return cast<MemSDNode>(N)->getAlignment() >= 16;
331 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUASI.PRIVATE_ADDRESS;
335 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS;
339 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUASI.LOCAL_ADDRESS;
343 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUASI.GLOBAL_ADDRESS;
347 auto AS = cast<MemSDNode>(N)->getAddressSpace();
352 const auto AS = cast<MemSDNode>(N)->getAddressSpace();
359 const auto AS = cast<MemSDNode>(N)->getAddressSpace();
483 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUASI.LOCAL_ADDRESS;
[all …]
DSIISelLowering.h83 SDValue adjustLoadValueType(unsigned Opcode, MemSDNode *M,
122 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
DAMDGPUISelDAGToDAG.cpp229 bool isConstantLoad(const MemSDNode *N, int cbID) const;
353 if (cast<MemSDNode>(N)->getAddressSpace() != AMDGPUASI.LOCAL_ADDRESS || in glueCopyToM0()
1139 const MachinePointerInfo &PtrInfo = cast<MemSDNode>(Parent)->getPointerInfo(); in SelectMUBUFScratchOffen()
1200 const MachinePointerInfo &PtrInfo = cast<MemSDNode>(Parent)->getPointerInfo(); in SelectMUBUFScratchOffset()
1769 MemSDNode *Mem = cast<MemSDNode>(N); in SelectATOMIC_CMP_SWAP()
2151 bool R600DAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const { in isConstantLoad()
DSIISelLowering.cpp1126 const MemSDNode *MemNode = cast<MemSDNode>(N); in isMemOpHasNoClobberedMemOperand()
1143 const MemSDNode *MemNode = cast<MemSDNode>(N); in isMemOpUniform()
3679 MemSDNode *M, in adjustLoadValueType()
4620 DMaskIdx = isa<MemSDNode>(Op) ? 2 : 1; in lowerImage()
4633 if (isa<MemSDNode>(Op)) in lowerImage()
4710 if (isa<MemSDNode>(Op)) in lowerImage()
4725 if (auto MemOp = dyn_cast<MemSDNode>(Op)) { in lowerImage()
5097 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN()
5142 auto *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN()
5152 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN()
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/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td180 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS;
198 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
218 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS;
229 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
242 return cast<MemSDNode>(N)->getAddressSPace() == AMDGPUAS::FLAT_ADDRESS;
310 return cast<MemSDNode>(N)->getAlignment() % 8 == 0;
324 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
342 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
368 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::FLAT_ADDRESS;
374 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]
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DAMDGPUISelDAGToDAG.cpp76 bool isConstantLoad(const MemSDNode *N, int cbID) const;
221 cast<MemSDNode>(N)->getAddressSpace() != AMDGPUAS::LOCAL_ADDRESS) in glueCopyToM0()
485 bool AMDGPUDAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const { in isConstantLoad()
1365 MemSDNode *Mem = cast<MemSDNode>(N); in SelectATOMIC_CMP_SWAP()
1524 if (MemSDNode *M = dyn_cast<MemSDNode>(User)) { in PreprocessISelDAG()
DR600Instructions.td342 const MemSDNode *LD = cast<MemSDNode>(N);
355 const MemSDNode *LD = cast<MemSDNode>(N);
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DSelectionDAGNodes.h882 class MemSDNode : public SDNode {
892 MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT MemoryVT,
895 MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops,
960 static bool classof(const MemSDNode *) { return true; }
987 class AtomicSDNode : public MemSDNode {
1020 : MemSDNode(Opc, dl, VTL, MemVT, MMO) {
1028 : MemSDNode(Opc, dl, VTL, MemVT, MMO) {
1036 : MemSDNode(Opc, dl, VTL, MemVT, MMO) {
1073 class MemIntrinsicSDNode : public MemSDNode {
1078 : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, MMO) {
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h495 friend class MemSDNode;
513 friend class MemSDNode;
1238 class MemSDNode : public SDNode {
1248 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1365 class AtomicSDNode : public MemSDNode {
1369 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {}
1414 class MemIntrinsicSDNode : public MemSDNode {
1418 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
2015 class LSBaseSDNode : public MemSDNode {
2020 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
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/external/llvm/lib/Target/Mips/
DMipsISelDAGToDAG.cpp226 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select()
227 cast<MemSDNode>(Node)->getAlignment()) && in Select()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp655 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace()
675 static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget, in canLowerToLDG()
840 MemSDNode *LD = cast<MemSDNode>(N); in tryLoad()
985 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoad()
1000 MemSDNode *MemSD = cast<MemSDNode>(N); in tryLoadVector()
1225 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoadVector()
1236 MemSDNode *Mem; in tryLDGLDU()
1261 Mem = cast<MemSDNode>(N); in tryLDGLDU()
1708 MemSDNode *ST = cast<MemSDNode>(N); in tryStore()
1868 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryStore()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelDAGToDAG.cpp249 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select()
250 cast<MemSDNode>(Node)->getAlignment()) && in Select()
/external/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h1011 class MemSDNode : public SDNode {
1021 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1125 class AtomicSDNode : public MemSDNode {
1157 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1203 class MemIntrinsicSDNode : public MemSDNode {
1207 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
1777 class LSBaseSDNode : public MemSDNode {
1782 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
1866 class MaskedLoadStoreSDNode : public MemSDNode {
1872 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {}
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/external/llvm/lib/Target/AVR/
DAVR.h42 inline bool isProgramMemoryAccess(MemSDNode const *N) { in isProgramMemoryAccess()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVR.h48 inline bool isProgramMemoryAccess(MemSDNode const *N) { in isProgramMemoryAccess()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.h1385 class X86StoreSDNode : public MemSDNode {
1390 :MemSDNode(Opcode, Order, dl, VTs, MemVT, MMO) {} in X86StoreSDNode()
1403 class X86MaskedStoreSDNode : public MemSDNode {
1408 : MemSDNode(Opcode, Order, dl, VTs, MemVT, MMO) {} in X86MaskedStoreSDNode()
1473 class X86MaskedGatherScatterSDNode : public MemSDNode {
1478 : MemSDNode(Opc, Order, dl, VTs, MemVT, MMO) {} in X86MaskedGatherScatterSDNode()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp539 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace()
559 static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget, in canLowerToLDG()
907 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoad()
922 MemSDNode *MemSD = cast<MemSDNode>(N); in tryLoadVector()
1293 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoadVector()
1304 MemSDNode *Mem; in tryLDGLDU()
1329 Mem = cast<MemSDNode>(N); in tryLDGLDU()
2345 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryStore()
2359 MemSDNode *MemSD = cast<MemSDNode>(N); in tryStoreVector()
2719 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryStoreVector()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.h137 bool isAlignedMemNode(const MemSDNode *N) const;
DHexagonPatternsHVX.td81 return isAlignedMemNode(dyn_cast<MemSDNode>(N));
85 return !isAlignedMemNode(dyn_cast<MemSDNode>(N));
89 return isAlignedMemNode(dyn_cast<MemSDNode>(N));
93 return !isAlignedMemNode(dyn_cast<MemSDNode>(N));
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp525 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp634 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp366 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in tryIndexedBinOp()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp363 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in tryIndexedBinOp()
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp366 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in SelectIndexedBinOp()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp1146 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in SelectAddr()
1335 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomic64()
1480 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadAdd()
1642 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadArith()

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