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Searched refs:OrigMISU (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/CodeGen/
DMachinePipeliner.cpp3270 SUnit *OrigMISU = getSUnit(OrigInstr->second); in rewriteScheduledInstr() local
3271 int StageSched = Schedule.stageScheduled(OrigMISU); in rewriteScheduledInstr()
3272 int CycleSched = Schedule.cycleScheduled(OrigMISU); in rewriteScheduledInstr()
3280 (CyclePhi <= CycleSched || OrigMISU->getInstr()->isPHI())) in rewriteScheduledInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachinePipeliner.cpp3393 SUnit *OrigMISU = getSUnit(OrigInstr->second); in rewriteScheduledInstr() local
3394 int StageSched = Schedule.stageScheduled(OrigMISU); in rewriteScheduledInstr()
3395 int CycleSched = Schedule.cycleScheduled(OrigMISU); in rewriteScheduledInstr()
3403 (CyclePhi <= CycleSched || OrigMISU->getInstr()->isPHI())) in rewriteScheduledInstr()