Searched refs:PhiStage (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 402 unsigned getPrevMapVal(unsigned StageNum, unsigned PhiStage, unsigned LoopVal,
2566 int PhiStage = Schedule.stageScheduled(getSUnit(InstOp1)); in generateExistingPhis() local
2567 if ((int)(PrologStage - StageDiff - np) < PhiStage + Indirects) in generateExistingPhis()
2573 int StageAdj = (PhiOpStage != -1 ? PhiStage - PhiOpStage : 0); in generateExistingPhis()
3179 unsigned SwingSchedulerDAG::getPrevMapVal(unsigned StageNum, unsigned PhiStage, in getPrevMapVal() argument
3184 if (StageNum > PhiStage) { in getPrevMapVal()
3186 if (PhiStage == LoopStage && VRMap[StageNum - 1].count(LoopVal)) in getPrevMapVal()
3196 else if (StageNum == PhiStage + 1) in getPrevMapVal()
3199 else if (StageNum > PhiStage + 1 && LoopInst->getParent() == BB) in getPrevMapVal()
3202 getPrevMapVal(StageNum - 1, PhiStage, getLoopPhiReg(*LoopInst, BB), in getPrevMapVal()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 440 unsigned getPrevMapVal(unsigned StageNum, unsigned PhiStage, unsigned LoopVal,
2684 int PhiStage = Schedule.stageScheduled(getSUnit(InstOp1)); in generateExistingPhis() local
2685 if ((int)(PrologStage - StageDiff - np) < PhiStage + Indirects) in generateExistingPhis()
2691 int StageAdj = (PhiOpStage != -1 ? PhiStage - PhiOpStage : 0); in generateExistingPhis()
3304 unsigned SwingSchedulerDAG::getPrevMapVal(unsigned StageNum, unsigned PhiStage, in getPrevMapVal() argument
3309 if (StageNum > PhiStage) { in getPrevMapVal()
3311 if (PhiStage == LoopStage && VRMap[StageNum - 1].count(LoopVal)) in getPrevMapVal()
3321 else if (StageNum == PhiStage + 1) in getPrevMapVal()
3324 else if (StageNum > PhiStage + 1 && LoopInst->getParent() == BB) in getPrevMapVal()
3327 getPrevMapVal(StageNum - 1, PhiStage, getLoopPhiReg(*LoopInst, BB), in getPrevMapVal()
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