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Searched refs:PredCost (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/
DTargetInstrInfo.cpp95 unsigned *PredCost) const { in getInstrLatency()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h116 unsigned *PredCost = nullptr) const override;
DPPCInstrInfo.cpp113 unsigned *PredCost) const { in getInstrLatency()
115 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); in getInstrLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.h211 unsigned *PredCost = nullptr) const override;
DR600InstrInfo.cpp1012 unsigned *PredCost) const { in getInstrLatency()
1013 if (PredCost) in getInstrLatency()
1014 *PredCost = 2; in getInstrLatency()
/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.h207 unsigned *PredCost = nullptr) const override;
DR600InstrInfo.cpp1030 unsigned *PredCost) const { in getInstrLatency()
1031 if (PredCost) in getInstrLatency()
1032 *PredCost = 2; in getInstrLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h171 unsigned *PredCost = nullptr) const override;
DPPCInstrInfo.cpp149 unsigned *PredCost) const { in getInstrLatency()
151 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); in getInstrLatency()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h258 unsigned *PredCost = 0) const override;
DHexagonInstrInfo.cpp1610 unsigned *PredCost) const { in getInstrLatency()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMBaseInstrInfo.h245 const MachineInstr *MI, unsigned *PredCost = 0) const;
DARMBaseInstrInfo.cpp2671 unsigned *PredCost) const { in getInstrLatency()
2682 if (PredCost && MCID.hasImplicitDefOfPhysReg(ARM::CPSR)) in getInstrLatency()
2685 *PredCost = 1; in getInstrLatency()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetInstrInfo.h656 unsigned *PredCost = 0) const;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h288 unsigned *PredCost = nullptr) const override;
DHexagonInstrInfo.cpp1801 unsigned *PredCost) const { in getInstrLatency()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h339 unsigned *PredCost = nullptr) const override;
DARMBaseInstrInfo.cpp4005 unsigned *PredCost) const { in getInstrLatency()
4018 Latency += getInstrLatency(ItinData, *I, PredCost); in getInstrLatency()
4024 if (PredCost && (MCID.isCall() || MCID.hasImplicitDefOfPhysReg(ARM::CPSR))) { in getInstrLatency()
4027 *PredCost = 1; in getInstrLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h370 unsigned *PredCost = nullptr) const override;
DARMBaseInstrInfo.cpp1926 unsigned PredCost = (TCycles + FCycles + TExtra + FExtra) * ScalingUpFactor; in isProfitableToIfCvt() local
1944 PredCost -= 1 * ScalingUpFactor; in isProfitableToIfCvt()
1953 PredCost += ((TCycles + FCycles - 4) / 4) * ScalingUpFactor; in isProfitableToIfCvt()
1964 return PredCost <= UnpredCost; in isProfitableToIfCvt()
4393 unsigned *PredCost) const { in getInstrLatency()
4406 Latency += getInstrLatency(ItinData, *I, PredCost); in getInstrLatency()
4412 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getInstrLatency()
4416 *PredCost = 1; in getInstrLatency()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h1258 unsigned *PredCost = nullptr) const;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetInstrInfo.h1351 unsigned *PredCost = nullptr) const;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetInstrInfo.cpp1104 unsigned *PredCost) const { in getInstrLatency()
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp1045 unsigned *PredCost) const { in getInstrLatency()