| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FlagsCopyLowering.cpp | 170 RCL, enumerator
220 LLVM_EXPAND_INSTR_SIZES(RCL, rCL) in getMnemonicFromOpcode()
221 LLVM_EXPAND_INSTR_SIZES(RCL, r1) in getMnemonicFromOpcode()
222 LLVM_EXPAND_INSTR_SIZES(RCL, ri) in getMnemonicFromOpcode()
223 return FlagArithMnemonic::RCL; in getMnemonicFromOpcode()
799 case FlagArithMnemonic::RCL: in rewriteArithmetic()
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| D | X86SchedHaswell.td | 1320 def: InstRW<[HWWriteResGroup59], (instregex "RCL(8|16|32|64)r1",
1321 "RCL(8|16|32|64)ri",
1356 def: InstRW<[HWWriteResGroup66], (instregex "RCL(8|16|32|64)m1",
1357 "RCL(8|16|32|64)mi",
1666 def: InstRW<[HWWriteResGroup120], (instregex "RCL(8|16|32|64)mCL")>;
1673 def: InstRW<[HWWriteResGroup129], (instregex "RCL(16|32|64)rCL",
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| D | X86SchedSkylakeClient.td | 831 def: InstRW<[SKLWriteResGroup42], (instregex "RCL(8|16|32|64)r1",
832 "RCL(8|16|32|64)ri",
1317 def: InstRW<[SKLWriteResGroup116], (instregex "RCL(8|16|32|64)m1",
1318 "RCL(8|16|32|64)mi",
1505 def: InstRW<[SKLWriteResGroup154], (instregex "RCL(16|32|64)rCL",
1584 def: InstRW<[SKLWriteResGroup174], (instregex "RCL(8|16|32|64)mCL")>;
|
| D | X86SchedBroadwell.td | 792 def: InstRW<[BWWriteResGroup35], (instregex "RCL(8|16|32|64)r1",
793 "RCL(8|16|32|64)ri",
1216 def: InstRW<[BWWriteResGroup97], (instregex "RCL(8|16|32|64)m1",
1217 "RCL(8|16|32|64)mi",
1366 def: InstRW<[BWWriteResGroup131], (instregex "RCL(16|32|64)rCL",
1438 def: InstRW<[BWWriteResGroup149], (instregex "RCL(8|16|32|64)mCL")>;
|
| D | X86SchedSkylakeServer.td | 898 def: InstRW<[SKXWriteResGroup44], (instregex "RCL(8|16|32|64)r1",
899 "RCL(8|16|32|64)ri",
1676 def: InstRW<[SKXWriteResGroup127], (instregex "RCL(8|16|32|64)m1",
1677 "RCL(8|16|32|64)mi",
2019 def: InstRW<[SKXWriteResGroup169], (instregex "RCL(16|32|64)rCL",
2175 def: InstRW<[SKXWriteResGroup195], (instregex "RCL(8|16|32|64)mCL")>;
|
| D | X86ScheduleAtom.td | 498 def : InstRW<[AtomWrite0_1], (instregex "(RCL|RCR|ROL|ROR|SAR|SHL|SHR)(8|16|32|64)m",
|
| D | X86ScheduleZnver1.td | 734 // RCR RCL.
|
| D | X86InstrInfo.td | 3432 defm : ShiftRotateByOneAlias<"rcl", "RCL">;
|
| /external/capstone/ |
| D | ChangeLog | 188 - All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
|
| /external/llvm/lib/Target/X86/ |
| D | X86SchedHaswell.td | 766 // RCR RCL.
|
| D | X86InstrInfo.td | 3041 defm : ShiftRotateByOneAlias<"rcl", "RCL">;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.td | 1778 defm : ShiftRotateByOneAlias<"rcl", "RCL">;
|
| D | X86GenAsmWriter.inc | 6135 "RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL32rCL\000RCL"
|
| D | X86GenAsmWriter1.inc | 6878 "RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL32rCL\000RCL"
|
| /external/syzkaller/pkg/ifuzz/gen/ |
| D | all-enc-instructions.txt | 2820 ICLASS : RCL
2905 ICLASS : RCL
2985 ICLASS : RCL
3073 ICLASS : RCL
3164 ICLASS : RCL
3249 ICLASS : RCL
3259 ICLASS : RCL
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 5166 ,"BE","RCL","Richelle","Richelle","WLG","123-----","RL","0601",,"5043N 00541E",
7678 ,"BR","RCL","Rio Claro","Rio Claro","SP","--3-----","RQ","0607",,,
12798 ,"CL","RCL","R�o Claro","Rio Claro","ML","--3-----","RN","0501",,"3513S 07115W",
29916 ,"ES","RCL","Navarcles","Navarcles","B","--3-----","RQ","0907",,,
40332 "+","FR","RCL","Regni�re-�cluse","Regniere-Ecluse","80","--3-----","RL","1301",,"5017N 00146E",
|
| D | 2013-1_UNLOCODE_CodeListPart2.csv | 4145 ,"GB","RCL","Riccall","Riccall","NYK","-23-----","RL","0701",,"5350N 00103W",
14318 ,"IT","RCL","Roncello","Roncello","MI","--3-----","RL","0607",,"4536N 00927E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 23216 ,"US","RCL","Rochelle","Rochelle","GA","--3-----","RL","0401",,"3157N 08327W",
27856 ,"VU","RCL","Redcliffe","Redcliffe",,"---4----","AI","0001",,,
|