/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86FlagsCopyLowering.cpp | 171 RCR, enumerator 225 LLVM_EXPAND_INSTR_SIZES(RCR, rCL) in getMnemonicFromOpcode() 226 LLVM_EXPAND_INSTR_SIZES(RCR, r1) in getMnemonicFromOpcode() 227 LLVM_EXPAND_INSTR_SIZES(RCR, ri) in getMnemonicFromOpcode() 228 return FlagArithMnemonic::RCR; in getMnemonicFromOpcode() 800 case FlagArithMnemonic::RCR: in rewriteArithmetic()
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D | X86SchedHaswell.td | 1322 "RCR(8|16|32|64)r1", 1323 "RCR(8|16|32|64)ri")>; 1358 "RCR(8|16|32|64)m1", 1359 "RCR(8|16|32|64)mi")>; 1674 "RCR(16|32|64)rCL")>; 1702 def: InstRW<[HWWriteResGroup135], (instregex "RCR(8|16|32|64)mCL")>;
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D | X86SchedSkylakeClient.td | 833 "RCR(8|16|32|64)r1", 834 "RCR(8|16|32|64)ri")>; 1319 "RCR(8|16|32|64)m1", 1320 "RCR(8|16|32|64)mi")>; 1506 "RCR(16|32|64)rCL")>; 1626 def: InstRW<[SKLWriteResGroup185], (instregex "RCR(8|16|32|64)mCL")>;
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D | X86SchedBroadwell.td | 794 "RCR(8|16|32|64)r1", 795 "RCR(8|16|32|64)ri")>; 1218 "RCR(8|16|32|64)m1", 1219 "RCR(8|16|32|64)mi")>; 1367 "RCR(16|32|64)rCL")>; 1474 def: InstRW<[BWWriteResGroup160], (instregex "RCR(8|16|32|64)mCL")>;
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D | X86SchedSkylakeServer.td | 900 "RCR(8|16|32|64)r1", 901 "RCR(8|16|32|64)ri")>; 1678 "RCR(8|16|32|64)m1", 1679 "RCR(8|16|32|64)mi")>; 2020 "RCR(16|32|64)rCL")>; 2224 def: InstRW<[SKXWriteResGroup208], (instregex "RCR(8|16|32|64)mCL")>;
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D | X86ScheduleAtom.td | 498 def : InstRW<[AtomWrite0_1], (instregex "(RCL|RCR|ROL|ROR|SAR|SHL|SHR)(8|16|32|64)m",
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D | X86ScheduleZnver1.td | 734 // RCR RCL.
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D | X86InstrInfo.td | 3433 defm : ShiftRotateByOneAlias<"rcr", "RCR">;
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonFrameLowering.cpp | 1890 auto *RCR = MRI.getRegClass(R.Reg); in optimizeSpillSlots() local 1892 return RCR; in optimizeSpillSlots() 1893 unsigned PR = *RCR->begin(); in optimizeSpillSlots()
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/external/capstone/ |
D | ChangeLog | 188 - All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
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/external/icu/icu4c/source/data/locales/ |
D | ga.txt | 826 "RCR", 834 "RCR",
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | 8e9ef083444a3e681f21b7ac61c56a26.00006d50.honggfuzz.cov | 122 …<#f��5[&�p�}��PN6o8�d��k�E�L�-��M�N<�W��. �f�#X=,�4������z+�Y���RCR�N�+ܬ�=s�>�IWkt�…
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | 8e9ef083444a3e681f21b7ac61c56a26.00006d50.honggfuzz.cov | 122 …<#f��5[&�p�}��PN6o8�d��k�E�L�-��M�N<�W��. �f�#X=,�4������z+�Y���RCR�N�+ܬ�=s�>�IWkt�…
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/external/llvm/lib/Target/X86/ |
D | X86SchedHaswell.td | 766 // RCR RCL.
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D | X86InstrInfo.td | 3042 defm : ShiftRotateByOneAlias<"rcr", "RCR">;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrInfo.td | 1779 defm : ShiftRotateByOneAlias<"rcr", "RCR">;
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/external/syzkaller/pkg/ifuzz/gen/ |
D | all-enc-instructions.txt | 2833 ICLASS : RCR 2918 ICLASS : RCR 3001 ICLASS : RCR 3089 ICLASS : RCR 3177 ICLASS : RCR 3269 ICLASS : RCR 3279 ICLASS : RCR
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/external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
D | 2013-1_UNLOCODE_CodeListPart2.csv | 4175 ,"GB","RCR","Rocester","Rocester","STS","--3-----","RQ","0901",,"5295N 00183W", 14275 ,"IT","RCR","Roccamorice","Roccamorice","PE","--3-----","RQ","0901",,"4212N 01401E",
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D | 2013-1_UNLOCODE_CodeListPart3.csv | 4290 ,"RO","RCR","Rucar","Rucar","AG","--3-----","RL","0501",,"4523N 02511E", 23219 ,"US","RCR","Rochester","Rochester","IN","---4----","AI","0001",,,
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D | 2013-1_UNLOCODE_CodeListPart1.csv | 7663 ,"BR","RCR","Ribeirao Cascalheira","Ribeirao Cascalheira","MT","--3-----","RQ","0607",,, 40294 ,"FR","RCR","Rancourt","Rancourt","80","-----6--","RL","0901",,"5000N 00255E",
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