/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.h | 27 const MCSubtargetInfo &STI) override; 31 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 33 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 37 const MCSubtargetInfo &STI, 41 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 45 const MCSubtargetInfo &STI, raw_ostream &O); 47 const MCSubtargetInfo &STI, raw_ostream &O); 50 const MCSubtargetInfo &STI, raw_ostream &O); 52 const MCSubtargetInfo &STI, raw_ostream &O); 54 const MCSubtargetInfo &STI, raw_ostream &O); [all …]
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D | ARMInstPrinter.cpp | 81 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument 94 printSBitModifierOperand(MI, 6, STI, O); in printInst() 95 printPredicateOperand(MI, 4, STI, O); in printInst() 116 printSBitModifierOperand(MI, 5, STI, O); in printInst() 117 printPredicateOperand(MI, 3, STI, O); in printInst() 141 printPredicateOperand(MI, 2, STI, O); in printInst() 145 printRegisterList(MI, 4, STI, O); in printInst() 155 printPredicateOperand(MI, 4, STI, O); in printInst() 170 printPredicateOperand(MI, 2, STI, O); in printInst() 174 printRegisterList(MI, 4, STI, O); in printInst() [all …]
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.h | 27 const MCSubtargetInfo &STI) override; 31 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 33 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 37 const MCSubtargetInfo &STI, 41 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 45 const MCSubtargetInfo &STI, raw_ostream &O); 47 const MCSubtargetInfo &STI, raw_ostream &O); 50 const MCSubtargetInfo &STI, raw_ostream &O); 52 const MCSubtargetInfo &STI, raw_ostream &O); 54 const MCSubtargetInfo &STI, raw_ostream &O); [all …]
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D | ARMInstPrinter.cpp | 72 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument 86 printSBitModifierOperand(MI, 6, STI, O); in printInst() 87 printPredicateOperand(MI, 4, STI, O); in printInst() 108 printSBitModifierOperand(MI, 5, STI, O); in printInst() 109 printPredicateOperand(MI, 3, STI, O); in printInst() 133 printPredicateOperand(MI, 2, STI, O); in printInst() 137 printRegisterList(MI, 4, STI, O); in printInst() 147 printPredicateOperand(MI, 4, STI, O); in printInst() 162 printPredicateOperand(MI, 2, STI, O); in printInst() 166 printRegisterList(MI, 4, STI, O); in printInst() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMTargetStreamer.cpp | 120 static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI) { in getArchForCPU() argument 121 if (STI.getCPU() == "xscale") in getArchForCPU() 124 if (STI.hasFeature(ARM::HasV8Ops)) { in getArchForCPU() 125 if (STI.hasFeature(ARM::FeatureRClass)) in getArchForCPU() 128 } else if (STI.hasFeature(ARM::HasV8MMainlineOps)) in getArchForCPU() 130 else if (STI.hasFeature(ARM::HasV7Ops)) { in getArchForCPU() 131 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU() 134 } else if (STI.hasFeature(ARM::HasV6T2Ops)) in getArchForCPU() 136 else if (STI.hasFeature(ARM::HasV8MBaselineOps)) in getArchForCPU() 138 else if (STI.hasFeature(ARM::HasV6MOps)) in getArchForCPU() [all …]
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D | ARMMCCodeEmitter.cpp | 64 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb() 65 return STI.getFeatureBits()[ARM::ModeThumb]; in isThumb() 68 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2() 69 return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2]; in isThumb2() 72 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO() 73 const Triple &TT = STI.getTargetTriple(); in isTargetMachO() 83 const MCSubtargetInfo &STI) const; 89 const MCSubtargetInfo &STI) const; 96 const MCSubtargetInfo &STI) const; 101 const MCSubtargetInfo &STI) const; [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/ |
D | AMDGPUInstPrinter.h | 27 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 32 const MCSubtargetInfo &STI) override; 38 const MCSubtargetInfo &STI, raw_ostream &O); 41 const MCSubtargetInfo &STI, raw_ostream &O); 47 const MCSubtargetInfo &STI, raw_ostream &O); 54 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 56 void printOffsetS13(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 59 void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 61 void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 64 const MCSubtargetInfo &STI, raw_ostream &O); [all …]
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D | AMDGPUInstPrinter.cpp | 31 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument 33 printInstruction(MI, STI, OS); in printInst() 38 const MCSubtargetInfo &STI, in printU4ImmOperand() argument 49 const MCSubtargetInfo &STI, in printU16ImmOperand() argument 57 printU32ImmOperand(MI, OpNo, STI, O); in printU16ImmOperand() 81 const MCSubtargetInfo &STI, in printU32ImmOperand() argument 117 const MCSubtargetInfo &STI, in printOffset() argument 127 const MCSubtargetInfo &STI, in printOffsetS13() argument 137 const MCSubtargetInfo &STI, in printOffset0() argument 146 const MCSubtargetInfo &STI, in printOffset1() argument [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.h | 36 bool isMicroMips(const MCSubtargetInfo &STI) const; 37 bool isMips32r6(const MCSubtargetInfo &STI) const; 48 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, 53 const MCSubtargetInfo &STI) const override; 59 const MCSubtargetInfo &STI) const; 66 const MCSubtargetInfo &STI) const; 73 const MCSubtargetInfo &STI) const; 79 const MCSubtargetInfo &STI) const; 83 const MCSubtargetInfo &STI) const; 87 const MCSubtargetInfo &STI) const; [all …]
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D | MipsMCCodeEmitter.cpp | 121 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips() 122 return STI.getFeatureBits()[Mips::FeatureMicroMips]; in isMicroMips() 125 bool MipsMCCodeEmitter::isMips32r6(const MCSubtargetInfo &STI) const { in isMips32r6() 126 return STI.getFeatureBits()[Mips::FeatureMips32r6]; in isMips32r6() 134 const MCSubtargetInfo &STI, in EmitInstruction() argument 140 if (IsLittleEndian && Size == 4 && isMicroMips(STI)) { in EmitInstruction() 141 EmitInstruction(Val >> 16, 2, STI, OS); in EmitInstruction() 142 EmitInstruction(Val, 2, STI, OS); in EmitInstruction() 156 const MCSubtargetInfo &STI) const in encodeInstruction() 184 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 30 const MCSubtargetInfo &STI) override; 34 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 36 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 40 const MCSubtargetInfo &STI, 51 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, 54 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 56 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 58 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 65 const MCSubtargetInfo &STI, raw_ostream &O) { in printPostIncOperand() argument 70 const MCSubtargetInfo &STI, raw_ostream &O); [all …]
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.h | 40 bool isMicroMips(const MCSubtargetInfo &STI) const; 41 bool isMips32r6(const MCSubtargetInfo &STI) const; 51 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, 56 const MCSubtargetInfo &STI) const override; 62 const MCSubtargetInfo &STI) const; 69 const MCSubtargetInfo &STI) const; 76 const MCSubtargetInfo &STI) const; 82 const MCSubtargetInfo &STI) const; 86 const MCSubtargetInfo &STI) const; 90 const MCSubtargetInfo &STI) const; [all …]
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D | MipsMCCodeEmitter.cpp | 151 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips() 152 return STI.getFeatureBits()[Mips::FeatureMicroMips]; in isMicroMips() 155 bool MipsMCCodeEmitter::isMips32r6(const MCSubtargetInfo &STI) const { in isMips32r6() 156 return STI.getFeatureBits()[Mips::FeatureMips32r6]; in isMips32r6() 164 const MCSubtargetInfo &STI, in EmitInstruction() argument 170 if (IsLittleEndian && Size == 4 && isMicroMips(STI)) { in EmitInstruction() 171 EmitInstruction(Val >> 16, 2, STI, OS); in EmitInstruction() 172 EmitInstruction(Val, 2, STI, OS); in EmitInstruction() 186 const MCSubtargetInfo &STI) const in encodeInstruction() 221 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction() [all …]
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 28 const MCSubtargetInfo &STI) override; 32 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 34 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 38 const MCSubtargetInfo &STI, 47 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, 50 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 52 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 54 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 60 const MCSubtargetInfo &STI, raw_ostream &O) { in printPostIncOperand() argument 65 const MCSubtargetInfo &STI, raw_ostream &O); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
D | SystemZMCCodeEmitter.cpp | 50 const MCSubtargetInfo &STI) const override; 56 const MCSubtargetInfo &STI) const; 62 const MCSubtargetInfo &STI) const; 70 const MCSubtargetInfo &STI) const; 73 const MCSubtargetInfo &STI) const; 76 const MCSubtargetInfo &STI) const; 79 const MCSubtargetInfo &STI) const; 82 const MCSubtargetInfo &STI) const; 85 const MCSubtargetInfo &STI) const; 88 const MCSubtargetInfo &STI) const; [all …]
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 53 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb() 54 return STI.getFeatureBits()[ARM::ModeThumb]; in isThumb() 56 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2() 57 return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2]; in isThumb2() 59 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO() 60 const Triple &TT = STI.getTargetTriple(); in isTargetMachO() 70 const MCSubtargetInfo &STI) const; 76 const MCSubtargetInfo &STI) const; 83 const MCSubtargetInfo &STI) const; 88 const MCSubtargetInfo &STI) const; [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 59 const MCSubtargetInfo &STI) const; 62 const MCSubtargetInfo &STI) const; 65 const MCSubtargetInfo &STI) const; 68 const MCSubtargetInfo &STI) const; 71 const MCSubtargetInfo &STI) const; 74 const MCSubtargetInfo &STI) const; 77 const MCSubtargetInfo &STI) const; 80 const MCSubtargetInfo &STI) const; 83 const MCSubtargetInfo &STI) const; 86 const MCSubtargetInfo &STI) const; [all …]
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 53 const MCSubtargetInfo &STI) const; 56 const MCSubtargetInfo &STI) const; 59 const MCSubtargetInfo &STI) const; 62 const MCSubtargetInfo &STI) const; 65 const MCSubtargetInfo &STI) const; 68 const MCSubtargetInfo &STI) const; 71 const MCSubtargetInfo &STI) const; 74 const MCSubtargetInfo &STI) const; 77 const MCSubtargetInfo &STI) const; 80 const MCSubtargetInfo &STI) const; [all …]
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
D | SystemZMCCodeEmitter.cpp | 42 const MCSubtargetInfo &STI) const override; 48 const MCSubtargetInfo &STI) const; 54 const MCSubtargetInfo &STI) const; 62 const MCSubtargetInfo &STI) const; 65 const MCSubtargetInfo &STI) const; 68 const MCSubtargetInfo &STI) const; 71 const MCSubtargetInfo &STI) const; 74 const MCSubtargetInfo &STI) const; 77 const MCSubtargetInfo &STI) const; 91 const MCSubtargetInfo &STI) const { in getPC16DBLEncoding() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCCodeEmitter.cpp | 59 const MCSubtargetInfo &STI) const; 65 const MCSubtargetInfo &STI) const; 73 const MCSubtargetInfo &STI) const; 79 const MCSubtargetInfo &STI) const; 85 const MCSubtargetInfo &STI) const; 91 const MCSubtargetInfo &STI) const; 97 const MCSubtargetInfo &STI) const; 104 const MCSubtargetInfo &STI) const; 110 const MCSubtargetInfo &STI) const; 116 const MCSubtargetInfo &STI) const; [all …]
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCCodeEmitter.cpp | 50 const MCSubtargetInfo &STI) const; 56 const MCSubtargetInfo &STI) const; 64 const MCSubtargetInfo &STI) const; 70 const MCSubtargetInfo &STI) const; 76 const MCSubtargetInfo &STI) const; 82 const MCSubtargetInfo &STI) const; 88 const MCSubtargetInfo &STI) const; 95 const MCSubtargetInfo &STI) const; 101 const MCSubtargetInfo &STI) const; 107 const MCSubtargetInfo &STI) const; [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenMCCodeEmitter.inc | 11 const MCSubtargetInfo &STI) const { 3503 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3507 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3519 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3523 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3527 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3539 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3542 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3545 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3552 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/InstPrinter/ |
D | SparcInstPrinter.cpp | 38 bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const { in isV9() 39 return (STI.getFeatureBits()[Sparc::FeatureV9]) != 0; in isV9() 48 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument 49 if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O)) in printInst() 50 printInstruction(MI, STI, O); in printInst() 55 const MCSubtargetInfo &STI, in printSparcAliasInstr() argument 76 O << "\tjmp "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr() 79 O << "\tcall "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr() 85 if (isV9(STI) in printSparcAliasInstr() 100 printOperand(MI, 1, STI, O); in printSparcAliasInstr() [all …]
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/external/llvm/lib/Target/Sparc/InstPrinter/ |
D | SparcInstPrinter.cpp | 38 bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const { in isV9() 39 return (STI.getFeatureBits()[Sparc::FeatureV9]) != 0; in isV9() 48 StringRef Annot, const MCSubtargetInfo &STI) { in printInst() argument 49 if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O)) in printInst() 50 printInstruction(MI, STI, O); in printInst() 55 const MCSubtargetInfo &STI, in printSparcAliasInstr() argument 76 O << "\tjmp "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr() 79 O << "\tcall "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr() 85 if (isV9(STI) in printSparcAliasInstr() 100 printOperand(MI, 1, STI, O); in printSparcAliasInstr() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 48 const MCSubtargetInfo &STI) const; 60 const MCSubtargetInfo &STI) const override; 65 const MCSubtargetInfo &STI) const override; 71 const MCSubtargetInfo &STI) const override; 75 const MCSubtargetInfo &STI) const override; 79 const MCSubtargetInfo &STI) const override; 103 static uint32_t getLit16Encoding(uint16_t Val, const MCSubtargetInfo &STI) { in getLit16Encoding() argument 133 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding() 139 static uint32_t getLit32Encoding(uint32_t Val, const MCSubtargetInfo &STI) { in getLit32Encoding() argument 169 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding() [all …]
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