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Searched refs:STLLRH (Results 1 – 16 of 16) sorted by relevance

/external/vixl/src/aarch64/
Dcpu-features-auditor-aarch64.cc506 case STLLRH: in VisitLoadStoreExclusive()
Dconstants-aarch64.h1019 STLLRH = LoadStoreExclusiveFixed | 0x40800000, enumerator
Ddisasm-aarch64.cc1369 V(STLLRH, "stllrh", "'Wt") \
Dsimulator-aarch64.cc1930 case STLLRH: in VisitLoadStoreExclusive()
Dassembler-aarch64.cc1537 Emit(STLLRH | Rs_mask | Rt(rt) | Rt2_mask | RnSP(dst.GetBaseRegister())); in stllrh()
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp1115 case AArch64::STLLRH: in DecodeExclusiveLdStInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp1313 case AArch64::STLLRH: in DecodeExclusiveLdStInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedThunderX2T99.td1877 (instrs STLLRB, STLLRH, STLLRW, STLLRX)>;
DAArch64InstrInfo.td2767 def STLLRH : StoreRelease <0b01, 1, 0, 0, 0, GPR32, "stllrh">;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenMCCodeEmitter.inc3697 UINT64_C(1218411520), // STLLRH
9859 case AArch64::STLLRH:
15749 Feature_HasV8_1a | 0, // STLLRH = 3684
DAArch64GenAsmWriter1.inc5445 205628603U, // STLLRH
9964 27U, // STLLRH
DAArch64GenAsmWriter.inc4496 2253966166U, // STLLRH
9015 27U, // STLLRH
DAArch64GenInstrInfo.inc3699 STLLRH = 3684,
9586 …deledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #3684 = STLLRH
DAArch64GenAsmMatcher.inc17379 …{ 4681 /* stllrh */, AArch64::STLLRH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32,…
23848 …{ 4681 /* stllrh */, AArch64::STLLRH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32,…
DAArch64GenDisassemblerTables.inc6264 /* 29378 */ MCD::OPC_Decode, 228, 28, 145, 1, // Opcode: STLLRH
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2486 def STLLRH : StoreRelease <0b01, 1, 0, 0, 0, GPR32, "stllrh">;