| /external/swiftshader/third_party/LLVM/include/llvm/ADT/ |
| D | SmallBitVector.h | 30 class SmallBitVector {
58 SmallBitVector &TheVector;
62 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {} in reference()
78 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
136 SmallBitVector() : X(1) {} in SmallBitVector() function
140 explicit SmallBitVector(unsigned s, bool t = false) {
148 SmallBitVector(const SmallBitVector &RHS) { in SmallBitVector() function
155 ~SmallBitVector() { in ~SmallBitVector()
280 SmallBitVector &set() { in set()
288 SmallBitVector &set(unsigned Idx) { in set()
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| /external/llvm/include/llvm/ADT/ |
| D | SmallBitVector.h | 28 class SmallBitVector {
60 SmallBitVector &TheVector;
64 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {} in reference()
82 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
140 SmallBitVector() : X(1) {} in SmallBitVector() function
144 explicit SmallBitVector(unsigned s, bool t = false) {
152 SmallBitVector(const SmallBitVector &RHS) { in SmallBitVector() function
159 SmallBitVector(SmallBitVector &&RHS) : X(RHS.X) { in SmallBitVector() function
163 ~SmallBitVector() { in ~SmallBitVector()
275 SmallBitVector &set() { in set()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
| D | SmallBitVector.h | 35 class SmallBitVector {
68 SmallBitVector &TheVector;
72 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {} in reference()
90 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
146 SmallBitVector() = default;
150 explicit SmallBitVector(unsigned s, bool t = false) {
158 SmallBitVector(const SmallBitVector &RHS) { in SmallBitVector() function
165 SmallBitVector(SmallBitVector &&RHS) : X(RHS.X) { in SmallBitVector() function
169 ~SmallBitVector() { in ~SmallBitVector()
174 using const_set_bits_iterator = const_set_bits_iterator_impl<SmallBitVector>;
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegAlloc.h | 36 void scan(const SmallBitVector &RegMask, bool Randomized);
66 SmallBitVector RegMask;
67 SmallBitVector RegMaskUnfiltered;
68 SmallBitVector Free;
69 SmallBitVector FreeUnfiltered;
70 SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping
108 void assignFinalRegisters(const SmallBitVector &RegMaskFull,
109 const SmallBitVector &PreDefinedRegisters,
131 llvm::SmallVector<const SmallBitVector *, REGS_SIZE> RegAliases;
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| D | IceBitVector.h | 37 class SmallBitVector {
44 SmallBitVector(const SmallBitVector &BV) { *this = BV; } in SmallBitVector() function
46 SmallBitVector &operator=(const SmallBitVector &BV) {
54 SmallBitVector() { reset(); } in SmallBitVector() function
56 explicit SmallBitVector(SizeT S) : SmallBitVector() { in SmallBitVector() function
78 friend class SmallBitVector;
140 SmallBitVector operator&(const SmallBitVector &Rhs) const {
142 SmallBitVector Ret(std::max(size(), Rhs.size()));
149 SmallBitVector operator~() const {
150 SmallBitVector Ret = *this;
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| D | IceTargetLoweringX8664Traits.h | 484 std::array<SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
485 std::array<SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases) {
486 SmallBitVector IntegerRegistersI64(RegisterSet::Reg_NUM);
487 SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
488 SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
489 SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
490 SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
491 SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
492 SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM);
493 SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM);
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| D | IceTargetLoweringX8632Traits.h | 456 std::array<SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
457 std::array<SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases) {
458 SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
459 SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
460 SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
461 SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
462 SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
463 SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM);
464 SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM);
465 SmallBitVector Trunc16To8Registers(RegisterSet::Reg_NUM);
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| D | IceTargetLowering.h | 294 virtual SmallBitVector getRegisterSet(RegSetMask Include,
298 virtual const SmallBitVector &
303 virtual const SmallBitVector &
305 virtual const SmallBitVector &getAliasesForRegister(RegNumT) const = 0;
308 void postRegallocSplitting(const SmallBitVector &RegMask);
312 const SmallBitVector &ExcludeRegisters,
396 GlobalContext *Ctx, int32_t NumRegs, SmallBitVector TypeToRegisterSet[],
466 SmallBitVector &RegsUsed, size_t *GlobalsSize,
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| D | IceTargetLowering.cpp | 130 void printRegisterSet(Ostream &Str, const SmallBitVector &Bitset, in printRegisterSet()
174 GlobalContext *Ctx, int32_t NumRegs, SmallBitVector TypeToRegisterSet[], in filterTypeToRegisterSet()
178 std::vector<SmallBitVector> UseSet(TypeToRegisterSetSize, in filterTypeToRegisterSet()
179 SmallBitVector(NumRegs)); in filterTypeToRegisterSet()
180 std::vector<SmallBitVector> ExcludeSet(TypeToRegisterSetSize, in filterTypeToRegisterSet()
181 SmallBitVector(NumRegs)); in filterTypeToRegisterSet()
197 std::vector<SmallBitVector> &RegSet) { in filterTypeToRegisterSet()
231 SmallBitVector *TypeBitSet = &TypeToRegisterSet[TypeIndex]; in filterTypeToRegisterSet()
232 SmallBitVector *UseBitSet = &UseSet[TypeIndex]; in filterTypeToRegisterSet()
233 SmallBitVector *ExcludeBitSet = &ExcludeSet[TypeIndex]; in filterTypeToRegisterSet()
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| D | IceTargetLoweringMIPS32.h | 70 SmallBitVector getRegisterSet(RegSetMask Include,
72 const SmallBitVector &
78 const SmallBitVector &
84 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
748 SmallBitVector GPRegsUsed;
753 SmallBitVector VFPRegsUsed;
800 const SmallBitVector &ExcludeRegisters,
848 static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
849 static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
850 static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
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| D | IceTargetLoweringARM32.h | 97 SmallBitVector getRegisterSet(RegSetMask Include,
99 const SmallBitVector &
110 const SmallBitVector &
116 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
316 const SmallBitVector &ExcludeRegisters,
1238 static SmallBitVector TypeToRegisterSet[RegARM32::RCARM32_NUM];
1239 static SmallBitVector TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
1240 static SmallBitVector RegisterAliases[RegARM32::Reg_NUM];
1241 SmallBitVector RegsUsed;
1279 SmallBitVector GPRegsUsed;
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| D | IceRegAlloc.cpp | 87 const SmallBitVector &RegMask, in findMinWeightIndex()
782 void LinearScan::assignFinalRegisters(const SmallBitVector &RegMaskFull, in assignFinalRegisters()
783 const SmallBitVector &PreDefinedRegisters, in assignFinalRegisters()
836 void LinearScan::scan(const SmallBitVector &RegMaskFull, bool Randomized) { in scan()
843 SmallBitVector PreDefinedRegisters(NumRegisters); in scan()
865 const SmallBitVector KillsMask = in scan()
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| D | IceTargetLoweringX8632.cpp | 128 std::array<SmallBitVector, RCX86_NUM>
132 std::array<SmallBitVector, RCX86_NUM>
136 std::array<SmallBitVector,
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| /external/swiftshader/third_party/LLVM/unittests/ADT/ |
| D | SmallBitVectorTest.cpp | 18 SmallBitVector Vec; in TEST()
42 SmallBitVector Inv = ~Vec; in TEST()
76 SmallBitVector Copy = Vec; in TEST()
77 SmallBitVector Alt(3, false); in TEST()
131 Inv = ~SmallBitVector(); in TEST()
149 SmallBitVector A; in TEST()
154 SmallBitVector B; in TEST()
188 SmallBitVector Vec(3); in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| D | DependenceAnalysis.h | 345 SmallBitVector Loops;
346 SmallBitVector GroupLoops;
347 SmallBitVector Group;
538 SmallBitVector &Loops) const;
544 SmallBitVector &Loops);
550 SmallBitVector &Loops);
590 SmallBitVector &Loops);
636 const SmallBitVector &Loops,
776 const SmallBitVector &Loops,
813 const SmallBitVector &Loops,
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| /external/llvm/include/llvm/Analysis/ |
| D | DependenceAnalysis.h | 355 SmallBitVector Loops;
356 SmallBitVector GroupLoops;
357 SmallBitVector Group;
548 SmallBitVector &Loops) const;
554 SmallBitVector &Loops);
560 SmallBitVector &Loops);
589 SmallBitVector &Loops);
635 const SmallBitVector &Loops,
775 const SmallBitVector &Loops,
812 const SmallBitVector &Loops,
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| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| D | FunctionSummary.h | 35 llvm::SmallBitVector VisitedBasicBlocks;
96 llvm::SmallBitVector &Blocks = I->second.VisitedBasicBlocks; in markVisitedBasicBlock()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 783 SmallBitVector &Loops) const { in collectCommonLoops()
869 SmallBitVector &Loops) { in checkSrcSubscript()
894 SmallBitVector &Loops) { in checkDstSubscript()
921 SmallBitVector &Loops) { in classifyPair()
922 SmallBitVector SrcLoops(MaxLevels + 1); in classifyPair()
923 SmallBitVector DstLoops(MaxLevels + 1); in classifyPair()
2274 const SmallBitVector &Loops, in testMIV()
2519 const SmallBitVector &Loops, in banerjeeMIVtest()
2600 const SmallBitVector &Loops, in exploreDirections()
3054 SmallBitVector &Loops, in propagate()
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| /external/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 768 SmallBitVector &Loops) const { in collectCommonLoops()
854 SmallBitVector &Loops) { in checkSrcSubscript()
879 SmallBitVector &Loops) { in checkDstSubscript()
906 SmallBitVector &Loops) { in classifyPair()
907 SmallBitVector SrcLoops(MaxLevels + 1); in classifyPair()
908 SmallBitVector DstLoops(MaxLevels + 1); in classifyPair()
2208 const SmallBitVector &Loops, in testMIV()
2453 const SmallBitVector &Loops, in banerjeeMIVtest()
2534 const SmallBitVector &Loops, in exploreDirections()
2982 SmallBitVector &Loops, in propagate()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfExpression.cpp | 136 SmallBitVector Coverage(RegSize, false); in AddMachineRegPiece()
145 SmallBitVector Intersection(RegSize, false); in AddMachineRegPiece()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | StatepointLowering.h | 108 SmallBitVector AllocatedStackSlots;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | StatepointLowering.h | 113 SmallBitVector AllocatedStackSlots;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfExpression.cpp | 130 SmallBitVector Coverage(RegSize, false); in addMachineReg()
141 SmallBitVector CurSubReg(RegSize, false); in addMachineReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineDominators.cpp | 99 SmallBitVector IsNewIDom(CriticalEdgesToSplit.size(), true); in applySplitCriticalEdges()
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| /external/llvm/lib/CodeGen/ |
| D | MachineDominators.cpp | 89 SmallBitVector IsNewIDom(CriticalEdgesToSplit.size(), true); in applySplitCriticalEdges()
|