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Searched refs:SrcRegs (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp337 SmallVector<unsigned, 2> SrcRegs, DstRegs; in narrowScalar() local
339 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalar()
352 DstRegs.push_back(SrcRegs[i]); in narrowScalar()
368 unsigned SegReg = SrcRegs[i]; in narrowScalar()
372 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset); in narrowScalar()
390 SmallVector<unsigned, 2> SrcRegs, DstRegs; in narrowScalar() local
392 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalar()
402 DstRegs.push_back(SrcRegs[i]); in narrowScalar()
434 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalar()
501 SmallVector<unsigned, 2> SrcRegs; in narrowScalar() local
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DIRTranslator.cpp508 ArrayRef<unsigned> SrcRegs = getOrCreateVRegs(*Src); in translateExtractValue() local
515 DstRegs[i] = SrcRegs[Idx++]; in translateExtractValue()
526 ArrayRef<unsigned> SrcRegs = getOrCreateVRegs(*Src); in translateInsertValue() local
534 DstRegs[i] = SrcRegs[i]; in translateInsertValue()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86MCInstLower.cpp1160 unsigned SrcRegs[] = {0, 0}; in LowerPATCHABLE_EVENT_CALL() local
1170 SrcRegs[I] = Op->getReg(); in LowerPATCHABLE_EVENT_CALL()
1171 if (SrcRegs[I] != DestRegs[I]) { in LowerPATCHABLE_EVENT_CALL()
1182 if (SrcRegs[I] != DestRegs[I]) in LowerPATCHABLE_EVENT_CALL()
1184 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1253 unsigned SrcRegs[] = {0, 0, 0}; in LowerPATCHABLE_TYPED_EVENT_CALL() local
1263 SrcRegs[I] = Op->getReg(); in LowerPATCHABLE_TYPED_EVENT_CALL()
1264 if (SrcRegs[I] != DestRegs[I]) { in LowerPATCHABLE_TYPED_EVENT_CALL()
1282 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp757 const SmallVectorImpl<RegSubRegPair> &SrcRegs, in insertPHI() argument
759 assert(!SrcRegs.empty() && "No sources to create a PHI instruction?"); in insertPHI()
761 const TargetRegisterClass *NewRC = MRI.getRegClass(SrcRegs[0].Reg); in insertPHI()
764 assert(SrcRegs[0].SubReg == 0 && "should not have subreg operand"); in insertPHI()
771 for (const RegSubRegPair &RegPair : SrcRegs) { in insertPHI()
/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp715 const SmallVectorImpl<TargetInstrInfo::RegSubRegPair> &SrcRegs, in insertPHI() argument
717 assert(!SrcRegs.empty() && "No sources to create a PHI instruction?"); in insertPHI()
719 const TargetRegisterClass *NewRC = MRI->getRegClass(SrcRegs[0].Reg); in insertPHI()
726 for (auto RegPair : SrcRegs) { in insertPHI()