| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | InlineSpiller.cpp | 148 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
150 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
171 int StackSlot; member in __anon9ee51dc80111::InlineSpiller
297 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
301 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
409 TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot, in hoistSpillInsideBB()
415 HSpiller.addToMergeableSpills(*MII, StackSlot, Original); in hoistSpillInsideBB()
468 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
474 if (HSpiller.rmFromMergeableSpills(MI, StackSlot)) in eliminateRedundantSpills()
693 if (InstrReg != Reg || FI != StackSlot) in coalesceStackAccess()
[all …]
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| /external/llvm/lib/CodeGen/ |
| D | InlineSpiller.cpp | 123 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
125 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
147 int StackSlot; member in __anonf7bb34900111::InlineSpiller
279 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
283 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
391 TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot, in hoistSpillInsideBB()
397 HSpiller.addToMergeableSpills(*MII, StackSlot, Original); in hoistSpillInsideBB()
450 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
456 if (HSpiller.rmFromMergeableSpills(MI, StackSlot)) in eliminateRedundantSpills()
665 if (InstrReg != Reg || FI != StackSlot) in coalesceStackAccess()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | InlineSpiller.cpp | 70 int StackSlot; member in __anonac620b3c0111::InlineSpiller
250 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
254 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
605 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) { in traceSiblingValue()
725 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot, in hoistSpill()
729 VRM.addSpillSlotUse(StackSlot, MII); in hoistSpill()
783 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
993 if (InstrReg != Reg || FI != StackSlot) in coalesceStackAccess()
1041 : TII.foldMemoryOperand(MI, FoldOps, StackSlot); in foldMemoryOperand()
1046 VRM.addSpillSlotUse(StackSlot, FoldMI); in foldMemoryOperand()
[all …]
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| D | VirtRegRewriter.cpp | 266 void ClobberSharingStackSlots(int StackSlot);
838 void AvailableSpills::ClobberSharingStackSlots(int StackSlot) { in ClobberSharingStackSlots() argument
840 SpillSlotsOrReMatsAvailable.find(StackSlot); in ClobberSharingStackSlots()
848 if (I->second != StackSlot) { in ClobberSharingStackSlots()
1143 int Idx, unsigned PhysReg, int StackSlot,
1601 int Idx, unsigned PhysReg, int StackSlot, in SpillRegToStackSlot() argument
1610 TII->storeRegToStackSlot(*MBB, llvm::next(MII), PhysReg, true, StackSlot, RC, in SpillRegToStackSlot()
1613 VRM->addSpillSlotUse(StackSlot, StoreMI); in SpillRegToStackSlot()
1652 Spills.ModifyStackSlotOrReMat(StackSlot); in SpillRegToStackSlot()
1654 Spills.addAvailable(StackSlot, PhysReg, isAvailable); in SpillRegToStackSlot()
[all …]
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| /external/v8/src/compiler/ |
| D | machine-operator.h | 602 const Operator* StackSlot(int size, int alignment = 0); in NON_EXPORTED_BASE()
603 const Operator* StackSlot(MachineRepresentation rep, int alignment = 0); in NON_EXPORTED_BASE()
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| D | machine-operator.cc | 939 const Operator* MachineOperatorBuilder::StackSlot(int size, int alignment) { in StackSlot() function in v8::internal::compiler::MachineOperatorBuilder
953 const Operator* MachineOperatorBuilder::StackSlot(MachineRepresentation rep, in StackSlot() function in v8::internal::compiler::MachineOperatorBuilder
955 return StackSlot(1 << ElementSizeLog2Of(rep), alignment); in StackSlot()
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| D | int64-lowering.cc | 610 machine()->StackSlot(MachineRepresentation::kWord64)); in LowerNode()
645 machine()->StackSlot(MachineRepresentation::kWord64)); in LowerNode()
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| D | raw-machine-assembler.h | 85 Node* StackSlot(MachineRepresentation rep, int alignment = 0) {
86 return AddNode(machine()->StackSlot(rep, alignment));
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| D | wasm-compiler.cc | 1741 graph()->NewNode(mcgraph()->machine()->StackSlot(input_type)); in BuildBitCountingCall()
1866 graph()->NewNode(mcgraph()->machine()->StackSlot(stack_slot_bytes)); in BuildCFuncInstruction()
1921 graph()->NewNode(mcgraph()->machine()->StackSlot(stack_slot_size)); in BuildIntToFloatConversionInstruction()
1968 graph()->NewNode(mcgraph()->machine()->StackSlot(stack_slot_size)); in BuildCcallConvertFloat()
2474 graph()->NewNode(mcgraph()->machine()->StackSlot(2 * sizeof(double))); in BuildDiv64Call()
3158 mcgraph()->machine()->StackSlot(sizeof(wasm::MemoryTracingInfo), kAlign)); in TraceMemoryOperation()
4645 : graph()->NewNode(mcgraph()->machine()->StackSlot( in BuildWasmInterpreterEntry()
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| D | opcodes.h | 599 V(StackSlot) \
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| D | simd-scalar-lowering.cc | 671 graph()->NewNode(machine()->StackSlot(MachineRepresentation::kFloat64)); in BuildF64Trunc()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 7612 SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); in LowerSINT_TO_FP() local
7614 StackSlot, in LowerSINT_TO_FP()
7617 return BuildFILD(Op, SrcVT, Chain, StackSlot, DAG); in LowerSINT_TO_FP()
7621 SDValue StackSlot, in BuildFILD() argument
7634 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(StackSlot); in BuildFILD()
7643 MMO = cast<LoadSDNode>(StackSlot)->getMemOperand(); in BuildFILD()
7644 StackSlot = StackSlot.getOperand(1); in BuildFILD()
7646 SDValue Ops[] = { Chain, StackSlot, DAG.getValueType(SrcVT) }; in BuildFILD()
7662 SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); in BuildFILD() local
7665 Chain, Result, StackSlot, DAG.getValueType(Op.getValueType()), InFlag in BuildFILD()
[all …]
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| D | X86ISelLowering.h | 717 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX86BaseImpl.h | 2621 Address StackSlot = in emitIAS() local
2623 Asm->movss(Ty, StackSlot, Traits::getEncodedXmm(Var->getRegNum())); in emitIAS()
2624 Asm->fld(Ty, StackSlot); in emitIAS()
2703 Address StackSlot = in emitIAS() local
2705 Asm->fstp(Ty, StackSlot); in emitIAS()
2706 Asm->movss(Ty, Traits::getEncodedXmm(Dest->getRegNum()), StackSlot); in emitIAS()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 988 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2274 SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64); in ExpandLegalINT_TO_FP() local
2278 StackSlot.getValueType()); in ExpandLegalINT_TO_FP()
2280 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP()
2281 SDValue Lo = DAG.getNode(ISD::ADD, dl, StackSlot.getValueType(), in ExpandLegalINT_TO_FP()
2282 StackSlot, WordOff); in ExpandLegalINT_TO_FP()
2306 SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, in ExpandLegalINT_TO_FP()
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| D | SelectionDAGBuilder.cpp | 2047 SDValue StackSlot = DAG.getLoad( in visitSPDescriptorParent() local
2063 Entry.Node = StackSlot; in visitSPDescriptorParent()
2096 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, Guard, StackSlot); in visitSPDescriptorParent()
2106 MVT::Other, StackSlot.getOperand(0), in visitSPDescriptorParent()
6721 SDValue StackSlot = in visitInlineAsm() local
6724 Chain, getCurSDLoc(), OpInfo.CallOperand, StackSlot, in visitInlineAsm()
6727 OpInfo.CallOperand = StackSlot; in visitInlineAsm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2309 SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64); in ExpandLegalINT_TO_FP() local
2313 StackSlot.getValueType()); in ExpandLegalINT_TO_FP()
2315 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP()
2316 SDValue Lo = DAG.getNode(ISD::ADD, dl, StackSlot.getValueType(), in ExpandLegalINT_TO_FP()
2317 StackSlot, WordOff); in ExpandLegalINT_TO_FP()
2340 DAG.getLoad(MVT::f64, dl, Store2, StackSlot, MachinePointerInfo()); in ExpandLegalINT_TO_FP()
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| D | SelectionDAGBuilder.cpp | 7187 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getFrameIndexTy(DL)); in getAddressForMemoryInput() local
7188 Chain = DAG.getStore(Chain, Location, OpInfo.CallOperand, StackSlot, in getAddressForMemoryInput()
7190 OpInfo.CallOperand = StackSlot; in getAddressForMemoryInput()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 1092 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
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| D | X86ISelLowering.cpp | 16293 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerSINT_TO_FP() local
16295 DAG.getEntryNode(), dl, ValueToStore, StackSlot, in LowerSINT_TO_FP()
16297 return BuildFILD(Op, SrcVT, Chain, StackSlot, DAG); in LowerSINT_TO_FP()
16301 SDValue StackSlot, in BuildFILD() argument
16314 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(StackSlot); in BuildFILD()
16322 MMO = cast<LoadSDNode>(StackSlot)->getMemOperand(); in BuildFILD()
16323 StackSlot = StackSlot.getOperand(1); in BuildFILD()
16325 SDValue Ops[] = { Chain, StackSlot, DAG.getValueType(SrcVT) }; in BuildFILD()
16341 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in BuildFILD() local
16344 Chain, Result, StackSlot, DAG.getValueType(Op.getValueType()), InFlag in BuildFILD()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2460 SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64); in ExpandLegalINT_TO_FP() local
2465 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP()
2467 TLI.getPointerTy(), StackSlot, WordOff); in ExpandLegalINT_TO_FP()
2491 SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, in ExpandLegalINT_TO_FP()
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| D | SelectionDAGBuilder.cpp | 5970 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); in visitInlineAsm() local
5972 OpInfo.CallOperand, StackSlot, in visitInlineAsm()
5975 OpInfo.CallOperand = StackSlot; in visitInlineAsm()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 3765 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerFLT_ROUNDS_() local
3767 StackSlot, MachinePointerInfo(), false, false,0); in LowerFLT_ROUNDS_()
3771 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four); in LowerFLT_ROUNDS_()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6895 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerFLT_ROUNDS_() local
6897 StackSlot, MachinePointerInfo(), false, false,0); in LowerFLT_ROUNDS_()
6901 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four); in LowerFLT_ROUNDS_()
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