| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 5261 SDValue SubVec = Op.getOperand(1); in insert1BitVector() local
5268 if (SubVec.isUndef()) in insert1BitVector()
5291 SubVec, Idx); in insert1BitVector()
5295 MVT SubVecVT = SubVec.getSimpleValueType(); in insert1BitVector()
5312 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideOpVT, in insert1BitVector()
5314 SubVec, ZeroIdx); in insert1BitVector()
5315 Op = DAG.getNode(ISD::OR, dl, WideOpVT, Vec, SubVec); in insert1BitVector()
5319 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideOpVT, in insert1BitVector()
5320 Undef, SubVec, ZeroIdx); in insert1BitVector()
5324 SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec, in insert1BitVector()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 924 SDValue SubVec = N->getOperand(1); in SplitVecRes_INSERT_SUBVECTOR() local
931 unsigned SubElems = SubVec.getValueType().getVectorNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
944 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx); in SplitVecRes_INSERT_SUBVECTOR()
958 Store = DAG.getStore(Store, dl, SubVec, SubVecPtr, MachinePointerInfo()); in SplitVecRes_INSERT_SUBVECTOR()
|
| D | DAGCombiner.cpp | 14925 SDValue SubVec = InsertVal.getOperand(0); in combineInsertEltToShuffle() local
14927 EVT SubVecVT = SubVec.getValueType(); in combineInsertEltToShuffle()
14956 ConcatOps[0] = SubVec; in combineInsertEltToShuffle()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 848 SDValue SubVec = N->getOperand(1); in SplitVecRes_INSERT_SUBVECTOR() local
856 unsigned SubElems = SubVec.getValueType().getVectorNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
869 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx); in SplitVecRes_INSERT_SUBVECTOR()
883 Store = DAG.getStore(Store, dl, SubVec, SubVecPtr, MachinePointerInfo(), in SplitVecRes_INSERT_SUBVECTOR()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 11968 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in PerformSTORECombine() local
11971 SDValue Ch = DAG.getStore(St->getChain(), DL, SubVec, BasePtr, in PerformSTORECombine()
14676 Value *SubVec = Builder.CreateExtractValue(VldN, Index); in lowerInterleavedLoad() local
14680 SubVec = Builder.CreateIntToPtr( in lowerInterleavedLoad()
14681 SubVec, VectorType::get(SV->getType()->getVectorElementType(), in lowerInterleavedLoad()
14684 SubVecs[SV].push_back(SubVec); in lowerInterleavedLoad()
14693 auto &SubVec = SubVecs[SVI]; in lowerInterleavedLoad() local
14695 SubVec.size() > 1 ? concatenateVectors(Builder, SubVec) : SubVec[0]; in lowerInterleavedLoad()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 8180 Value *SubVec = Builder.CreateExtractValue(LdN, Index); in lowerInterleavedLoad() local
8184 SubVec = Builder.CreateIntToPtr( in lowerInterleavedLoad()
8185 SubVec, VectorType::get(SVI->getType()->getVectorElementType(), in lowerInterleavedLoad()
8187 SubVecs[SVI].push_back(SubVec); in lowerInterleavedLoad()
8196 auto &SubVec = SubVecs[SVI]; in lowerInterleavedLoad() local
8198 SubVec.size() > 1 ? concatenateVectors(Builder, SubVec) : SubVec[0]; in lowerInterleavedLoad()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 10310 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in PerformSTORECombine() local
10313 SDValue Ch = DAG.getStore(St->getChain(), DL, SubVec, BasePtr, in PerformSTORECombine()
12625 Value *SubVec = Builder.CreateExtractValue(VldN, Index); in lowerInterleavedLoad() local
12629 SubVec = Builder.CreateIntToPtr(SubVec, SV->getType()); in lowerInterleavedLoad()
12631 SV->replaceAllUsesWith(SubVec); in lowerInterleavedLoad()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7139 Value *SubVec = Builder.CreateExtractValue(LdN, Index); in lowerInterleavedLoad() local
7143 SubVec = Builder.CreateIntToPtr(SubVec, SVI->getType()); in lowerInterleavedLoad()
7145 SVI->replaceAllUsesWith(SubVec); in lowerInterleavedLoad()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 7155 SDValue SubVec = Op.getNode()->getOperand(1); in LowerINSERT_SUBVECTOR() local
7159 && SubVec.getNode()->getValueType(0).getSizeInBits() == 128) { in LowerINSERT_SUBVECTOR()
7160 return Insert128BitVector(Vec, SubVec, Idx, DAG, dl); in LowerINSERT_SUBVECTOR()
13708 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, in PerformSTORECombine() local
13711 SDValue Ch = DAG.getStore(St->getChain(), dl, SubVec, Ptr, in PerformSTORECombine()
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