| /external/swiftshader/third_party/LLVM/lib/Target/ |
| D | TargetInstrInfo.cpp | 55 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
56 if (UOps) in getNumMicroOps()
57 return UOps; in getNumMicroOps()
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 79 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps() local
80 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
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| D | TargetInstrInfo.cpp | 1018 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
1019 if (UOps >= 0) in getNumMicroOps()
1020 return UOps; in getNumMicroOps()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 111 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps() local
112 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
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| D | TargetInstrInfo.cpp | 1077 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
1078 if (UOps >= 0) in getNumMicroOps()
1079 return UOps; in getNumMicroOps()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ScheduleBtVer2.td | 103 int Lat, list<int> Res = [], int UOps = 1> {
108 let NumMicroOps = UOps;
116 let NumMicroOps = UOps;
122 int Lat, list<int> Res = [], int UOps = 1> {
127 let NumMicroOps = UOps;
135 let NumMicroOps = UOps;
141 int Lat, list<int> Res = [2], int UOps = 2> {
146 let NumMicroOps = UOps;
154 let NumMicroOps = UOps;
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| D | X86ScheduleSLM.td | 60 int Lat, list<int> Res = [1], int UOps = 1,
66 let NumMicroOps = UOps;
74 let NumMicroOps = UOps;
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| D | X86ScheduleZnver1.td | 128 int Lat, list<int> Res = [], int UOps = 1,
134 let NumMicroOps = UOps;
142 let NumMicroOps = !add(UOps, LoadUOps);
149 int Lat, list<int> Res = [], int UOps = 1,
155 let NumMicroOps = UOps;
163 let NumMicroOps = !add(UOps, LoadUOps);
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| D | X86SchedSandyBridge.td | 81 int Lat, list<int> Res = [1], int UOps = 1,
87 let NumMicroOps = UOps;
95 let NumMicroOps = !add(UOps, 1);
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| D | X86Schedule.td | 25 int Lat, list<int> Res, int UOps> {
29 let NumMicroOps = UOps;
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| D | X86SchedHaswell.td | 91 int Lat, list<int> Res = [1], int UOps = 1,
97 let NumMicroOps = UOps;
105 let NumMicroOps = !add(UOps, 1);
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| D | X86SchedSkylakeClient.td | 85 int Lat, list<int> Res = [1], int UOps = 1,
91 let NumMicroOps = UOps;
99 let NumMicroOps = !add(UOps, 1);
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| D | X86SchedBroadwell.td | 86 int Lat, list<int> Res = [1], int UOps = 1,
92 let NumMicroOps = UOps;
100 let NumMicroOps = !add(UOps, 1);
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| D | X86SchedSkylakeServer.td | 85 int Lat, list<int> Res = [1], int UOps = 1,
91 let NumMicroOps = UOps;
99 let NumMicroOps = !add(UOps, 1);
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1983 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps() local
1984 if (UOps) in getNumMicroOps()
1985 return UOps; in getNumMicroOps()
2060 UOps = (NumRegs / 2); in getNumMicroOps()
2062 ++UOps; in getNumMicroOps()
2063 return UOps; in getNumMicroOps()
2065 UOps = (NumRegs / 2); in getNumMicroOps()
2071 ++UOps; in getNumMicroOps()
2072 return UOps; in getNumMicroOps()
2681 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps; in getInstrLatency() local
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2778 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt() local
2779 assert(UOps >= 0 && "bad # UOps"); in getNumMicroOpsSwiftLdSt()
2780 return UOps; in getNumMicroOpsSwiftLdSt()
3033 unsigned UOps = 1 + NumRegs; // 1 for address computation. in getNumMicroOpsSingleIssuePlusExtras() local
3059 ++UOps; // One for base register writeback. in getNumMicroOpsSingleIssuePlusExtras()
3064 UOps += 2; // One for base reg wb, one for write to pc. in getNumMicroOpsSingleIssuePlusExtras()
3067 return UOps; in getNumMicroOpsSingleIssuePlusExtras()
3163 unsigned UOps = (NumRegs / 2); in getNumMicroOps() local
3165 ++UOps; in getNumMicroOps()
3166 return UOps; in getNumMicroOps()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 3108 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt() local
3109 assert(UOps >= 0 && "bad # UOps"); in getNumMicroOpsSwiftLdSt()
3110 return UOps; in getNumMicroOpsSwiftLdSt()
3363 unsigned UOps = 1 + NumRegs; // 1 for address computation. in getNumMicroOpsSingleIssuePlusExtras() local
3389 ++UOps; // One for base register writeback. in getNumMicroOpsSingleIssuePlusExtras()
3394 UOps += 2; // One for base reg wb, one for write to pc. in getNumMicroOpsSingleIssuePlusExtras()
3397 return UOps; in getNumMicroOpsSingleIssuePlusExtras()
3493 unsigned UOps = (NumRegs / 2); in getNumMicroOps() local
3495 ++UOps; in getNumMicroOps()
3496 return UOps; in getNumMicroOps()
[all …]
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