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Searched refs:VEX_W (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFMA.td47 defm VFMADDPD : fma_forms<0x98, 0xA8, 0xB8, "vfmadd", "pd">, VEX_W;
49 defm VFMADDSUBPD : fma_forms<0x96, 0xA6, 0xB6, "vfmaddsub", "pd">, VEX_W;
51 defm VFMSUBADDPD : fma_forms<0x97, 0xA7, 0xB7, "vfmsubadd", "pd">, VEX_W;
53 defm VFMSUBPD : fma_forms<0x9A, 0xAA, 0xBA, "vfmsub", "pd">, VEX_W;
57 defm VFNMADDPD : fma_forms<0x9C, 0xAC, 0xBC, "vfnmadd", "pd">, VEX_W;
59 defm VFNMSUBPD : fma_forms<0x9E, 0xAE, 0xBE, "vfnmsub", "pd">, VEX_W;
DX86InstrFormats.td112 class VEX_W { bit hasVEX_WPrefix = 1; }
149 bit hasVEX_WPrefix = 0; // Does this inst set the VEX_W field?
509 : VPDI<o, F, outs, ins, asm, pattern>, VEX_W;
DX86InstrSSE.td1347 VEX_W, VEX_LIG;
1353 VEX, VEX_W, VEX_LIG;
1362 VEX_4V, VEX_W, VEX_LIG;
1368 VEX_4V, VEX_W, VEX_LIG;
1441 XD, VEX, VEX_W;
1450 "cvtsd2si\t{$src, $dst|$dst, $src}">, XD, VEX, VEX_W,
1463 VEX_W;
1468 VEX_4V, VEX_W;
1492 "cvttss2si">, XS, VEX, VEX_W;
1497 "cvttsd2si">, XD, VEX, VEX_W;
[all …]
/external/llvm/lib/Target/X86/
DX86InstrFMA.td107 loadv4f64, X86Fmadd, v2f64, v4f64>, VEX_W;
109 loadv4f64, X86Fmsub, v2f64, v4f64>, VEX_W;
112 v2f64, v4f64>, VEX_W;
115 v2f64, v4f64>, VEX_W;
127 loadv4f64, X86Fnmadd, v2f64, v4f64>, VEX_W;
130 v4f64>, VEX_W;
235 VEX_W;
276 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
282 (mem_frag addr:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
307 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_W, VEX_LIG, MemOp4;
[all …]
DX86InstrAVX512.td493 vinsert256_insert>, VEX_W, EVEX_V512;
499 vinsert128_insert>, VEX_W, EVEX_V256;
505 vinsert128_insert>, VEX_W, EVEX_V512;
655 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT4>;
667 VEX_W, EVEX_V256, EVEX_CD8<64, CD8VT2>;
673 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT2>;
877 avx512vl_f64_info>, VEX_W;
918 HasAVX512>, VEX_W;
959 avx512vl_i64_info, HasAVX512>, VEX_W;
977 v8i64_info, v4i64x_info>, VEX_W,
[all …]
DX86InstrXOP.td100 XOP_4V, VEX_W, Sched<[WriteVarVecShift, ReadAfterLd]>;
242 XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
257 []>, XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
281 XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
296 []>, XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
312 XOP_4V, VEX_I8IMM, VEX_W, MemOp4, VEX_L;
327 []>, XOP_4V, VEX_I8IMM, VEX_W, MemOp4, VEX_L;
364 VEX_W, MemOp4;
379 []>, VEX_W, MemOp4;
395 (i8 imm:$src4))))]>, VEX_W, MemOp4, VEX_L;
[all …]
DX86InstrFormats.td191 class VEX_W { bit hasVEX_WPrefix = 1; }
266 bit hasVEX_WPrefix = 0; // Does this inst set the VEX_W field?
283 bit hasMemOp4Prefix = 0; // Same bit as VEX_W, but used for swapping operands
912 : VS2I<o, F, outs, ins, asm, pattern, itin>, VEX_W;
DX86InstrShiftRotate.td894 defm RORX64 : bmi_rotate<"rorx{q}", GR64, i64mem>, VEX_W;
896 defm SARX64 : bmi_shift<"sarx{q}", GR64, i64mem>, T8XS, VEX_W;
898 defm SHRX64 : bmi_shift<"shrx{q}", GR64, i64mem>, T8XD, VEX_W;
900 defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem>, T8PD, VEX_W;
DX86InstrInfo.td2221 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
2223 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2225 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem>, VEX_W;
2268 int_x86_bmi_bextr_64, loadi64>, VEX_W;
2275 int_x86_bmi_bzhi_64, loadi64>, VEX_W;
2338 int_x86_bmi_pdep_64, loadi64>, T8XD, VEX_W;
2342 int_x86_bmi_pext_64, loadi64>, T8XS, VEX_W;
2372 i64immSExt32>, VEX_W;
2393 loadi64>, VEX_W;
DX86InstrSSE.td1488 XS, VEX, VEX_W, VEX_LIG;
1496 XD, VEX, VEX_W, VEX_LIG;
1522 XS, VEX_4V, VEX_W, VEX_LIG;
1526 XD, VEX_4V, VEX_W, VEX_LIG;
1643 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1659 VEX_W;
1666 VEX_4V, VEX_W;
1695 XS, VEX, VEX_W;
1702 XD, VEX, VEX_W;
1724 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86EVEX2VEXTablesEmitter.cpp114 uint64_t VEX_W = in operator ()() local
126 (!(EVEX_W == 2 || VEX_W == 2 || EVEX_W == VEX_W || in operator ()()
127 (EVEX_W == 3 && VEX_W == 0))) || in operator ()()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrFMA.td142 v4f64, SchedWriteFMA>, VEX_W;
145 v4f64, SchedWriteFMA>, VEX_W;
148 v2f64, v4f64, SchedWriteFMA>, VEX_W;
151 v2f64, v4f64, SchedWriteFMA>, VEX_W;
163 loadv4f64, X86Fnmadd, v2f64, v4f64, SchedWriteFMA>, VEX_W;
165 loadv4f64, X86Fnmsub, v2f64, v4f64, SchedWriteFMA>, VEX_W;
318 VR128, sdmem, sched>, VEX_W;
397 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG,
404 (mem_frag addr:$src3)))]>, VEX_W, VEX_LIG,
434 []>, VEX_W, VEX_LIG, Sched<[sched]>;
[all …]
DX86InstrAVX512.td576 vinsert256_insert, sched>, VEX_W, EVEX_V512;
592 VEX_W, EVEX_V512;
866 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT4>;
889 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT2>;
1329 X86VBroadcast, GR64, HasAVX512>, VEX_W;
1436 v8i64_info, v4i64x_info>, VEX_W,
1439 v8f64_info, v4f64x_info>, VEX_W,
1605 v8i64_info, v2i64x_info>, VEX_W,
1611 v8f64_info, v2f64x_info>, VEX_W,
1724 avx512vl_i64_info, VK8>, VEX_W;
[all …]
DX86InstrXOP.td109 XOP_4V, VEX_W, Sched<[sched.Folded, ReadAfterLd]>;
123 XOP_4V, VEX_W, Sched<[sched]>, FoldGenData<NAME#rr>;
314 XOP_4V, VEX_W, Sched<[sched.Folded, ReadAfterLd, ReadAfterLd]>;
334 []>, XOP_4V, VEX_W, Sched<[sched]>, FoldGenData<NAME#rrr>;
359 XOP_4V, VEX_W, Sched<[sched.Folded, ReadAfterLd, ReadAfterLd]>;
378 []>, XOP_4V, VEX_W, Sched<[sched]>, FoldGenData<NAME#rrr>;
406 (i8 imm:$src4))))]>, VEX_W,
426 []>, VEX_W, Sched<[sched]>, FoldGenData<NAME#rr>;
DX86InstrInfo.td2381 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
2383 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2385 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem>, VEX_W;
2433 X86bextr, loadi64, WriteBEXTR>, VEX_W;
2459 int_x86_bmi_bzhi_64, loadi64, WriteBZHI>, VEX_W;
2595 int_x86_bmi_pdep_64, loadi64>, T8XD, VEX_W;
2599 int_x86_bmi_pext_64, loadi64>, T8XS, VEX_W;
2630 i64immSExt32, WriteBEXTR>, VEX_W;
2652 i64mem, Sched>, VEX_W;
2686 [(int_x86_llwpcb GR64:$src)]>, XOP, XOP9, VEX_W;
[all …]
DX86InstrFormats.td209 class VEX_W { bits<2> VEX_WPrefix = 1; }
211 // Special version of VEX_W that can be changed to VEX.W==0 for EVEX2VEX.
299 bits<2> VEX_WPrefix = 0; // Does this inst set the VEX_W field?
957 : VS2I<o, F, outs, ins, asm, pattern>, VEX_W;
DX86InstrShiftRotate.td858 defm RORX64 : bmi_rotate<"rorx{q}", GR64, i64mem>, VEX_W;
860 defm SARX64 : bmi_shift<"sarx{q}", GR64, i64mem>, T8XS, VEX_W;
862 defm SHRX64 : bmi_shift<"shrx{q}", GR64, i64mem>, T8XD, VEX_W;
864 defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem>, T8PD, VEX_W;
DX86InstrSSE.td889 XS, VEX, VEX_W, VEX_LIG;
897 XD, VEX, VEX_W, VEX_LIG;
923 WriteCvtI2SS>, XS, VEX_4V, VEX_W, VEX_LIG;
927 WriteCvtI2SD>, XD, VEX_4V, VEX_W, VEX_LIG;
1045 WriteCvtSD2I>, XD, VEX, VEX_W, VEX_LIG;
1058 i64mem, "cvtsi2ss{q}", WriteCvtI2SS, 0>, XS, VEX_4V, VEX_W;
1062 i64mem, "cvtsi2sd{q}", WriteCvtI2SD, 0>, XD, VEX_4V, VEX_W;
1087 XS, VEX, VEX_W;
1094 XD, VEX, VEX_W;
1116 WriteCvtSS2I>, XS, VEX, VEX_W, VEX_LIG;
[all …]
DX86InstrArithmetic.td1244 defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8PS, VEX_4V, VEX_W;
1280 defm MULX64 : bmi_mulx<"mulx{q}", GR64, i64mem, WriteIMul64>, VEX_W;
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp418 unsigned char VEX_W = 0; in EmitVEXOpcodePrefix() local
455 if ((TSFlags >> X86II::VEXShift) & X86II::VEX_W) in EmitVEXOpcodePrefix()
456 VEX_W = 1; in EmitVEXOpcodePrefix()
608 if (VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { // 2 byte VEX prefix in EmitVEXOpcodePrefix()
617 EmitByte(LastByte | (VEX_W << 7), CurByte, OS); in EmitVEXOpcodePrefix()
DX86BaseInfo.h383 VEX_W = 1U << 1, enumerator
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp634 uint8_t VEX_W = (TSFlags & X86II::VEX_W) ? 1 : 0; in EmitVEXOpcodePrefix() local
909 if (Encoding == X86II::VEX && VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { in EmitVEXOpcodePrefix()
918 EmitByte(LastByte | (VEX_W << 7), CurByte, OS); in EmitVEXOpcodePrefix()
935 EmitByte((VEX_W << 7) | in EmitVEXOpcodePrefix()
DX86BaseInfo.h483 VEX_W = 1ULL << VEX_WShift, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp666 uint8_t VEX_W = (TSFlags & X86II::VEX_W) ? 1 : 0; in EmitVEXOpcodePrefix() local
982 if (Encoding == X86II::VEX && VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { in EmitVEXOpcodePrefix()
991 EmitByte(LastByte | (VEX_W << 7), CurByte, OS); in EmitVEXOpcodePrefix()
1008 EmitByte((VEX_W << 7) | in EmitVEXOpcodePrefix()
DX86BaseInfo.h536 VEX_W = 1ULL << VEX_WShift, enumerator

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