Searched refs:VSHF (Results 1 – 19 of 19) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MSA.txt | 32 and pck* instructions, this is matched from MipsISD::VSHF instead of 45 it lowers directly to MipsISD::VSHF instead of using common IR.
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D | MipsISelLowering.h | 228 VSHF, // Generic shuffle enumerator
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D | MipsSEISelLowering.cpp | 2153 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2160 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2239 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2957 return DAG.getNode(MipsISD::VSHF, DL, ResTy, MaskVec, Op1, Op0); in lowerVECTOR_SHUFFLE_VSHF()
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D | MipsISelLowering.cpp | 290 case MipsISD::VSHF: return "MipsISD::VSHF"; in getTargetNodeName()
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D | MipsMSAInstrInfo.td | 40 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
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/external/llvm/lib/Target/Mips/ |
D | MSA.txt | 32 and pck* instructions, this is matched from MipsISD::VSHF instead of 45 it lowers directly to MipsISD::VSHF instead of using common IR.
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D | MipsISelLowering.h | 182 VSHF, // Generic shuffle enumerator
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D | MipsSEISelLowering.cpp | 2110 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2117 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2160 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN() 2866 return DAG.getNode(MipsISD::VSHF, DL, ResTy, MaskVec, Op1, Op0); in lowerVECTOR_SHUFFLE_VSHF()
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D | MipsISelLowering.cpp | 212 case MipsISD::VSHF: return "MipsISD::VSHF"; in getTargetNodeName()
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D | MipsMSAInstrInfo.td | 48 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
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/external/v8/src/mips/ |
D | constants-mips.h | 886 VSHF = ((0U << 23) + 21), enumerator
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D | disasm-mips.cc | 2419 case VSHF: in DecodeTypeMsa3R()
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D | simulator-mips.cc | 5150 case VSHF: { in Msa3RInstrHelper_shuffle() 5236 case VSHF: in DecodeTypeMsa3R()
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D | assembler-mips.cc | 3492 V(vshf, VSHF) \
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/external/v8/src/mips64/ |
D | constants-mips64.h | 920 VSHF = ((0U << 23) + 21), enumerator
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D | disasm-mips64.cc | 2733 case VSHF: in DecodeTypeMsa3R()
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D | simulator-mips64.cc | 5374 case VSHF: { in Msa3RInstrHelper_shuffle() 5460 case VSHF: in DecodeTypeMsa3R()
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D | assembler-mips64.cc | 3810 V(vshf, VSHF) \
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenDAGISel.inc | 28365 /* 53279*/ /*SwitchOpcode*/ 124|128,2/*380*/, TARGET_VAL(MipsISD::VSHF),// ->53663
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