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Searched refs:clrsetbits_8 (Results 1 – 22 of 22) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Deth_hydra.c107 clrsetbits_8(&pixis->brdcfg1, mask, val); in hydra_mux_mdio()
499 clrsetbits_8(&pixis->brdcfg1, BRDCFG1_EMI2_SEL_MASK, in board_eth_init()
505 clrsetbits_8(&pixis->brdcfg1, BRDCFG1_EMI2_SEL_MASK, in board_eth_init()
Deth_superhydra.c112 clrsetbits_8(&pixis->brdcfg1, mask, val); in super_hydra_mux_mdio()
/external/u-boot/board/freescale/common/
Dpixis.c112 clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll); in set_px_mpxpll()
148 clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val); in set_px_corepll()
/external/u-boot/arch/sandbox/include/asm/
Dio.h110 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
166 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/board/freescale/p1022ds/
Dspl.c46 clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); in board_init_f()
Dp1022ds.c48 clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); in board_early_init_f()
/external/u-boot/arch/m68k/cpu/mcf5445x/
Dcpu_init.c414 clrsetbits_8(&gpio->par_simp0h, ~GPIO_PAR_SIMP0H_DAT_MASK, in fecpin_setclear()
416 clrsetbits_8(&gpio->pddr_g, ~GPIO_PDDR_G4_MASK, in fecpin_setclear()
/external/u-boot/arch/x86/cpu/ivybridge/
Dnorthbridge.c119 clrsetbits_8(MCHBAR_REG(0x5418), 0xf, 0x4); in northbridge_init()
Dlpc.c422 clrsetbits_8(RCB_REG(SPI_FREQ_SWSEQ), 7, fdod); in set_spi_speed()
/external/u-boot/lib/
Duuid.c249 clrsetbits_8(&uuid.clock_seq_hi_and_reserved, in gen_rand_uuid()
/external/u-boot/drivers/spi/
Dsh_qspi.c247 clrsetbits_8(&ss->regs->spbfcr, SPBFCR_TXTRG | SPBFCR_RXTRG, in spi_xfer()
Dbcm63xx_spi.c171 clrsetbits_8(priv->base + regs[SPI_CLK], in bcm63xx_spi_set_speed()
/external/u-boot/arch/nios2/include/asm/
Dio.h166 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/arc/include/asm/
Dio.h278 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/m68k/include/asm/
Dio.h245 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/x86/cpu/broadwell/
Dpch.c444 clrsetbits_8(MCHBAR_REG(MCH_PAIR), 0x7, 0x4); /* Fixed Priority */ in systemagent_init()
/external/u-boot/arch/sh/include/asm/
Dio.h232 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/x86/include/asm/
Dio.h129 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/powerpc/include/asm/
Dio.h283 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/nds32/include/asm/
Dio.h210 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/riscv/include/asm/
Dio.h228 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro
/external/u-boot/arch/arm/include/asm/
Dio.h193 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) macro