| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/ |
| D | prefixes-i386.txt | 27 0xf3 0xa6 #rep cmps
29 0xf3 0xa7 #repe cmps
35 0xf2 0xa6 #repne cmps
37 0xf2 0xa7 #repne cmps
|
| D | prefixes.txt | 24 0xf3 0xa6 #rep cmps
26 0xf3 0xa7 #repe cmps
32 0xf2 0xa6 #repne cmps
34 0xf2 0xa7 #repne cmps
|
| /external/google-breakpad/src/third_party/libdisasm/ |
| D | TODO | 24 * stos, cmps, scas, movs, ins, outs, lods -> OP_PTR
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | br-cond-not-merge.ll | 61 ; Check that cmps in different blocks are handled correctly by FindMergedConditions.
|
| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | disasm-a3xx.c | 821 OPC(2, OPC_CMPS_F, cmps.f),
833 OPC(2, OPC_CMPS_U, cmps.u),
834 OPC(2, OPC_CMPS_S, cmps.s),
|
| /external/python/cpython2/Python/ |
| D | ast.c | 1903 asdl_seq *cmps; in ast_for_expr() local
1907 cmps = asdl_seq_new(NCH(n) / 2, c->c_arena); in ast_for_expr()
1908 if (!cmps) { in ast_for_expr()
1925 asdl_seq_SET(cmps, i / 2, expression); in ast_for_expr()
1932 return Compare(expression, ops, cmps, LINENO(n), in ast_for_expr()
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax.s | 777 cmps word ptr [eax], word ptr [ebx] label
|
| /external/llvm/test/Transforms/InstSimplify/ |
| D | AndOrXor.ll | 254 ; PR27869 - Look through casts to eliminate cmps and bitwise logic.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | intel-syntax.s | 846 cmps word ptr [eax], word ptr [ebx] label
|
| /external/python/cpython3/Python/ |
| D | ast.c | 2609 asdl_seq *cmps; in ast_for_expr() local
2613 cmps = _Py_asdl_seq_new(NCH(n) / 2, c->c_arena); in ast_for_expr()
2614 if (!cmps) { in ast_for_expr()
2631 asdl_seq_SET(cmps, i / 2, expression); in ast_for_expr()
2638 return Compare(expression, ops, cmps, LINENO(n), in ast_for_expr()
|
| /external/elfutils/libcpu/ |
| D | ChangeLog | 332 Add parameters for cmps. Fix test and mov immediate.
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.td | 1348 "cmps{l|d}\t{$dst, $src|$src, $dst}", [], IIC_CMPS>, OpSize32;
2802 // cmps aliases. Mnemonic suffix being omitted because it's implicit
2804 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSB dstidx8:$dst, srcidx8:$src), 0>;
2805 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSW dstidx16:$dst, srcidx16:$src), 0>;
2806 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSL dstidx32:$dst, srcidx32:$src), 0>;
2807 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSQ dstidx64:$dst, srcidx64:$src), 0>, Requires…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.td | 1472 "cmps{l|d}\t{$dst, $src|$src, $dst}", []>, OpSize32;
3203 // cmps aliases. Mnemonic suffix being omitted because it's implicit
3205 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSB dstidx8:$dst, srcidx8:$src), 0, "intel">;
3206 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSW dstidx16:$dst, srcidx16:$src), 0, "intel">;
3207 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSL dstidx32:$dst, srcidx32:$src), 0, "intel">;
3208 def : InstAlias<"cmps\t{$dst, $src|$src, $dst}", (CMPSQ dstidx64:$dst, srcidx64:$src), 0, "intel">,…
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 420 #define CMPS_L CHOICE(cmpsl, cmpsl, _LTOG cmps)
421 #define CMPS_W CHOICE(cmpsw, cmpsw, _WTOG cmps)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/ |
| D | AndOrXor.ll | 470 ; PR27869 - Look through casts to eliminate cmps and bitwise logic.
|
| /external/elfutils/libcpu/defs/ |
| D | i386 | 147 1010011{w}:{RE}cmps{w} {es_di},{ds_si}
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.td | 836 def CMPS32 : I<0xA7, RawFrm, (outs), (ins), "cmps{l|d}", []>;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 6547 "mpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmp"
21907 …{ 1379 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 …
21908 …{ 1379 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 …
21909 …{ 1379 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcId…
21910 …{ 1379 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
|