1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Assembly Matcher Source Fragment                                           *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_ASSEMBLER_HEADER
11#undef GET_ASSEMBLER_HEADER
12  // This should be included into the middle of the declaration of
13  // your subclasses implementation of MCTargetAsmParser.
14  uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15  void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16                       const OperandVector &Operands);
17  void convertToMapAndConstraints(unsigned Kind,
18                           const OperandVector &Operands) override;
19  unsigned MatchInstructionImpl(const OperandVector &Operands,
20                                MCInst &Inst,
21                                uint64_t &ErrorInfo,
22                                bool matchingInlineAsm,
23                                unsigned VariantID = 0);
24#endif // GET_ASSEMBLER_HEADER_INFO
25
26
27#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
28#undef GET_OPERAND_DIAGNOSTIC_TYPES
29
30#endif // GET_OPERAND_DIAGNOSTIC_TYPES
31
32
33#ifdef GET_REGISTER_MATCHER
34#undef GET_REGISTER_MATCHER
35
36// Flags for subtarget features that participate in instruction matching.
37enum SubtargetFeatureFlag : uint8_t {
38  Feature_Not64BitMode = (1ULL << 4),
39  Feature_In64BitMode = (1ULL << 2),
40  Feature_In16BitMode = (1ULL << 0),
41  Feature_Not16BitMode = (1ULL << 3),
42  Feature_In32BitMode = (1ULL << 1),
43  Feature_None = 0
44};
45
46static unsigned MatchRegisterName(StringRef Name) {
47  switch (Name.size()) {
48  default: break;
49  case 2:	 // 33 strings to match.
50    switch (Name[0]) {
51    default: break;
52    case 'a':	 // 3 strings to match.
53      switch (Name[1]) {
54      default: break;
55      case 'h':	 // 1 string to match.
56        return 1;	 // "ah"
57      case 'l':	 // 1 string to match.
58        return 2;	 // "al"
59      case 'x':	 // 1 string to match.
60        return 3;	 // "ax"
61      }
62      break;
63    case 'b':	 // 4 strings to match.
64      switch (Name[1]) {
65      default: break;
66      case 'h':	 // 1 string to match.
67        return 4;	 // "bh"
68      case 'l':	 // 1 string to match.
69        return 5;	 // "bl"
70      case 'p':	 // 1 string to match.
71        return 6;	 // "bp"
72      case 'x':	 // 1 string to match.
73        return 9;	 // "bx"
74      }
75      break;
76    case 'c':	 // 4 strings to match.
77      switch (Name[1]) {
78      default: break;
79      case 'h':	 // 1 string to match.
80        return 10;	 // "ch"
81      case 'l':	 // 1 string to match.
82        return 11;	 // "cl"
83      case 's':	 // 1 string to match.
84        return 12;	 // "cs"
85      case 'x':	 // 1 string to match.
86        return 13;	 // "cx"
87      }
88      break;
89    case 'd':	 // 5 strings to match.
90      switch (Name[1]) {
91      default: break;
92      case 'h':	 // 1 string to match.
93        return 15;	 // "dh"
94      case 'i':	 // 1 string to match.
95        return 16;	 // "di"
96      case 'l':	 // 1 string to match.
97        return 19;	 // "dl"
98      case 's':	 // 1 string to match.
99        return 20;	 // "ds"
100      case 'x':	 // 1 string to match.
101        return 21;	 // "dx"
102      }
103      break;
104    case 'e':	 // 1 string to match.
105      if (Name[1] != 's')
106        break;
107      return 31;	 // "es"
108    case 'f':	 // 1 string to match.
109      if (Name[1] != 's')
110        break;
111      return 35;	 // "fs"
112    case 'g':	 // 1 string to match.
113      if (Name[1] != 's')
114        break;
115      return 36;	 // "gs"
116    case 'i':	 // 1 string to match.
117      if (Name[1] != 'p')
118        break;
119      return 46;	 // "ip"
120    case 'k':	 // 8 strings to match.
121      switch (Name[1]) {
122      default: break;
123      case '0':	 // 1 string to match.
124        return 109;	 // "k0"
125      case '1':	 // 1 string to match.
126        return 110;	 // "k1"
127      case '2':	 // 1 string to match.
128        return 111;	 // "k2"
129      case '3':	 // 1 string to match.
130        return 112;	 // "k3"
131      case '4':	 // 1 string to match.
132        return 113;	 // "k4"
133      case '5':	 // 1 string to match.
134        return 114;	 // "k5"
135      case '6':	 // 1 string to match.
136        return 115;	 // "k6"
137      case '7':	 // 1 string to match.
138        return 116;	 // "k7"
139      }
140      break;
141    case 'r':	 // 2 strings to match.
142      switch (Name[1]) {
143      default: break;
144      case '8':	 // 1 string to match.
145        return 125;	 // "r8"
146      case '9':	 // 1 string to match.
147        return 126;	 // "r9"
148      }
149      break;
150    case 's':	 // 3 strings to match.
151      switch (Name[1]) {
152      default: break;
153      case 'i':	 // 1 string to match.
154        return 57;	 // "si"
155      case 'p':	 // 1 string to match.
156        return 60;	 // "sp"
157      case 's':	 // 1 string to match.
158        return 63;	 // "ss"
159      }
160      break;
161    }
162    break;
163  case 3:	 // 73 strings to match.
164    switch (Name[0]) {
165    default: break;
166    case 'b':	 // 1 string to match.
167      if (memcmp(Name.data()+1, "pl", 2) != 0)
168        break;
169      return 8;	 // "bpl"
170    case 'c':	 // 10 strings to match.
171      if (Name[1] != 'r')
172        break;
173      switch (Name[2]) {
174      default: break;
175      case '0':	 // 1 string to match.
176        return 69;	 // "cr0"
177      case '1':	 // 1 string to match.
178        return 70;	 // "cr1"
179      case '2':	 // 1 string to match.
180        return 71;	 // "cr2"
181      case '3':	 // 1 string to match.
182        return 72;	 // "cr3"
183      case '4':	 // 1 string to match.
184        return 73;	 // "cr4"
185      case '5':	 // 1 string to match.
186        return 74;	 // "cr5"
187      case '6':	 // 1 string to match.
188        return 75;	 // "cr6"
189      case '7':	 // 1 string to match.
190        return 76;	 // "cr7"
191      case '8':	 // 1 string to match.
192        return 77;	 // "cr8"
193      case '9':	 // 1 string to match.
194        return 78;	 // "cr9"
195      }
196      break;
197    case 'd':	 // 11 strings to match.
198      switch (Name[1]) {
199      default: break;
200      case 'i':	 // 1 string to match.
201        if (Name[2] != 'l')
202          break;
203        return 18;	 // "dil"
204      case 'r':	 // 10 strings to match.
205        switch (Name[2]) {
206        default: break;
207        case '0':	 // 1 string to match.
208          return 85;	 // "dr0"
209        case '1':	 // 1 string to match.
210          return 86;	 // "dr1"
211        case '2':	 // 1 string to match.
212          return 87;	 // "dr2"
213        case '3':	 // 1 string to match.
214          return 88;	 // "dr3"
215        case '4':	 // 1 string to match.
216          return 89;	 // "dr4"
217        case '5':	 // 1 string to match.
218          return 90;	 // "dr5"
219        case '6':	 // 1 string to match.
220          return 91;	 // "dr6"
221        case '7':	 // 1 string to match.
222          return 92;	 // "dr7"
223        case '8':	 // 1 string to match.
224          return 93;	 // "dr8"
225        case '9':	 // 1 string to match.
226          return 94;	 // "dr9"
227        }
228        break;
229      }
230      break;
231    case 'e':	 // 10 strings to match.
232      switch (Name[1]) {
233      default: break;
234      case 'a':	 // 1 string to match.
235        if (Name[2] != 'x')
236          break;
237        return 22;	 // "eax"
238      case 'b':	 // 2 strings to match.
239        switch (Name[2]) {
240        default: break;
241        case 'p':	 // 1 string to match.
242          return 23;	 // "ebp"
243        case 'x':	 // 1 string to match.
244          return 24;	 // "ebx"
245        }
246        break;
247      case 'c':	 // 1 string to match.
248        if (Name[2] != 'x')
249          break;
250        return 25;	 // "ecx"
251      case 'd':	 // 2 strings to match.
252        switch (Name[2]) {
253        default: break;
254        case 'i':	 // 1 string to match.
255          return 26;	 // "edi"
256        case 'x':	 // 1 string to match.
257          return 27;	 // "edx"
258        }
259        break;
260      case 'i':	 // 2 strings to match.
261        switch (Name[2]) {
262        default: break;
263        case 'p':	 // 1 string to match.
264          return 29;	 // "eip"
265        case 'z':	 // 1 string to match.
266          return 30;	 // "eiz"
267        }
268        break;
269      case 's':	 // 2 strings to match.
270        switch (Name[2]) {
271        default: break;
272        case 'i':	 // 1 string to match.
273          return 32;	 // "esi"
274        case 'p':	 // 1 string to match.
275          return 33;	 // "esp"
276        }
277        break;
278      }
279      break;
280    case 'f':	 // 8 strings to match.
281      if (Name[1] != 'p')
282        break;
283      switch (Name[2]) {
284      default: break;
285      case '0':	 // 1 string to match.
286        return 101;	 // "fp0"
287      case '1':	 // 1 string to match.
288        return 102;	 // "fp1"
289      case '2':	 // 1 string to match.
290        return 103;	 // "fp2"
291      case '3':	 // 1 string to match.
292        return 104;	 // "fp3"
293      case '4':	 // 1 string to match.
294        return 105;	 // "fp4"
295      case '5':	 // 1 string to match.
296        return 106;	 // "fp5"
297      case '6':	 // 1 string to match.
298        return 107;	 // "fp6"
299      case '7':	 // 1 string to match.
300        return 108;	 // "fp7"
301      }
302      break;
303    case 'm':	 // 8 strings to match.
304      if (Name[1] != 'm')
305        break;
306      switch (Name[2]) {
307      default: break;
308      case '0':	 // 1 string to match.
309        return 117;	 // "mm0"
310      case '1':	 // 1 string to match.
311        return 118;	 // "mm1"
312      case '2':	 // 1 string to match.
313        return 119;	 // "mm2"
314      case '3':	 // 1 string to match.
315        return 120;	 // "mm3"
316      case '4':	 // 1 string to match.
317        return 121;	 // "mm4"
318      case '5':	 // 1 string to match.
319        return 122;	 // "mm5"
320      case '6':	 // 1 string to match.
321        return 123;	 // "mm6"
322      case '7':	 // 1 string to match.
323        return 124;	 // "mm7"
324      }
325      break;
326    case 'r':	 // 22 strings to match.
327      switch (Name[1]) {
328      default: break;
329      case '1':	 // 6 strings to match.
330        switch (Name[2]) {
331        default: break;
332        case '0':	 // 1 string to match.
333          return 127;	 // "r10"
334        case '1':	 // 1 string to match.
335          return 128;	 // "r11"
336        case '2':	 // 1 string to match.
337          return 129;	 // "r12"
338        case '3':	 // 1 string to match.
339          return 130;	 // "r13"
340        case '4':	 // 1 string to match.
341          return 131;	 // "r14"
342        case '5':	 // 1 string to match.
343          return 132;	 // "r15"
344        }
345        break;
346      case '8':	 // 3 strings to match.
347        switch (Name[2]) {
348        default: break;
349        case 'b':	 // 1 string to match.
350          return 237;	 // "r8b"
351        case 'd':	 // 1 string to match.
352          return 253;	 // "r8d"
353        case 'w':	 // 1 string to match.
354          return 261;	 // "r8w"
355        }
356        break;
357      case '9':	 // 3 strings to match.
358        switch (Name[2]) {
359        default: break;
360        case 'b':	 // 1 string to match.
361          return 238;	 // "r9b"
362        case 'd':	 // 1 string to match.
363          return 254;	 // "r9d"
364        case 'w':	 // 1 string to match.
365          return 262;	 // "r9w"
366        }
367        break;
368      case 'a':	 // 1 string to match.
369        if (Name[2] != 'x')
370          break;
371        return 47;	 // "rax"
372      case 'b':	 // 2 strings to match.
373        switch (Name[2]) {
374        default: break;
375        case 'p':	 // 1 string to match.
376          return 48;	 // "rbp"
377        case 'x':	 // 1 string to match.
378          return 49;	 // "rbx"
379        }
380        break;
381      case 'c':	 // 1 string to match.
382        if (Name[2] != 'x')
383          break;
384        return 50;	 // "rcx"
385      case 'd':	 // 2 strings to match.
386        switch (Name[2]) {
387        default: break;
388        case 'i':	 // 1 string to match.
389          return 51;	 // "rdi"
390        case 'x':	 // 1 string to match.
391          return 52;	 // "rdx"
392        }
393        break;
394      case 'i':	 // 2 strings to match.
395        switch (Name[2]) {
396        default: break;
397        case 'p':	 // 1 string to match.
398          return 53;	 // "rip"
399        case 'z':	 // 1 string to match.
400          return 54;	 // "riz"
401        }
402        break;
403      case 's':	 // 2 strings to match.
404        switch (Name[2]) {
405        default: break;
406        case 'i':	 // 1 string to match.
407          return 55;	 // "rsi"
408        case 'p':	 // 1 string to match.
409          return 56;	 // "rsp"
410        }
411        break;
412      }
413      break;
414    case 's':	 // 3 strings to match.
415      switch (Name[1]) {
416      default: break;
417      case 'i':	 // 1 string to match.
418        if (Name[2] != 'l')
419          break;
420        return 59;	 // "sil"
421      case 'p':	 // 1 string to match.
422        if (Name[2] != 'l')
423          break;
424        return 62;	 // "spl"
425      case 's':	 // 1 string to match.
426        if (Name[2] != 'p')
427          break;
428        return 64;	 // "ssp"
429      }
430      break;
431    }
432    break;
433  case 4:	 // 65 strings to match.
434    switch (Name[0]) {
435    default: break;
436    case 'b':	 // 4 strings to match.
437      if (memcmp(Name.data()+1, "nd", 2) != 0)
438        break;
439      switch (Name[3]) {
440      default: break;
441      case '0':	 // 1 string to match.
442        return 65;	 // "bnd0"
443      case '1':	 // 1 string to match.
444        return 66;	 // "bnd1"
445      case '2':	 // 1 string to match.
446        return 67;	 // "bnd2"
447      case '3':	 // 1 string to match.
448        return 68;	 // "bnd3"
449      }
450      break;
451    case 'c':	 // 6 strings to match.
452      if (memcmp(Name.data()+1, "r1", 2) != 0)
453        break;
454      switch (Name[3]) {
455      default: break;
456      case '0':	 // 1 string to match.
457        return 79;	 // "cr10"
458      case '1':	 // 1 string to match.
459        return 80;	 // "cr11"
460      case '2':	 // 1 string to match.
461        return 81;	 // "cr12"
462      case '3':	 // 1 string to match.
463        return 82;	 // "cr13"
464      case '4':	 // 1 string to match.
465        return 83;	 // "cr14"
466      case '5':	 // 1 string to match.
467        return 84;	 // "cr15"
468      }
469      break;
470    case 'd':	 // 6 strings to match.
471      if (memcmp(Name.data()+1, "r1", 2) != 0)
472        break;
473      switch (Name[3]) {
474      default: break;
475      case '0':	 // 1 string to match.
476        return 95;	 // "dr10"
477      case '1':	 // 1 string to match.
478        return 96;	 // "dr11"
479      case '2':	 // 1 string to match.
480        return 97;	 // "dr12"
481      case '3':	 // 1 string to match.
482        return 98;	 // "dr13"
483      case '4':	 // 1 string to match.
484        return 99;	 // "dr14"
485      case '5':	 // 1 string to match.
486        return 100;	 // "dr15"
487      }
488      break;
489    case 'f':	 // 1 string to match.
490      if (memcmp(Name.data()+1, "psw", 3) != 0)
491        break;
492      return 34;	 // "fpsw"
493    case 'r':	 // 18 strings to match.
494      if (Name[1] != '1')
495        break;
496      switch (Name[2]) {
497      default: break;
498      case '0':	 // 3 strings to match.
499        switch (Name[3]) {
500        default: break;
501        case 'b':	 // 1 string to match.
502          return 239;	 // "r10b"
503        case 'd':	 // 1 string to match.
504          return 255;	 // "r10d"
505        case 'w':	 // 1 string to match.
506          return 263;	 // "r10w"
507        }
508        break;
509      case '1':	 // 3 strings to match.
510        switch (Name[3]) {
511        default: break;
512        case 'b':	 // 1 string to match.
513          return 240;	 // "r11b"
514        case 'd':	 // 1 string to match.
515          return 256;	 // "r11d"
516        case 'w':	 // 1 string to match.
517          return 264;	 // "r11w"
518        }
519        break;
520      case '2':	 // 3 strings to match.
521        switch (Name[3]) {
522        default: break;
523        case 'b':	 // 1 string to match.
524          return 241;	 // "r12b"
525        case 'd':	 // 1 string to match.
526          return 257;	 // "r12d"
527        case 'w':	 // 1 string to match.
528          return 265;	 // "r12w"
529        }
530        break;
531      case '3':	 // 3 strings to match.
532        switch (Name[3]) {
533        default: break;
534        case 'b':	 // 1 string to match.
535          return 242;	 // "r13b"
536        case 'd':	 // 1 string to match.
537          return 258;	 // "r13d"
538        case 'w':	 // 1 string to match.
539          return 266;	 // "r13w"
540        }
541        break;
542      case '4':	 // 3 strings to match.
543        switch (Name[3]) {
544        default: break;
545        case 'b':	 // 1 string to match.
546          return 243;	 // "r14b"
547        case 'd':	 // 1 string to match.
548          return 259;	 // "r14d"
549        case 'w':	 // 1 string to match.
550          return 267;	 // "r14w"
551        }
552        break;
553      case '5':	 // 3 strings to match.
554        switch (Name[3]) {
555        default: break;
556        case 'b':	 // 1 string to match.
557          return 244;	 // "r15b"
558        case 'd':	 // 1 string to match.
559          return 260;	 // "r15d"
560        case 'w':	 // 1 string to match.
561          return 268;	 // "r15w"
562        }
563        break;
564      }
565      break;
566    case 'x':	 // 10 strings to match.
567      if (memcmp(Name.data()+1, "mm", 2) != 0)
568        break;
569      switch (Name[3]) {
570      default: break;
571      case '0':	 // 1 string to match.
572        return 141;	 // "xmm0"
573      case '1':	 // 1 string to match.
574        return 142;	 // "xmm1"
575      case '2':	 // 1 string to match.
576        return 143;	 // "xmm2"
577      case '3':	 // 1 string to match.
578        return 144;	 // "xmm3"
579      case '4':	 // 1 string to match.
580        return 145;	 // "xmm4"
581      case '5':	 // 1 string to match.
582        return 146;	 // "xmm5"
583      case '6':	 // 1 string to match.
584        return 147;	 // "xmm6"
585      case '7':	 // 1 string to match.
586        return 148;	 // "xmm7"
587      case '8':	 // 1 string to match.
588        return 149;	 // "xmm8"
589      case '9':	 // 1 string to match.
590        return 150;	 // "xmm9"
591      }
592      break;
593    case 'y':	 // 10 strings to match.
594      if (memcmp(Name.data()+1, "mm", 2) != 0)
595        break;
596      switch (Name[3]) {
597      default: break;
598      case '0':	 // 1 string to match.
599        return 173;	 // "ymm0"
600      case '1':	 // 1 string to match.
601        return 174;	 // "ymm1"
602      case '2':	 // 1 string to match.
603        return 175;	 // "ymm2"
604      case '3':	 // 1 string to match.
605        return 176;	 // "ymm3"
606      case '4':	 // 1 string to match.
607        return 177;	 // "ymm4"
608      case '5':	 // 1 string to match.
609        return 178;	 // "ymm5"
610      case '6':	 // 1 string to match.
611        return 179;	 // "ymm6"
612      case '7':	 // 1 string to match.
613        return 180;	 // "ymm7"
614      case '8':	 // 1 string to match.
615        return 181;	 // "ymm8"
616      case '9':	 // 1 string to match.
617        return 182;	 // "ymm9"
618      }
619      break;
620    case 'z':	 // 10 strings to match.
621      if (memcmp(Name.data()+1, "mm", 2) != 0)
622        break;
623      switch (Name[3]) {
624      default: break;
625      case '0':	 // 1 string to match.
626        return 205;	 // "zmm0"
627      case '1':	 // 1 string to match.
628        return 206;	 // "zmm1"
629      case '2':	 // 1 string to match.
630        return 207;	 // "zmm2"
631      case '3':	 // 1 string to match.
632        return 208;	 // "zmm3"
633      case '4':	 // 1 string to match.
634        return 209;	 // "zmm4"
635      case '5':	 // 1 string to match.
636        return 210;	 // "zmm5"
637      case '6':	 // 1 string to match.
638        return 211;	 // "zmm6"
639      case '7':	 // 1 string to match.
640        return 212;	 // "zmm7"
641      case '8':	 // 1 string to match.
642        return 213;	 // "zmm8"
643      case '9':	 // 1 string to match.
644        return 214;	 // "zmm9"
645      }
646      break;
647    }
648    break;
649  case 5:	 // 75 strings to match.
650    switch (Name[0]) {
651    default: break;
652    case 'f':	 // 1 string to match.
653      if (memcmp(Name.data()+1, "lags", 4) != 0)
654        break;
655      return 28;	 // "flags"
656    case 's':	 // 8 strings to match.
657      if (memcmp(Name.data()+1, "t(", 2) != 0)
658        break;
659      switch (Name[3]) {
660      default: break;
661      case '0':	 // 1 string to match.
662        if (Name[4] != ')')
663          break;
664        return 133;	 // "st(0)"
665      case '1':	 // 1 string to match.
666        if (Name[4] != ')')
667          break;
668        return 134;	 // "st(1)"
669      case '2':	 // 1 string to match.
670        if (Name[4] != ')')
671          break;
672        return 135;	 // "st(2)"
673      case '3':	 // 1 string to match.
674        if (Name[4] != ')')
675          break;
676        return 136;	 // "st(3)"
677      case '4':	 // 1 string to match.
678        if (Name[4] != ')')
679          break;
680        return 137;	 // "st(4)"
681      case '5':	 // 1 string to match.
682        if (Name[4] != ')')
683          break;
684        return 138;	 // "st(5)"
685      case '6':	 // 1 string to match.
686        if (Name[4] != ')')
687          break;
688        return 139;	 // "st(6)"
689      case '7':	 // 1 string to match.
690        if (Name[4] != ')')
691          break;
692        return 140;	 // "st(7)"
693      }
694      break;
695    case 'x':	 // 22 strings to match.
696      if (memcmp(Name.data()+1, "mm", 2) != 0)
697        break;
698      switch (Name[3]) {
699      default: break;
700      case '1':	 // 10 strings to match.
701        switch (Name[4]) {
702        default: break;
703        case '0':	 // 1 string to match.
704          return 151;	 // "xmm10"
705        case '1':	 // 1 string to match.
706          return 152;	 // "xmm11"
707        case '2':	 // 1 string to match.
708          return 153;	 // "xmm12"
709        case '3':	 // 1 string to match.
710          return 154;	 // "xmm13"
711        case '4':	 // 1 string to match.
712          return 155;	 // "xmm14"
713        case '5':	 // 1 string to match.
714          return 156;	 // "xmm15"
715        case '6':	 // 1 string to match.
716          return 157;	 // "xmm16"
717        case '7':	 // 1 string to match.
718          return 158;	 // "xmm17"
719        case '8':	 // 1 string to match.
720          return 159;	 // "xmm18"
721        case '9':	 // 1 string to match.
722          return 160;	 // "xmm19"
723        }
724        break;
725      case '2':	 // 10 strings to match.
726        switch (Name[4]) {
727        default: break;
728        case '0':	 // 1 string to match.
729          return 161;	 // "xmm20"
730        case '1':	 // 1 string to match.
731          return 162;	 // "xmm21"
732        case '2':	 // 1 string to match.
733          return 163;	 // "xmm22"
734        case '3':	 // 1 string to match.
735          return 164;	 // "xmm23"
736        case '4':	 // 1 string to match.
737          return 165;	 // "xmm24"
738        case '5':	 // 1 string to match.
739          return 166;	 // "xmm25"
740        case '6':	 // 1 string to match.
741          return 167;	 // "xmm26"
742        case '7':	 // 1 string to match.
743          return 168;	 // "xmm27"
744        case '8':	 // 1 string to match.
745          return 169;	 // "xmm28"
746        case '9':	 // 1 string to match.
747          return 170;	 // "xmm29"
748        }
749        break;
750      case '3':	 // 2 strings to match.
751        switch (Name[4]) {
752        default: break;
753        case '0':	 // 1 string to match.
754          return 171;	 // "xmm30"
755        case '1':	 // 1 string to match.
756          return 172;	 // "xmm31"
757        }
758        break;
759      }
760      break;
761    case 'y':	 // 22 strings to match.
762      if (memcmp(Name.data()+1, "mm", 2) != 0)
763        break;
764      switch (Name[3]) {
765      default: break;
766      case '1':	 // 10 strings to match.
767        switch (Name[4]) {
768        default: break;
769        case '0':	 // 1 string to match.
770          return 183;	 // "ymm10"
771        case '1':	 // 1 string to match.
772          return 184;	 // "ymm11"
773        case '2':	 // 1 string to match.
774          return 185;	 // "ymm12"
775        case '3':	 // 1 string to match.
776          return 186;	 // "ymm13"
777        case '4':	 // 1 string to match.
778          return 187;	 // "ymm14"
779        case '5':	 // 1 string to match.
780          return 188;	 // "ymm15"
781        case '6':	 // 1 string to match.
782          return 189;	 // "ymm16"
783        case '7':	 // 1 string to match.
784          return 190;	 // "ymm17"
785        case '8':	 // 1 string to match.
786          return 191;	 // "ymm18"
787        case '9':	 // 1 string to match.
788          return 192;	 // "ymm19"
789        }
790        break;
791      case '2':	 // 10 strings to match.
792        switch (Name[4]) {
793        default: break;
794        case '0':	 // 1 string to match.
795          return 193;	 // "ymm20"
796        case '1':	 // 1 string to match.
797          return 194;	 // "ymm21"
798        case '2':	 // 1 string to match.
799          return 195;	 // "ymm22"
800        case '3':	 // 1 string to match.
801          return 196;	 // "ymm23"
802        case '4':	 // 1 string to match.
803          return 197;	 // "ymm24"
804        case '5':	 // 1 string to match.
805          return 198;	 // "ymm25"
806        case '6':	 // 1 string to match.
807          return 199;	 // "ymm26"
808        case '7':	 // 1 string to match.
809          return 200;	 // "ymm27"
810        case '8':	 // 1 string to match.
811          return 201;	 // "ymm28"
812        case '9':	 // 1 string to match.
813          return 202;	 // "ymm29"
814        }
815        break;
816      case '3':	 // 2 strings to match.
817        switch (Name[4]) {
818        default: break;
819        case '0':	 // 1 string to match.
820          return 203;	 // "ymm30"
821        case '1':	 // 1 string to match.
822          return 204;	 // "ymm31"
823        }
824        break;
825      }
826      break;
827    case 'z':	 // 22 strings to match.
828      if (memcmp(Name.data()+1, "mm", 2) != 0)
829        break;
830      switch (Name[3]) {
831      default: break;
832      case '1':	 // 10 strings to match.
833        switch (Name[4]) {
834        default: break;
835        case '0':	 // 1 string to match.
836          return 215;	 // "zmm10"
837        case '1':	 // 1 string to match.
838          return 216;	 // "zmm11"
839        case '2':	 // 1 string to match.
840          return 217;	 // "zmm12"
841        case '3':	 // 1 string to match.
842          return 218;	 // "zmm13"
843        case '4':	 // 1 string to match.
844          return 219;	 // "zmm14"
845        case '5':	 // 1 string to match.
846          return 220;	 // "zmm15"
847        case '6':	 // 1 string to match.
848          return 221;	 // "zmm16"
849        case '7':	 // 1 string to match.
850          return 222;	 // "zmm17"
851        case '8':	 // 1 string to match.
852          return 223;	 // "zmm18"
853        case '9':	 // 1 string to match.
854          return 224;	 // "zmm19"
855        }
856        break;
857      case '2':	 // 10 strings to match.
858        switch (Name[4]) {
859        default: break;
860        case '0':	 // 1 string to match.
861          return 225;	 // "zmm20"
862        case '1':	 // 1 string to match.
863          return 226;	 // "zmm21"
864        case '2':	 // 1 string to match.
865          return 227;	 // "zmm22"
866        case '3':	 // 1 string to match.
867          return 228;	 // "zmm23"
868        case '4':	 // 1 string to match.
869          return 229;	 // "zmm24"
870        case '5':	 // 1 string to match.
871          return 230;	 // "zmm25"
872        case '6':	 // 1 string to match.
873          return 231;	 // "zmm26"
874        case '7':	 // 1 string to match.
875          return 232;	 // "zmm27"
876        case '8':	 // 1 string to match.
877          return 233;	 // "zmm28"
878        case '9':	 // 1 string to match.
879          return 234;	 // "zmm29"
880        }
881        break;
882      case '3':	 // 2 strings to match.
883        switch (Name[4]) {
884        default: break;
885        case '0':	 // 1 string to match.
886          return 235;	 // "zmm30"
887        case '1':	 // 1 string to match.
888          return 236;	 // "zmm31"
889        }
890        break;
891      }
892      break;
893    }
894    break;
895  case 7:	 // 1 string to match.
896    if (memcmp(Name.data()+0, "dirflag", 7) != 0)
897      break;
898    return 14;	 // "dirflag"
899  }
900  return 0;
901}
902
903#endif // GET_REGISTER_MATCHER
904
905
906#ifdef GET_SUBTARGET_FEATURE_NAME
907#undef GET_SUBTARGET_FEATURE_NAME
908
909// User-level names for subtarget features that participate in
910// instruction matching.
911static const char *getSubtargetFeatureName(uint64_t Val) {
912  switch(Val) {
913  case Feature_Not64BitMode: return "Not 64-bit mode";
914  case Feature_In64BitMode: return "64-bit mode";
915  case Feature_In16BitMode: return "16-bit mode";
916  case Feature_Not16BitMode: return "Not 16-bit mode";
917  case Feature_In32BitMode: return "32-bit mode";
918  default: return "(unknown)";
919  }
920}
921
922#endif // GET_SUBTARGET_FEATURE_NAME
923
924
925#ifdef GET_MATCHER_IMPLEMENTATION
926#undef GET_MATCHER_IMPLEMENTATION
927
928static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
929  switch (VariantID) {
930    case 0:
931      switch (Mnemonic.size()) {
932      default: break;
933      case 3:	 // 6 strings to match.
934        switch (Mnemonic[0]) {
935        default: break;
936        case 'c':	 // 4 strings to match.
937          switch (Mnemonic[1]) {
938          default: break;
939          case 'b':	 // 1 string to match.
940            if (Mnemonic[2] != 'w')
941              break;
942            Mnemonic = "cbtw";	 // "cbw"
943            return;
944          case 'd':	 // 1 string to match.
945            if (Mnemonic[2] != 'q')
946              break;
947            Mnemonic = "cltd";	 // "cdq"
948            return;
949          case 'q':	 // 1 string to match.
950            if (Mnemonic[2] != 'o')
951              break;
952            Mnemonic = "cqto";	 // "cqo"
953            return;
954          case 'w':	 // 1 string to match.
955            if (Mnemonic[2] != 'd')
956              break;
957            Mnemonic = "cwtd";	 // "cwd"
958            return;
959          }
960          break;
961        case 'p':	 // 1 string to match.
962          if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
963            break;
964          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pop"
965            Mnemonic = "popw";
966          else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
967            Mnemonic = "popl";
968          else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
969            Mnemonic = "popq";
970          return;
971        case 'r':	 // 1 string to match.
972          if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
973            break;
974          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "ret"
975            Mnemonic = "retw";
976          else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
977            Mnemonic = "retl";
978          else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
979            Mnemonic = "retq";
980          return;
981        }
982        break;
983      case 4:	 // 18 strings to match.
984        switch (Mnemonic[0]) {
985        default: break;
986        case 'c':	 // 3 strings to match.
987          switch (Mnemonic[1]) {
988          default: break;
989          case 'a':	 // 1 string to match.
990            if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
991              break;
992            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "call"
993              Mnemonic = "callw";
994            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
995              Mnemonic = "calll";
996            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
997              Mnemonic = "callq";
998            return;
999          case 'd':	 // 1 string to match.
1000            if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
1001              break;
1002            Mnemonic = "cltq";	 // "cdqe"
1003            return;
1004          case 'w':	 // 1 string to match.
1005            if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
1006              break;
1007            Mnemonic = "cwtl";	 // "cwde"
1008            return;
1009          }
1010          break;
1011        case 'i':	 // 1 string to match.
1012          if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
1013            break;
1014          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "iret"
1015            Mnemonic = "iretw";
1016          else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1017            Mnemonic = "iretl";
1018          return;
1019        case 'l':	 // 3 strings to match.
1020          switch (Mnemonic[1]) {
1021          default: break;
1022          case 'g':	 // 1 string to match.
1023            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1024              break;
1025            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lgdt"
1026              Mnemonic = "lgdtw";
1027            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1028              Mnemonic = "lgdtl";
1029            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1030              Mnemonic = "lgdtq";
1031            return;
1032          case 'i':	 // 1 string to match.
1033            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1034              break;
1035            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lidt"
1036              Mnemonic = "lidtw";
1037            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1038              Mnemonic = "lidtl";
1039            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1040              Mnemonic = "lidtq";
1041            return;
1042          case 'r':	 // 1 string to match.
1043            if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
1044              break;
1045            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lret"
1046              Mnemonic = "lretw";
1047            else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1048              Mnemonic = "lretl";
1049            return;
1050          }
1051          break;
1052        case 'p':	 // 3 strings to match.
1053          switch (Mnemonic[1]) {
1054          default: break;
1055          case 'o':	 // 2 strings to match.
1056            if (Mnemonic[2] != 'p')
1057              break;
1058            switch (Mnemonic[3]) {
1059            default: break;
1060            case 'a':	 // 1 string to match.
1061              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popa"
1062                Mnemonic = "popaw";
1063              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1064                Mnemonic = "popal";
1065              return;
1066            case 'f':	 // 1 string to match.
1067              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popf"
1068                Mnemonic = "popfw";
1069              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1070                Mnemonic = "popfl";
1071              else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1072                Mnemonic = "popfq";
1073              return;
1074            }
1075            break;
1076          case 'u':	 // 1 string to match.
1077            if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1078              break;
1079            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "push"
1080              Mnemonic = "pushw";
1081            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1082              Mnemonic = "pushl";
1083            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1084              Mnemonic = "pushq";
1085            return;
1086          }
1087          break;
1088        case 'r':	 // 1 string to match.
1089          if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1090            break;
1091          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "retn"
1092            Mnemonic = "retw";
1093          else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1094            Mnemonic = "retl";
1095          else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1096            Mnemonic = "retq";
1097          return;
1098        case 's':	 // 6 strings to match.
1099          switch (Mnemonic[1]) {
1100          default: break;
1101          case 'a':	 // 4 strings to match.
1102            if (Mnemonic[2] != 'l')
1103              break;
1104            switch (Mnemonic[3]) {
1105            default: break;
1106            case 'b':	 // 1 string to match.
1107              Mnemonic = "shlb";	 // "salb"
1108              return;
1109            case 'l':	 // 1 string to match.
1110              Mnemonic = "shll";	 // "sall"
1111              return;
1112            case 'q':	 // 1 string to match.
1113              Mnemonic = "shlq";	 // "salq"
1114              return;
1115            case 'w':	 // 1 string to match.
1116              Mnemonic = "shlw";	 // "salw"
1117              return;
1118            }
1119            break;
1120          case 'g':	 // 1 string to match.
1121            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1122              break;
1123            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sgdt"
1124              Mnemonic = "sgdtw";
1125            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1126              Mnemonic = "sgdtl";
1127            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1128              Mnemonic = "sgdtq";
1129            return;
1130          case 'i':	 // 1 string to match.
1131            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1132              break;
1133            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sidt"
1134              Mnemonic = "sidtw";
1135            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1136              Mnemonic = "sidtl";
1137            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1138              Mnemonic = "sidtq";
1139            return;
1140          }
1141          break;
1142        case 'u':	 // 1 string to match.
1143          if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
1144            break;
1145          Mnemonic = "ud2";	 // "ud2a"
1146          return;
1147        }
1148        break;
1149      case 5:	 // 9 strings to match.
1150        switch (Mnemonic[0]) {
1151        default: break;
1152        case 'f':	 // 1 string to match.
1153          if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
1154            break;
1155          Mnemonic = "fildll";	 // "fildq"
1156          return;
1157        case 'p':	 // 3 strings to match.
1158          switch (Mnemonic[1]) {
1159          default: break;
1160          case 'o':	 // 1 string to match.
1161            if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
1162              break;
1163            Mnemonic = "popfl";	 // "popfd"
1164            return;
1165          case 'u':	 // 2 strings to match.
1166            if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1167              break;
1168            switch (Mnemonic[4]) {
1169            default: break;
1170            case 'a':	 // 1 string to match.
1171              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pusha"
1172                Mnemonic = "pushaw";
1173              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1174                Mnemonic = "pushal";
1175              return;
1176            case 'f':	 // 1 string to match.
1177              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pushf"
1178                Mnemonic = "pushfw";
1179              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1180                Mnemonic = "pushfl";
1181              else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1182                Mnemonic = "pushfq";
1183              return;
1184            }
1185            break;
1186          }
1187          break;
1188        case 's':	 // 4 strings to match.
1189          if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1190            break;
1191          switch (Mnemonic[4]) {
1192          default: break;
1193          case 'b':	 // 1 string to match.
1194            Mnemonic = "movsb";	 // "smovb"
1195            return;
1196          case 'l':	 // 1 string to match.
1197            Mnemonic = "movsl";	 // "smovl"
1198            return;
1199          case 'q':	 // 1 string to match.
1200            Mnemonic = "movsq";	 // "smovq"
1201            return;
1202          case 'w':	 // 1 string to match.
1203            Mnemonic = "movsw";	 // "smovw"
1204            return;
1205          }
1206          break;
1207        case 'v':	 // 1 string to match.
1208          if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
1209            break;
1210          Mnemonic = "verr";	 // "verrw"
1211          return;
1212        }
1213        break;
1214      case 6:	 // 15 strings to match.
1215        switch (Mnemonic[0]) {
1216        default: break;
1217        case 'c':	 // 6 strings to match.
1218          if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1219            break;
1220          switch (Mnemonic[4]) {
1221          default: break;
1222          case 'c':	 // 3 strings to match.
1223            switch (Mnemonic[5]) {
1224            default: break;
1225            case 'l':	 // 1 string to match.
1226              Mnemonic = "cmovbl";	 // "cmovcl"
1227              return;
1228            case 'q':	 // 1 string to match.
1229              Mnemonic = "cmovbq";	 // "cmovcq"
1230              return;
1231            case 'w':	 // 1 string to match.
1232              Mnemonic = "cmovbw";	 // "cmovcw"
1233              return;
1234            }
1235            break;
1236          case 'z':	 // 3 strings to match.
1237            switch (Mnemonic[5]) {
1238            default: break;
1239            case 'l':	 // 1 string to match.
1240              Mnemonic = "cmovel";	 // "cmovzl"
1241              return;
1242            case 'q':	 // 1 string to match.
1243              Mnemonic = "cmoveq";	 // "cmovzq"
1244              return;
1245            case 'w':	 // 1 string to match.
1246              Mnemonic = "cmovew";	 // "cmovzw"
1247              return;
1248            }
1249            break;
1250          }
1251          break;
1252        case 'f':	 // 4 strings to match.
1253          switch (Mnemonic[1]) {
1254          default: break;
1255          case 'c':	 // 2 strings to match.
1256            if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1257              break;
1258            switch (Mnemonic[5]) {
1259            default: break;
1260            case 'a':	 // 1 string to match.
1261              Mnemonic = "fcmovnbe";	 // "fcmova"
1262              return;
1263            case 'z':	 // 1 string to match.
1264              Mnemonic = "fcmove";	 // "fcmovz"
1265              return;
1266            }
1267            break;
1268          case 'i':	 // 1 string to match.
1269            if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
1270              break;
1271            Mnemonic = "fistpll";	 // "fistpq"
1272            return;
1273          case 'l':	 // 1 string to match.
1274            if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
1275              break;
1276            Mnemonic = "fldcw";	 // "fldcww"
1277            return;
1278          }
1279          break;
1280        case 'l':	 // 2 strings to match.
1281          if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
1282            break;
1283          switch (Mnemonic[5]) {
1284          default: break;
1285          case 'l':	 // 1 string to match.
1286            if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "leavel"
1287              Mnemonic = "leave";
1288            return;
1289          case 'q':	 // 1 string to match.
1290            if ((Features & Feature_In64BitMode) == Feature_In64BitMode)	 // "leaveq"
1291              Mnemonic = "leave";
1292            return;
1293          }
1294          break;
1295        case 'p':	 // 1 string to match.
1296          if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
1297            break;
1298          Mnemonic = "pushfl";	 // "pushfd"
1299          return;
1300        case 's':	 // 1 string to match.
1301          if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
1302            break;
1303          Mnemonic = "sysretl";	 // "sysret"
1304          return;
1305        case 'x':	 // 1 string to match.
1306          if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
1307            break;
1308          Mnemonic = "xsave64";	 // "xsaveq"
1309          return;
1310        }
1311        break;
1312      case 7:	 // 34 strings to match.
1313        switch (Mnemonic[0]) {
1314        default: break;
1315        case 'c':	 // 24 strings to match.
1316          if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1317            break;
1318          switch (Mnemonic[4]) {
1319          default: break;
1320          case 'n':	 // 18 strings to match.
1321            switch (Mnemonic[5]) {
1322            default: break;
1323            case 'a':	 // 3 strings to match.
1324              switch (Mnemonic[6]) {
1325              default: break;
1326              case 'l':	 // 1 string to match.
1327                Mnemonic = "cmovbel";	 // "cmovnal"
1328                return;
1329              case 'q':	 // 1 string to match.
1330                Mnemonic = "cmovbeq";	 // "cmovnaq"
1331                return;
1332              case 'w':	 // 1 string to match.
1333                Mnemonic = "cmovbew";	 // "cmovnaw"
1334                return;
1335              }
1336              break;
1337            case 'b':	 // 3 strings to match.
1338              switch (Mnemonic[6]) {
1339              default: break;
1340              case 'l':	 // 1 string to match.
1341                Mnemonic = "cmovael";	 // "cmovnbl"
1342                return;
1343              case 'q':	 // 1 string to match.
1344                Mnemonic = "cmovaeq";	 // "cmovnbq"
1345                return;
1346              case 'w':	 // 1 string to match.
1347                Mnemonic = "cmovaew";	 // "cmovnbw"
1348                return;
1349              }
1350              break;
1351            case 'c':	 // 3 strings to match.
1352              switch (Mnemonic[6]) {
1353              default: break;
1354              case 'l':	 // 1 string to match.
1355                Mnemonic = "cmovael";	 // "cmovncl"
1356                return;
1357              case 'q':	 // 1 string to match.
1358                Mnemonic = "cmovaeq";	 // "cmovncq"
1359                return;
1360              case 'w':	 // 1 string to match.
1361                Mnemonic = "cmovaew";	 // "cmovncw"
1362                return;
1363              }
1364              break;
1365            case 'g':	 // 3 strings to match.
1366              switch (Mnemonic[6]) {
1367              default: break;
1368              case 'l':	 // 1 string to match.
1369                Mnemonic = "cmovlel";	 // "cmovngl"
1370                return;
1371              case 'q':	 // 1 string to match.
1372                Mnemonic = "cmovleq";	 // "cmovngq"
1373                return;
1374              case 'w':	 // 1 string to match.
1375                Mnemonic = "cmovlew";	 // "cmovngw"
1376                return;
1377              }
1378              break;
1379            case 'l':	 // 3 strings to match.
1380              switch (Mnemonic[6]) {
1381              default: break;
1382              case 'l':	 // 1 string to match.
1383                Mnemonic = "cmovgel";	 // "cmovnll"
1384                return;
1385              case 'q':	 // 1 string to match.
1386                Mnemonic = "cmovgeq";	 // "cmovnlq"
1387                return;
1388              case 'w':	 // 1 string to match.
1389                Mnemonic = "cmovgew";	 // "cmovnlw"
1390                return;
1391              }
1392              break;
1393            case 'z':	 // 3 strings to match.
1394              switch (Mnemonic[6]) {
1395              default: break;
1396              case 'l':	 // 1 string to match.
1397                Mnemonic = "cmovnel";	 // "cmovnzl"
1398                return;
1399              case 'q':	 // 1 string to match.
1400                Mnemonic = "cmovneq";	 // "cmovnzq"
1401                return;
1402              case 'w':	 // 1 string to match.
1403                Mnemonic = "cmovnew";	 // "cmovnzw"
1404                return;
1405              }
1406              break;
1407            }
1408            break;
1409          case 'p':	 // 6 strings to match.
1410            switch (Mnemonic[5]) {
1411            default: break;
1412            case 'e':	 // 3 strings to match.
1413              switch (Mnemonic[6]) {
1414              default: break;
1415              case 'l':	 // 1 string to match.
1416                Mnemonic = "cmovpl";	 // "cmovpel"
1417                return;
1418              case 'q':	 // 1 string to match.
1419                Mnemonic = "cmovpq";	 // "cmovpeq"
1420                return;
1421              case 'w':	 // 1 string to match.
1422                Mnemonic = "cmovpw";	 // "cmovpew"
1423                return;
1424              }
1425              break;
1426            case 'o':	 // 3 strings to match.
1427              switch (Mnemonic[6]) {
1428              default: break;
1429              case 'l':	 // 1 string to match.
1430                Mnemonic = "cmovnpl";	 // "cmovpol"
1431                return;
1432              case 'q':	 // 1 string to match.
1433                Mnemonic = "cmovnpq";	 // "cmovpoq"
1434                return;
1435              case 'w':	 // 1 string to match.
1436                Mnemonic = "cmovnpw";	 // "cmovpow"
1437                return;
1438              }
1439              break;
1440            }
1441            break;
1442          }
1443          break;
1444        case 'f':	 // 6 strings to match.
1445          switch (Mnemonic[1]) {
1446          default: break;
1447          case 'c':	 // 2 strings to match.
1448            if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1449              break;
1450            switch (Mnemonic[5]) {
1451            default: break;
1452            case 'a':	 // 1 string to match.
1453              if (Mnemonic[6] != 'e')
1454                break;
1455              Mnemonic = "fcmovnb";	 // "fcmovae"
1456              return;
1457            case 'n':	 // 1 string to match.
1458              if (Mnemonic[6] != 'a')
1459                break;
1460              Mnemonic = "fcmovbe";	 // "fcmovna"
1461              return;
1462            }
1463            break;
1464          case 'i':	 // 1 string to match.
1465            if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
1466              break;
1467            Mnemonic = "fisttpll";	 // "fisttpq"
1468            return;
1469          case 'n':	 // 2 strings to match.
1470            if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
1471              break;
1472            switch (Mnemonic[4]) {
1473            default: break;
1474            case 'c':	 // 1 string to match.
1475              if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1476                break;
1477              Mnemonic = "fnstcw";	 // "fnstcww"
1478              return;
1479            case 's':	 // 1 string to match.
1480              if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1481                break;
1482              Mnemonic = "fnstsw";	 // "fnstsww"
1483              return;
1484            }
1485            break;
1486          case 'x':	 // 1 string to match.
1487            if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
1488              break;
1489            Mnemonic = "fxsave64";	 // "fxsaveq"
1490            return;
1491          }
1492          break;
1493        case 's':	 // 1 string to match.
1494          if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
1495            break;
1496          Mnemonic = "sysexitl";	 // "sysexit"
1497          return;
1498        case 'x':	 // 3 strings to match.
1499          switch (Mnemonic[1]) {
1500          default: break;
1501          case 'r':	 // 1 string to match.
1502            if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
1503              break;
1504            Mnemonic = "xrstor64";	 // "xrstorq"
1505            return;
1506          case 's':	 // 2 strings to match.
1507            if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
1508              break;
1509            switch (Mnemonic[5]) {
1510            default: break;
1511            case 'c':	 // 1 string to match.
1512              if (Mnemonic[6] != 'q')
1513                break;
1514              Mnemonic = "xsavec64";	 // "xsavecq"
1515              return;
1516            case 's':	 // 1 string to match.
1517              if (Mnemonic[6] != 'q')
1518                break;
1519              Mnemonic = "xsaves64";	 // "xsavesq"
1520              return;
1521            }
1522            break;
1523          }
1524          break;
1525        }
1526        break;
1527      case 8:	 // 15 strings to match.
1528        switch (Mnemonic[0]) {
1529        default: break;
1530        case 'c':	 // 12 strings to match.
1531          if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1532            break;
1533          switch (Mnemonic[5]) {
1534          default: break;
1535          case 'a':	 // 3 strings to match.
1536            if (Mnemonic[6] != 'e')
1537              break;
1538            switch (Mnemonic[7]) {
1539            default: break;
1540            case 'l':	 // 1 string to match.
1541              Mnemonic = "cmovbl";	 // "cmovnael"
1542              return;
1543            case 'q':	 // 1 string to match.
1544              Mnemonic = "cmovbq";	 // "cmovnaeq"
1545              return;
1546            case 'w':	 // 1 string to match.
1547              Mnemonic = "cmovbw";	 // "cmovnaew"
1548              return;
1549            }
1550            break;
1551          case 'b':	 // 3 strings to match.
1552            if (Mnemonic[6] != 'e')
1553              break;
1554            switch (Mnemonic[7]) {
1555            default: break;
1556            case 'l':	 // 1 string to match.
1557              Mnemonic = "cmoval";	 // "cmovnbel"
1558              return;
1559            case 'q':	 // 1 string to match.
1560              Mnemonic = "cmovaq";	 // "cmovnbeq"
1561              return;
1562            case 'w':	 // 1 string to match.
1563              Mnemonic = "cmovaw";	 // "cmovnbew"
1564              return;
1565            }
1566            break;
1567          case 'g':	 // 3 strings to match.
1568            if (Mnemonic[6] != 'e')
1569              break;
1570            switch (Mnemonic[7]) {
1571            default: break;
1572            case 'l':	 // 1 string to match.
1573              Mnemonic = "cmovll";	 // "cmovngel"
1574              return;
1575            case 'q':	 // 1 string to match.
1576              Mnemonic = "cmovlq";	 // "cmovngeq"
1577              return;
1578            case 'w':	 // 1 string to match.
1579              Mnemonic = "cmovlw";	 // "cmovngew"
1580              return;
1581            }
1582            break;
1583          case 'l':	 // 3 strings to match.
1584            if (Mnemonic[6] != 'e')
1585              break;
1586            switch (Mnemonic[7]) {
1587            default: break;
1588            case 'l':	 // 1 string to match.
1589              Mnemonic = "cmovgl";	 // "cmovnlel"
1590              return;
1591            case 'q':	 // 1 string to match.
1592              Mnemonic = "cmovgq";	 // "cmovnleq"
1593              return;
1594            case 'w':	 // 1 string to match.
1595              Mnemonic = "cmovgw";	 // "cmovnlew"
1596              return;
1597            }
1598            break;
1599          }
1600          break;
1601        case 'f':	 // 2 strings to match.
1602          switch (Mnemonic[1]) {
1603          default: break;
1604          case 'c':	 // 1 string to match.
1605            if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
1606              break;
1607            Mnemonic = "fcmovb";	 // "fcmovnae"
1608            return;
1609          case 'x':	 // 1 string to match.
1610            if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
1611              break;
1612            Mnemonic = "fxrstor64";	 // "fxrstorq"
1613            return;
1614          }
1615          break;
1616        case 'x':	 // 1 string to match.
1617          if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
1618            break;
1619          Mnemonic = "xrstors64";	 // "xrstorsq"
1620          return;
1621        }
1622        break;
1623      case 9:	 // 1 string to match.
1624        if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
1625          break;
1626        Mnemonic = "xsaveopt64";	 // "xsaveoptq"
1627        return;
1628      }
1629    break;
1630    case 1:
1631      switch (Mnemonic.size()) {
1632      default: break;
1633      case 3:	 // 1 string to match.
1634        if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
1635          break;
1636        Mnemonic = "shl";	 // "sal"
1637        return;
1638      case 4:	 // 7 strings to match.
1639        switch (Mnemonic[0]) {
1640        default: break;
1641        case 'l':	 // 2 strings to match.
1642          switch (Mnemonic[1]) {
1643          default: break;
1644          case 'g':	 // 1 string to match.
1645            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1646              break;
1647            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lgdt"
1648              Mnemonic = "lgdtw";
1649            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1650              Mnemonic = "lgdtd";
1651            return;
1652          case 'i':	 // 1 string to match.
1653            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1654              break;
1655            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lidt"
1656              Mnemonic = "lidtw";
1657            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1658              Mnemonic = "lidtd";
1659            return;
1660          }
1661          break;
1662        case 'p':	 // 2 strings to match.
1663          if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
1664            break;
1665          switch (Mnemonic[3]) {
1666          default: break;
1667          case 'a':	 // 1 string to match.
1668            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popa"
1669              Mnemonic = "popaw";
1670            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1671              Mnemonic = "popal";
1672            return;
1673          case 'f':	 // 1 string to match.
1674            if ((Features & Feature_In64BitMode) == Feature_In64BitMode)	 // "popf"
1675              Mnemonic = "popfq";
1676            return;
1677          }
1678          break;
1679        case 'r':	 // 1 string to match.
1680          if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1681            break;
1682          Mnemonic = "ret";	 // "retn"
1683          return;
1684        case 's':	 // 2 strings to match.
1685          switch (Mnemonic[1]) {
1686          default: break;
1687          case 'g':	 // 1 string to match.
1688            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1689              break;
1690            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sgdt"
1691              Mnemonic = "sgdtw";
1692            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1693              Mnemonic = "sgdtd";
1694            return;
1695          case 'i':	 // 1 string to match.
1696            if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1697              break;
1698            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sidt"
1699              Mnemonic = "sidtw";
1700            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1701              Mnemonic = "sidtd";
1702            return;
1703          }
1704          break;
1705        }
1706        break;
1707      case 5:	 // 5 strings to match.
1708        switch (Mnemonic[0]) {
1709        default: break;
1710        case 'c':	 // 2 strings to match.
1711          if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1712            break;
1713          switch (Mnemonic[4]) {
1714          default: break;
1715          case 'c':	 // 1 string to match.
1716            Mnemonic = "cmovb";	 // "cmovc"
1717            return;
1718          case 'z':	 // 1 string to match.
1719            Mnemonic = "cmove";	 // "cmovz"
1720            return;
1721          }
1722          break;
1723        case 'p':	 // 3 strings to match.
1724          switch (Mnemonic[1]) {
1725          default: break;
1726          case 'o':	 // 1 string to match.
1727            if (memcmp(Mnemonic.data()+2, "pad", 3) != 0)
1728              break;
1729            if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "popad"
1730              Mnemonic = "popal";
1731            return;
1732          case 'u':	 // 2 strings to match.
1733            if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1734              break;
1735            switch (Mnemonic[4]) {
1736            default: break;
1737            case 'a':	 // 1 string to match.
1738              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pusha"
1739                Mnemonic = "pushaw";
1740              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1741                Mnemonic = "pushal";
1742              return;
1743            case 'f':	 // 1 string to match.
1744              if ((Features & Feature_In64BitMode) == Feature_In64BitMode)	 // "pushf"
1745                Mnemonic = "pushfq";
1746              return;
1747            }
1748            break;
1749          }
1750          break;
1751        }
1752        break;
1753      case 6:	 // 9 strings to match.
1754        switch (Mnemonic[0]) {
1755        default: break;
1756        case 'c':	 // 8 strings to match.
1757          if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1758            break;
1759          switch (Mnemonic[4]) {
1760          default: break;
1761          case 'n':	 // 6 strings to match.
1762            switch (Mnemonic[5]) {
1763            default: break;
1764            case 'a':	 // 1 string to match.
1765              Mnemonic = "cmovbe";	 // "cmovna"
1766              return;
1767            case 'b':	 // 1 string to match.
1768              Mnemonic = "cmovae";	 // "cmovnb"
1769              return;
1770            case 'c':	 // 1 string to match.
1771              Mnemonic = "cmovae";	 // "cmovnc"
1772              return;
1773            case 'g':	 // 1 string to match.
1774              Mnemonic = "cmovle";	 // "cmovng"
1775              return;
1776            case 'l':	 // 1 string to match.
1777              Mnemonic = "cmovge";	 // "cmovnl"
1778              return;
1779            case 'z':	 // 1 string to match.
1780              Mnemonic = "cmovne";	 // "cmovnz"
1781              return;
1782            }
1783            break;
1784          case 'p':	 // 2 strings to match.
1785            switch (Mnemonic[5]) {
1786            default: break;
1787            case 'e':	 // 1 string to match.
1788              Mnemonic = "cmovp";	 // "cmovpe"
1789              return;
1790            case 'o':	 // 1 string to match.
1791              Mnemonic = "cmovnp";	 // "cmovpo"
1792              return;
1793            }
1794            break;
1795          }
1796          break;
1797        case 'p':	 // 1 string to match.
1798          if (memcmp(Mnemonic.data()+1, "ushad", 5) != 0)
1799            break;
1800          if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "pushad"
1801            Mnemonic = "pushal";
1802          return;
1803        }
1804        break;
1805      case 7:	 // 6 strings to match.
1806        switch (Mnemonic[0]) {
1807        default: break;
1808        case 'a':	 // 1 string to match.
1809          if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
1810            break;
1811          Mnemonic = "xacquire";	 // "acquire"
1812          return;
1813        case 'c':	 // 4 strings to match.
1814          if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1815            break;
1816          switch (Mnemonic[5]) {
1817          default: break;
1818          case 'a':	 // 1 string to match.
1819            if (Mnemonic[6] != 'e')
1820              break;
1821            Mnemonic = "cmovb";	 // "cmovnae"
1822            return;
1823          case 'b':	 // 1 string to match.
1824            if (Mnemonic[6] != 'e')
1825              break;
1826            Mnemonic = "cmova";	 // "cmovnbe"
1827            return;
1828          case 'g':	 // 1 string to match.
1829            if (Mnemonic[6] != 'e')
1830              break;
1831            Mnemonic = "cmovl";	 // "cmovnge"
1832            return;
1833          case 'l':	 // 1 string to match.
1834            if (Mnemonic[6] != 'e')
1835              break;
1836            Mnemonic = "cmovg";	 // "cmovnle"
1837            return;
1838          }
1839          break;
1840        case 'r':	 // 1 string to match.
1841          if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
1842            break;
1843          Mnemonic = "xrelease";	 // "release"
1844          return;
1845        }
1846        break;
1847      }
1848    break;
1849  }
1850  switch (Mnemonic.size()) {
1851  default: break;
1852  case 2:	 // 2 strings to match.
1853    if (Mnemonic[0] != 'j')
1854      break;
1855    switch (Mnemonic[1]) {
1856    default: break;
1857    case 'c':	 // 1 string to match.
1858      Mnemonic = "jb";	 // "jc"
1859      return;
1860    case 'z':	 // 1 string to match.
1861      Mnemonic = "je";	 // "jz"
1862      return;
1863    }
1864    break;
1865  case 3:	 // 8 strings to match.
1866    if (Mnemonic[0] != 'j')
1867      break;
1868    switch (Mnemonic[1]) {
1869    default: break;
1870    case 'n':	 // 6 strings to match.
1871      switch (Mnemonic[2]) {
1872      default: break;
1873      case 'a':	 // 1 string to match.
1874        Mnemonic = "jbe";	 // "jna"
1875        return;
1876      case 'b':	 // 1 string to match.
1877        Mnemonic = "jae";	 // "jnb"
1878        return;
1879      case 'c':	 // 1 string to match.
1880        Mnemonic = "jae";	 // "jnc"
1881        return;
1882      case 'g':	 // 1 string to match.
1883        Mnemonic = "jle";	 // "jng"
1884        return;
1885      case 'l':	 // 1 string to match.
1886        Mnemonic = "jge";	 // "jnl"
1887        return;
1888      case 'z':	 // 1 string to match.
1889        Mnemonic = "jne";	 // "jnz"
1890        return;
1891      }
1892      break;
1893    case 'p':	 // 2 strings to match.
1894      switch (Mnemonic[2]) {
1895      default: break;
1896      case 'e':	 // 1 string to match.
1897        Mnemonic = "jp";	 // "jpe"
1898        return;
1899      case 'o':	 // 1 string to match.
1900        Mnemonic = "jnp";	 // "jpo"
1901        return;
1902      }
1903      break;
1904    }
1905    break;
1906  case 4:	 // 8 strings to match.
1907    switch (Mnemonic[0]) {
1908    default: break;
1909    case 'j':	 // 4 strings to match.
1910      if (Mnemonic[1] != 'n')
1911        break;
1912      switch (Mnemonic[2]) {
1913      default: break;
1914      case 'a':	 // 1 string to match.
1915        if (Mnemonic[3] != 'e')
1916          break;
1917        Mnemonic = "jb";	 // "jnae"
1918        return;
1919      case 'b':	 // 1 string to match.
1920        if (Mnemonic[3] != 'e')
1921          break;
1922        Mnemonic = "ja";	 // "jnbe"
1923        return;
1924      case 'g':	 // 1 string to match.
1925        if (Mnemonic[3] != 'e')
1926          break;
1927        Mnemonic = "jl";	 // "jnge"
1928        return;
1929      case 'l':	 // 1 string to match.
1930        if (Mnemonic[3] != 'e')
1931          break;
1932        Mnemonic = "jg";	 // "jnle"
1933        return;
1934      }
1935      break;
1936    case 'r':	 // 2 strings to match.
1937      if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
1938        break;
1939      switch (Mnemonic[3]) {
1940      default: break;
1941      case 'e':	 // 1 string to match.
1942        Mnemonic = "rep";	 // "repe"
1943        return;
1944      case 'z':	 // 1 string to match.
1945        Mnemonic = "rep";	 // "repz"
1946        return;
1947      }
1948      break;
1949    case 's':	 // 2 strings to match.
1950      if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1951        break;
1952      switch (Mnemonic[3]) {
1953      default: break;
1954      case 'c':	 // 1 string to match.
1955        Mnemonic = "setb";	 // "setc"
1956        return;
1957      case 'z':	 // 1 string to match.
1958        Mnemonic = "sete";	 // "setz"
1959        return;
1960      }
1961      break;
1962    }
1963    break;
1964  case 5:	 // 11 strings to match.
1965    switch (Mnemonic[0]) {
1966    default: break;
1967    case 'f':	 // 1 string to match.
1968      if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
1969        break;
1970      Mnemonic = "wait";	 // "fwait"
1971      return;
1972    case 'l':	 // 1 string to match.
1973      if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
1974        break;
1975      Mnemonic = "loope";	 // "loopz"
1976      return;
1977    case 'r':	 // 1 string to match.
1978      if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
1979        break;
1980      Mnemonic = "repne";	 // "repnz"
1981      return;
1982    case 's':	 // 8 strings to match.
1983      if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1984        break;
1985      switch (Mnemonic[3]) {
1986      default: break;
1987      case 'n':	 // 6 strings to match.
1988        switch (Mnemonic[4]) {
1989        default: break;
1990        case 'a':	 // 1 string to match.
1991          Mnemonic = "setbe";	 // "setna"
1992          return;
1993        case 'b':	 // 1 string to match.
1994          Mnemonic = "setae";	 // "setnb"
1995          return;
1996        case 'c':	 // 1 string to match.
1997          Mnemonic = "setae";	 // "setnc"
1998          return;
1999        case 'g':	 // 1 string to match.
2000          Mnemonic = "setle";	 // "setng"
2001          return;
2002        case 'l':	 // 1 string to match.
2003          Mnemonic = "setge";	 // "setnl"
2004          return;
2005        case 'z':	 // 1 string to match.
2006          Mnemonic = "setne";	 // "setnz"
2007          return;
2008        }
2009        break;
2010      case 'p':	 // 2 strings to match.
2011        switch (Mnemonic[4]) {
2012        default: break;
2013        case 'e':	 // 1 string to match.
2014          Mnemonic = "setp";	 // "setpe"
2015          return;
2016        case 'o':	 // 1 string to match.
2017          Mnemonic = "setnp";	 // "setpo"
2018          return;
2019        }
2020        break;
2021      }
2022      break;
2023    }
2024    break;
2025  case 6:	 // 6 strings to match.
2026    switch (Mnemonic[0]) {
2027    default: break;
2028    case 'f':	 // 1 string to match.
2029      if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
2030        break;
2031      Mnemonic = "fcompi";	 // "fcomip"
2032      return;
2033    case 'l':	 // 1 string to match.
2034      if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
2035        break;
2036      Mnemonic = "loopne";	 // "loopnz"
2037      return;
2038    case 's':	 // 4 strings to match.
2039      if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
2040        break;
2041      switch (Mnemonic[4]) {
2042      default: break;
2043      case 'a':	 // 1 string to match.
2044        if (Mnemonic[5] != 'e')
2045          break;
2046        Mnemonic = "setb";	 // "setnae"
2047        return;
2048      case 'b':	 // 1 string to match.
2049        if (Mnemonic[5] != 'e')
2050          break;
2051        Mnemonic = "seta";	 // "setnbe"
2052        return;
2053      case 'g':	 // 1 string to match.
2054        if (Mnemonic[5] != 'e')
2055          break;
2056        Mnemonic = "setl";	 // "setnge"
2057        return;
2058      case 'l':	 // 1 string to match.
2059        if (Mnemonic[5] != 'e')
2060          break;
2061        Mnemonic = "setg";	 // "setnle"
2062        return;
2063      }
2064      break;
2065    }
2066    break;
2067  case 7:	 // 1 string to match.
2068    if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
2069      break;
2070    Mnemonic = "fucompi";	 // "fucomip"
2071    return;
2072  }
2073}
2074
2075enum {
2076  Tie0_1_1,
2077  Tie0_2_2,
2078  Tie0_3_3,
2079  Tie0_4_4,
2080  Tie1_1_1,
2081  Tie1_2_2,
2082  Tie1_3_3,
2083  Tie1_4_4,
2084};
2085
2086static const uint8_t TiedAsmOperandTable[][3] = {
2087  /* Tie0_1_1 */ { 0, 1, 1 },
2088  /* Tie0_2_2 */ { 0, 2, 2 },
2089  /* Tie0_3_3 */ { 0, 3, 3 },
2090  /* Tie0_4_4 */ { 0, 4, 4 },
2091  /* Tie1_1_1 */ { 1, 1, 1 },
2092  /* Tie1_2_2 */ { 1, 2, 2 },
2093  /* Tie1_3_3 */ { 1, 3, 3 },
2094  /* Tie1_4_4 */ { 1, 4, 4 },
2095};
2096
2097namespace {
2098enum OperatorConversionKind {
2099  CVT_Done,
2100  CVT_Reg,
2101  CVT_Tied,
2102  CVT_imm_95_10,
2103  CVT_95_addImmOperands,
2104  CVT_regAX,
2105  CVT_regEAX,
2106  CVT_regRAX,
2107  CVT_95_Reg,
2108  CVT_95_addMemOperands,
2109  CVT_95_addAbsMemOperands,
2110  CVT_95_addDstIdxOperands,
2111  CVT_95_addSrcIdxOperands,
2112  CVT_95_addGR32orGR64Operands,
2113  CVT_regST1,
2114  CVT_regST0,
2115  CVT_95_addMemOffsOperands,
2116  CVT_imm_95_17,
2117  CVT_imm_95_1,
2118  CVT_imm_95_16,
2119  CVT_imm_95_0,
2120  CVT_95_addAVX512RCOperands,
2121  CVT_NUM_CONVERTERS
2122};
2123
2124enum InstructionConversionKind {
2125  Convert_NoOperands,
2126  Convert__imm_95_10,
2127  Convert__Imm1_0,
2128  Convert__Imm1_1,
2129  Convert__regAX__Tie0_1_1__ImmSExti16i81_1,
2130  Convert__regEAX__Tie0_1_1__ImmSExti32i81_1,
2131  Convert__regRAX__Tie0_1_1__ImmSExti64i81_1,
2132  Convert__ImmSExti64i321_1,
2133  Convert__Reg1_0__Tie0_1_1__Reg1_1,
2134  Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1,
2135  Convert__Reg1_0__Tie0_1_1__Imm1_1,
2136  Convert__Reg1_0__Tie0_1_1__Mem165_1,
2137  Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1,
2138  Convert__Reg1_0__Tie0_1_1__Mem325_1,
2139  Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1,
2140  Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1,
2141  Convert__Reg1_0__Tie0_1_1__Mem645_1,
2142  Convert__Reg1_0__Tie0_1_1__Mem85_1,
2143  Convert__Mem165_0__Reg1_1,
2144  Convert__Mem165_0__ImmSExti16i81_1,
2145  Convert__Mem165_0__Imm1_1,
2146  Convert__Mem325_0__Reg1_1,
2147  Convert__Mem325_0__ImmSExti32i81_1,
2148  Convert__Mem325_0__Imm1_1,
2149  Convert__Mem645_0__Reg1_1,
2150  Convert__Mem645_0__ImmSExti64i81_1,
2151  Convert__Mem645_0__ImmSExti64i321_1,
2152  Convert__Mem85_0__Reg1_1,
2153  Convert__Mem85_0__Imm1_1,
2154  Convert__Reg1_1__Tie0_2_2__Reg1_0,
2155  Convert__Mem85_1__Reg1_0,
2156  Convert__Reg1_1__Tie0_2_2__Imm1_0,
2157  Convert__Mem85_1__Imm1_0,
2158  Convert__Reg1_1__Tie0_2_2__Mem85_0,
2159  Convert__Mem325_1__Reg1_0,
2160  Convert__regEAX__Tie0_1_1__ImmSExti32i81_0,
2161  Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0,
2162  Convert__Mem325_1__ImmSExti32i81_0,
2163  Convert__Mem325_1__Imm1_0,
2164  Convert__Reg1_1__Tie0_2_2__Mem325_0,
2165  Convert__Mem645_1__Reg1_0,
2166  Convert__regRAX__Tie0_1_1__ImmSExti64i81_0,
2167  Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0,
2168  Convert__Mem645_1__ImmSExti64i81_0,
2169  Convert__ImmSExti64i321_0,
2170  Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0,
2171  Convert__Mem645_1__ImmSExti64i321_0,
2172  Convert__Reg1_1__Tie0_2_2__Mem645_0,
2173  Convert__Mem165_1__Reg1_0,
2174  Convert__regAX__Tie0_1_1__ImmSExti16i81_0,
2175  Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0,
2176  Convert__Mem165_1__ImmSExti16i81_0,
2177  Convert__Mem165_1__Imm1_0,
2178  Convert__Reg1_1__Tie0_2_2__Mem165_0,
2179  Convert__Reg1_1__Tie0_1_1__Reg1_0,
2180  Convert__Reg1_1__Tie0_1_1__Mem325_0,
2181  Convert__Reg1_1__Tie0_1_1__Mem645_0,
2182  Convert__Reg1_0__Tie0_1_1__Mem1285_1,
2183  Convert__Reg1_1__Tie0_1_1__Mem1285_0,
2184  Convert__Reg1_1__Reg1_0,
2185  Convert__Reg1_0__Reg1_1,
2186  Convert__Reg1_0__Mem1285_1,
2187  Convert__Reg1_1__Mem1285_0,
2188  Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
2189  Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
2190  Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2191  Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2192  Convert__Reg1_0__Reg1_1__Reg1_2,
2193  Convert__Reg1_0__Reg1_1__Mem325_2,
2194  Convert__Reg1_0__Reg1_1__Mem645_2,
2195  Convert__Reg1_2__Reg1_1__Reg1_0,
2196  Convert__Reg1_2__Reg1_1__Mem325_0,
2197  Convert__Reg1_2__Reg1_1__Mem645_0,
2198  Convert__Reg1_0__Reg1_1__Imm1_2,
2199  Convert__Reg1_0__Mem325_1__Reg1_2,
2200  Convert__Reg1_0__Mem325_1__Imm1_2,
2201  Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
2202  Convert__Reg1_0__Mem645_1__Reg1_2,
2203  Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
2204  Convert__Reg1_2__Mem325_1__Reg1_0,
2205  Convert__Reg1_2__Reg1_1__Imm1_0,
2206  Convert__Reg1_2__Mem325_1__Imm1_0,
2207  Convert__Reg1_2__Mem645_1__Reg1_0,
2208  Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
2209  Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
2210  Convert__Reg1_0__Mem325_1,
2211  Convert__Reg1_0__Mem645_1,
2212  Convert__Reg1_1__Mem325_0,
2213  Convert__Reg1_1__Mem645_0,
2214  Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2,
2215  Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2,
2216  Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0,
2217  Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0,
2218  Convert__Reg1_1__Tie0_2_2__Mem1285_0,
2219  Convert__Reg1_2__Tie0_1_1__Reg1_1,
2220  Convert__Reg1_2__Tie0_1_1__Mem1285_1,
2221  Convert__Reg1_0__Mem5_1,
2222  Convert__Reg1_1__Mem5_0,
2223  Convert__Mem1285_1__Reg1_0,
2224  Convert__Mem1285_0__Reg1_1,
2225  Convert__Mem5_1__Reg1_0,
2226  Convert__Mem5_0__Reg1_1,
2227  Convert__Reg1_0__Mem165_1,
2228  Convert__Reg1_1__Mem165_0,
2229  Convert__Reg1_0__Tie0_1_1,
2230  Convert__Reg1_0__ImmSExti16i81_1,
2231  Convert__Reg1_0__ImmSExti32i81_1,
2232  Convert__Reg1_0__ImmSExti64i81_1,
2233  Convert__Reg1_1__ImmSExti32i81_0,
2234  Convert__Reg1_1__ImmSExti64i81_0,
2235  Convert__Reg1_1__ImmSExti16i81_0,
2236  Convert__Reg1_0,
2237  Convert__AbsMem1_0,
2238  Convert__Mem165_0,
2239  Convert__Mem325_0,
2240  Convert__Mem645_0,
2241  Convert__Mem5_0,
2242  Convert__Imm1_1__Imm1_0,
2243  Convert__Reg1_1,
2244  Convert__Mem325_1,
2245  Convert__Mem645_1,
2246  Convert__Mem165_1,
2247  Convert__Mem85_0,
2248  Convert__Reg1_0__Tie0_1_1__Reg1_0,
2249  Convert__Reg1_1__Tie0_1_1__Mem165_0,
2250  Convert__regAX__ImmSExti16i81_1,
2251  Convert__regEAX__ImmSExti32i81_1,
2252  Convert__regRAX__ImmSExti64i81_1,
2253  Convert__Reg1_0__Imm1_1,
2254  Convert__Reg1_0__ImmSExti64i321_1,
2255  Convert__Reg1_0__Mem85_1,
2256  Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0,
2257  Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0,
2258  Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0,
2259  Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0,
2260  Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0,
2261  Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0,
2262  Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0,
2263  Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0,
2264  Convert__Reg1_1__Imm1_0,
2265  Convert__Reg1_1__Mem85_0,
2266  Convert__regEAX__ImmSExti32i81_0,
2267  Convert__regRAX__ImmSExti64i81_0,
2268  Convert__Reg1_1__ImmSExti64i321_0,
2269  Convert__DstIdx161_1__SrcIdx162_0,
2270  Convert__DstIdx321_1__SrcIdx322_0,
2271  Convert__DstIdx641_1__SrcIdx642_0,
2272  Convert__DstIdx81_1__SrcIdx82_0,
2273  Convert__DstIdx81_0__SrcIdx82_1,
2274  Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2,
2275  Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0,
2276  Convert__DstIdx321_0__SrcIdx322_1,
2277  Convert__DstIdx641_0__SrcIdx642_1,
2278  Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2,
2279  Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0,
2280  Convert__DstIdx161_0__SrcIdx162_1,
2281  Convert__regAX__ImmSExti16i81_0,
2282  Convert__Mem1285_0,
2283  Convert__Mem85_1,
2284  Convert__Imm1_0__Imm1_1,
2285  Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
2286  Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
2287  Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
2288  Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
2289  Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2,
2290  Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0,
2291  Convert__regST1,
2292  Convert__regST0,
2293  Convert__Mem805_0,
2294  Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
2295  Convert__Reg1_0__Reg1_0__Imm1_1,
2296  Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
2297  Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
2298  Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
2299  Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
2300  Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
2301  Convert__Reg1_0__Mem165_1__Imm1_2,
2302  Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
2303  Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
2304  Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
2305  Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
2306  Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
2307  Convert__Reg1_1__Reg1_1__Imm1_0,
2308  Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
2309  Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
2310  Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
2311  Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
2312  Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
2313  Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
2314  Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
2315  Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
2316  Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
2317  Convert__Reg1_2__Mem165_1__Imm1_0,
2318  Convert__ImmUnsignedi81_1,
2319  Convert__ImmUnsignedi81_0,
2320  Convert__DstIdx161_0,
2321  Convert__DstIdx321_0,
2322  Convert__DstIdx81_0,
2323  Convert__DstIdx81_1,
2324  Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
2325  Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
2326  Convert__DstIdx321_1,
2327  Convert__DstIdx161_1,
2328  Convert__Mem5_1,
2329  Convert__SrcIdx162_0,
2330  Convert__SrcIdx322_0,
2331  Convert__SrcIdx642_0,
2332  Convert__SrcIdx82_0,
2333  Convert__SrcIdx82_1,
2334  Convert__SrcIdx162_1,
2335  Convert__SrcIdx322_1,
2336  Convert__SrcIdx642_1,
2337  Convert__MemOffs16_82_1,
2338  Convert__MemOffs32_82_1,
2339  Convert__MemOffs16_162_1,
2340  Convert__MemOffs32_162_1,
2341  Convert__MemOffs16_322_1,
2342  Convert__MemOffs32_322_1,
2343  Convert__MemOffs32_642_1,
2344  Convert__MemOffs16_162_0,
2345  Convert__MemOffs16_322_0,
2346  Convert__MemOffs16_82_0,
2347  Convert__MemOffs32_162_0,
2348  Convert__MemOffs32_322_0,
2349  Convert__MemOffs32_642_0,
2350  Convert__MemOffs32_82_0,
2351  Convert__MemOffs64_82_1,
2352  Convert__MemOffs64_162_1,
2353  Convert__MemOffs64_322_1,
2354  Convert__MemOffs64_642_1,
2355  Convert__MemOffs64_162_0,
2356  Convert__MemOffs64_322_0,
2357  Convert__MemOffs64_642_0,
2358  Convert__MemOffs64_82_0,
2359  Convert__Reg1_0__Mem5125_1,
2360  Convert__Reg1_1__Mem5125_0,
2361  Convert__GR32orGR641_1__Reg1_0,
2362  Convert__GR32orGR641_0__Reg1_1,
2363  Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17,
2364  Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17,
2365  Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17,
2366  Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17,
2367  Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1,
2368  Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1,
2369  Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1,
2370  Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1,
2371  Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16,
2372  Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16,
2373  Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16,
2374  Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16,
2375  Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0,
2376  Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0,
2377  Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0,
2378  Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0,
2379  Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
2380  Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
2381  Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
2382  Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
2383  Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
2384  Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
2385  Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2,
2386  Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2,
2387  Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0,
2388  Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0,
2389  Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2,
2390  Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0,
2391  Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
2392  Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2393  Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1,
2394  Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0,
2395  Convert__ImmSExti64i81_0,
2396  Convert__ImmSExti16i81_0,
2397  Convert__ImmSExti32i81_0,
2398  Convert__Mem165_0__ImmUnsignedi81_1,
2399  Convert__Mem325_0__ImmUnsignedi81_1,
2400  Convert__Mem645_0__ImmUnsignedi81_1,
2401  Convert__Mem85_0__ImmUnsignedi81_1,
2402  Convert__Reg1_1__Tie0_1_1,
2403  Convert__Mem85_1__ImmUnsignedi81_0,
2404  Convert__Mem325_1__ImmUnsignedi81_0,
2405  Convert__Mem645_1__ImmUnsignedi81_0,
2406  Convert__Mem165_1__ImmUnsignedi81_0,
2407  Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
2408  Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2409  Convert__DstIdx641_0,
2410  Convert__DstIdx641_1,
2411  Convert__Mem325_2__Reg1_1,
2412  Convert__Mem645_2__Reg1_1,
2413  Convert__Mem165_2__Reg1_1,
2414  Convert__GR32orGR641_0,
2415  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2,
2416  Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0,
2417  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5,
2418  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0,
2419  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6,
2420  Convert__Reg1_0__Reg1_1__Mem1285_2,
2421  Convert__Reg1_0__Reg1_1__Mem2565_2,
2422  Convert__Reg1_0__Reg1_1__Mem5125_2,
2423  Convert__Reg1_2__Reg1_1__Mem1285_0,
2424  Convert__Reg1_2__Reg1_1__Mem2565_0,
2425  Convert__Reg1_2__Reg1_1__Mem5125_0,
2426  Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
2427  Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
2428  Convert__Reg1_3__Reg1_2__Mem645_0,
2429  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5,
2430  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0,
2431  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5,
2432  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5,
2433  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0,
2434  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0,
2435  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
2436  Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
2437  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5,
2438  Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
2439  Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
2440  Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
2441  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
2442  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2443  Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
2444  Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
2445  Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
2446  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0,
2447  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
2448  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2449  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2450  Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
2451  Convert__Reg1_3__Reg1_2__Mem325_0,
2452  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5,
2453  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0,
2454  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
2455  Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
2456  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0,
2457  Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
2458  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0,
2459  Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
2460  Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2461  Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2462  Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2463  Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2464  Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2465  Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2466  Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2467  Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2468  Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2469  Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2470  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2471  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2472  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2473  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2474  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2475  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2476  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2477  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2478  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2479  Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2480  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2481  Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2482  Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2483  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2484  Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2485  Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2486  Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2487  Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2488  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2489  Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2490  Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2491  Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2492  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2493  Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2494  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2495  Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2496  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
2497  Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
2498  Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
2499  Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
2500  Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
2501  Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
2502  Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
2503  Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2504  Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
2505  Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
2506  Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
2507  Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
2508  Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0,
2509  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4,
2510  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4,
2511  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0,
2512  Convert__Reg1_1__Reg1_3__Reg1_0,
2513  Convert__Reg1_0__Reg1_2__Reg1_5,
2514  Convert__Reg1_0__Reg1_2__Mem645_5,
2515  Convert__Reg1_1__Reg1_3__Mem645_0,
2516  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4,
2517  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0,
2518  Convert__Reg1_0__Reg1_2__Mem1285_5,
2519  Convert__Reg1_1__Reg1_3__Mem1285_0,
2520  Convert__Reg1_0__Mem2565_1,
2521  Convert__Reg1_1__Mem2565_0,
2522  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4,
2523  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0,
2524  Convert__Reg1_0__Reg1_2__Mem2565_5,
2525  Convert__Reg1_1__Reg1_3__Mem2565_0,
2526  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4,
2527  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0,
2528  Convert__Reg1_0__Reg1_2__Mem325_5,
2529  Convert__Reg1_1__Reg1_3__Mem325_0,
2530  Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
2531  Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
2532  Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
2533  Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
2534  Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
2535  Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
2536  Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
2537  Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
2538  Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
2539  Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
2540  Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
2541  Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
2542  Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
2543  Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
2544  Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
2545  Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
2546  Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
2547  Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
2548  Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
2549  Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
2550  Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
2551  Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
2552  Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
2553  Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
2554  Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0,
2555  Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
2556  Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0,
2557  Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
2558  Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
2559  Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
2560  Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2561  Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2562  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2563  Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2564  Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2565  Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2566  Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2567  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2568  Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2569  Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2570  Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2571  Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2572  Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2573  Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2574  Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2575  Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2576  Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2577  Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2578  Convert__Reg1_2__Reg1_1,
2579  Convert__Mem2565_1__Reg1_0,
2580  Convert__Mem5125_1__Reg1_0,
2581  Convert__Mem2565_0__Reg1_1,
2582  Convert__Mem5125_0__Reg1_1,
2583  Convert__Mem1285_1__Reg1_3__Reg1_0,
2584  Convert__Mem2565_1__Reg1_3__Reg1_0,
2585  Convert__Mem5125_1__Reg1_3__Reg1_0,
2586  Convert__Mem1285_0__Reg1_2__Reg1_4,
2587  Convert__Mem2565_0__Reg1_2__Reg1_4,
2588  Convert__Mem5125_0__Reg1_2__Reg1_4,
2589  Convert__Reg1_2__Mem325_0,
2590  Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0,
2591  Convert__Reg1_2__Reg1_4__Mem325_0,
2592  Convert__Reg1_0__Reg1_1__AVX512RC1_2,
2593  Convert__Reg1_2__Reg1_1__AVX512RC1_0,
2594  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4,
2595  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0,
2596  Convert__Reg1_0__Reg1_2__Mem5125_5,
2597  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5,
2598  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0,
2599  Convert__Reg1_1__Reg1_3__Mem5125_0,
2600  Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
2601  Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
2602  Convert__Reg1_2__Mem645_0,
2603  Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0,
2604  Convert__Reg1_2__Reg1_4__Mem645_0,
2605  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1,
2606  Convert__Reg1_2__Reg1_4__Reg1_1,
2607  Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2608  Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2609  Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
2610  Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
2611  Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
2612  Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2613  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2614  Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2615  Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2616  Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2617  Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2618  Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2619  Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2620  Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2621  Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
2622  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6,
2623  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2624  Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2625  Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
2626  Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2627  Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
2628  Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
2629  Convert__Reg1_3__Reg1_2__Reg1_1,
2630  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1,
2631  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
2632  Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2633  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2634  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2635  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2636  Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2637  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2638  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2639  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2640  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2641  Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2642  Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2643  Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2644  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2645  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2646  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2647  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2648  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2649  Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2650  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2651  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2652  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2653  Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2654  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2655  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2656  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2657  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2658  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2659  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2660  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2661  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2662  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2663  Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2664  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2665  Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0,
2666  Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
2667  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2,
2668  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2,
2669  Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0,
2670  Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0,
2671  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2,
2672  Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3,
2673  Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0,
2674  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0,
2675  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6,
2676  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6,
2677  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6,
2678  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6,
2679  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2680  Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2,
2681  Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0,
2682  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6,
2683  Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0,
2684  Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0,
2685  Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
2686  Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
2687  Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
2688  Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
2689  Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
2690  Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
2691  Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
2692  Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
2693  Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
2694  Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
2695  Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
2696  Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
2697  Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
2698  Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
2699  Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
2700  Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2701  Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2702  Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2703  Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2704  Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2705  Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2706  Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2707  Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2708  Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2709  Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2710  Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2711  Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2712  Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
2713  Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2714  Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2715  Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2716  Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
2717  Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
2718  Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
2719  Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
2720  Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1,
2721  Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3,
2722  Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1,
2723  Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3,
2724  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4,
2725  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4,
2726  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4,
2727  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0,
2728  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0,
2729  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0,
2730  Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1,
2731  Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3,
2732  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4,
2733  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4,
2734  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0,
2735  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0,
2736  Convert__Reg1_1__Mem512_RC256X5_3,
2737  Convert__Reg1_2__Mem512_RC256X5_0,
2738  Convert__Reg1_1__Mem512_RC5125_3,
2739  Convert__Reg1_2__Mem512_RC5125_0,
2740  Convert__Reg1_1__Mem256_RC5125_3,
2741  Convert__Reg1_2__Mem256_RC5125_0,
2742  Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1,
2743  Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3,
2744  Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1,
2745  Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3,
2746  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4,
2747  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4,
2748  Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4,
2749  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0,
2750  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0,
2751  Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0,
2752  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2753  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2754  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2755  Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2756  Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2757  Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2758  Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
2759  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2760  Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
2761  Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
2762  Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2763  Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
2764  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2765  Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2766  Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
2767  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2768  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2769  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2770  Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4,
2771  Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2772  Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7,
2773  Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2774  Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8,
2775  Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2776  Convert__Mem1285_2__Reg1_1__Reg1_0,
2777  Convert__Mem2565_2__Reg1_1__Reg1_0,
2778  Convert__Mem1285_0__Reg1_1__Reg1_2,
2779  Convert__Mem2565_0__Reg1_1__Reg1_2,
2780  Convert__Reg1_0__Reg1_2__Reg1_4,
2781  Convert__Mem645_1__Reg1_3__Reg1_0,
2782  Convert__Mem645_0__Reg1_2__Reg1_4,
2783  Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0,
2784  Convert__Mem325_1__Reg1_3__Reg1_0,
2785  Convert__Mem325_0__Reg1_2__Reg1_4,
2786  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4,
2787  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0,
2788  Convert__Reg1_0__Reg1_2__Mem85_5,
2789  Convert__Reg1_1__Reg1_3__Mem85_0,
2790  Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4,
2791  Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0,
2792  Convert__Reg1_0__Reg1_2__Mem165_5,
2793  Convert__Reg1_1__Reg1_3__Mem165_0,
2794  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
2795  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
2796  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
2797  Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17,
2798  Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17,
2799  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
2800  Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17,
2801  Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17,
2802  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
2803  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
2804  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
2805  Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1,
2806  Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1,
2807  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
2808  Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1,
2809  Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1,
2810  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
2811  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
2812  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
2813  Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16,
2814  Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16,
2815  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
2816  Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16,
2817  Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16,
2818  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
2819  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
2820  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
2821  Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0,
2822  Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0,
2823  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
2824  Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0,
2825  Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0,
2826  Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
2827  Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
2828  Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
2829  Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
2830  Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
2831  Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2832  Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2833  Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2834  Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2835  Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2836  Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
2837  Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
2838  Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
2839  Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
2840  Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
2841  Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
2842  Convert__Mem165_1__Reg1_3__Reg1_0,
2843  Convert__Mem165_0__Reg1_2__Reg1_4,
2844  Convert__Reg1_2__Mem1285_1__Reg1_0,
2845  Convert__Reg1_0__Mem1285_1__Reg1_2,
2846  Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0,
2847  Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0,
2848  Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0,
2849  Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4,
2850  Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4,
2851  Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4,
2852  Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0,
2853  Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0,
2854  Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4,
2855  Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4,
2856  Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0,
2857  Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0,
2858  Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0,
2859  Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4,
2860  Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4,
2861  Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4,
2862  Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2,
2863  Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1,
2864  Convert__AbsMem161_0,
2865  Convert__Reg1_1__Tie0_2_2,
2866  Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1,
2867  CVT_NUM_SIGNATURES
2868};
2869
2870} // end anonymous namespace
2871
2872static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
2873  // Convert_NoOperands
2874  { CVT_Done },
2875  // Convert__imm_95_10
2876  { CVT_imm_95_10, 0, CVT_Done },
2877  // Convert__Imm1_0
2878  { CVT_95_addImmOperands, 1, CVT_Done },
2879  // Convert__Imm1_1
2880  { CVT_95_addImmOperands, 2, CVT_Done },
2881  // Convert__regAX__Tie0_1_1__ImmSExti16i81_1
2882  { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2883  // Convert__regEAX__Tie0_1_1__ImmSExti32i81_1
2884  { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2885  // Convert__regRAX__Tie0_1_1__ImmSExti64i81_1
2886  { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2887  // Convert__ImmSExti64i321_1
2888  { CVT_95_addImmOperands, 2, CVT_Done },
2889  // Convert__Reg1_0__Tie0_1_1__Reg1_1
2890  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
2891  // Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1
2892  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2893  // Convert__Reg1_0__Tie0_1_1__Imm1_1
2894  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2895  // Convert__Reg1_0__Tie0_1_1__Mem165_1
2896  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2897  // Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1
2898  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2899  // Convert__Reg1_0__Tie0_1_1__Mem325_1
2900  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2901  // Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1
2902  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2903  // Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1
2904  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2905  // Convert__Reg1_0__Tie0_1_1__Mem645_1
2906  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2907  // Convert__Reg1_0__Tie0_1_1__Mem85_1
2908  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2909  // Convert__Mem165_0__Reg1_1
2910  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2911  // Convert__Mem165_0__ImmSExti16i81_1
2912  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2913  // Convert__Mem165_0__Imm1_1
2914  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2915  // Convert__Mem325_0__Reg1_1
2916  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2917  // Convert__Mem325_0__ImmSExti32i81_1
2918  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2919  // Convert__Mem325_0__Imm1_1
2920  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2921  // Convert__Mem645_0__Reg1_1
2922  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2923  // Convert__Mem645_0__ImmSExti64i81_1
2924  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2925  // Convert__Mem645_0__ImmSExti64i321_1
2926  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2927  // Convert__Mem85_0__Reg1_1
2928  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2929  // Convert__Mem85_0__Imm1_1
2930  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2931  // Convert__Reg1_1__Tie0_2_2__Reg1_0
2932  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_Done },
2933  // Convert__Mem85_1__Reg1_0
2934  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2935  // Convert__Reg1_1__Tie0_2_2__Imm1_0
2936  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2937  // Convert__Mem85_1__Imm1_0
2938  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2939  // Convert__Reg1_1__Tie0_2_2__Mem85_0
2940  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2941  // Convert__Mem325_1__Reg1_0
2942  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2943  // Convert__regEAX__Tie0_1_1__ImmSExti32i81_0
2944  { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2945  // Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0
2946  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2947  // Convert__Mem325_1__ImmSExti32i81_0
2948  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2949  // Convert__Mem325_1__Imm1_0
2950  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2951  // Convert__Reg1_1__Tie0_2_2__Mem325_0
2952  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2953  // Convert__Mem645_1__Reg1_0
2954  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2955  // Convert__regRAX__Tie0_1_1__ImmSExti64i81_0
2956  { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2957  // Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0
2958  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2959  // Convert__Mem645_1__ImmSExti64i81_0
2960  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2961  // Convert__ImmSExti64i321_0
2962  { CVT_95_addImmOperands, 1, CVT_Done },
2963  // Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0
2964  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2965  // Convert__Mem645_1__ImmSExti64i321_0
2966  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2967  // Convert__Reg1_1__Tie0_2_2__Mem645_0
2968  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2969  // Convert__Mem165_1__Reg1_0
2970  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2971  // Convert__regAX__Tie0_1_1__ImmSExti16i81_0
2972  { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2973  // Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0
2974  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2975  // Convert__Mem165_1__ImmSExti16i81_0
2976  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2977  // Convert__Mem165_1__Imm1_0
2978  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2979  // Convert__Reg1_1__Tie0_2_2__Mem165_0
2980  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2981  // Convert__Reg1_1__Tie0_1_1__Reg1_0
2982  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
2983  // Convert__Reg1_1__Tie0_1_1__Mem325_0
2984  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2985  // Convert__Reg1_1__Tie0_1_1__Mem645_0
2986  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2987  // Convert__Reg1_0__Tie0_1_1__Mem1285_1
2988  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2989  // Convert__Reg1_1__Tie0_1_1__Mem1285_0
2990  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2991  // Convert__Reg1_1__Reg1_0
2992  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
2993  // Convert__Reg1_0__Reg1_1
2994  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
2995  // Convert__Reg1_0__Mem1285_1
2996  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
2997  // Convert__Reg1_1__Mem1285_0
2998  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2999  // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
3000  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3001  // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
3002  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3003  // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
3004  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3005  // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3006  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3007  // Convert__Reg1_0__Reg1_1__Reg1_2
3008  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3009  // Convert__Reg1_0__Reg1_1__Mem325_2
3010  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3011  // Convert__Reg1_0__Reg1_1__Mem645_2
3012  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3013  // Convert__Reg1_2__Reg1_1__Reg1_0
3014  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3015  // Convert__Reg1_2__Reg1_1__Mem325_0
3016  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3017  // Convert__Reg1_2__Reg1_1__Mem645_0
3018  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3019  // Convert__Reg1_0__Reg1_1__Imm1_2
3020  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3021  // Convert__Reg1_0__Mem325_1__Reg1_2
3022  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3023  // Convert__Reg1_0__Mem325_1__Imm1_2
3024  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3025  // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
3026  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3027  // Convert__Reg1_0__Mem645_1__Reg1_2
3028  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3029  // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
3030  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3031  // Convert__Reg1_2__Mem325_1__Reg1_0
3032  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3033  // Convert__Reg1_2__Reg1_1__Imm1_0
3034  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3035  // Convert__Reg1_2__Mem325_1__Imm1_0
3036  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3037  // Convert__Reg1_2__Mem645_1__Reg1_0
3038  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3039  // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
3040  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3041  // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
3042  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3043  // Convert__Reg1_0__Mem325_1
3044  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3045  // Convert__Reg1_0__Mem645_1
3046  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3047  // Convert__Reg1_1__Mem325_0
3048  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3049  // Convert__Reg1_1__Mem645_0
3050  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3051  // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2
3052  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3053  // Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2
3054  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3055  // Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0
3056  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3057  // Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0
3058  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3059  // Convert__Reg1_1__Tie0_2_2__Mem1285_0
3060  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3061  // Convert__Reg1_2__Tie0_1_1__Reg1_1
3062  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
3063  // Convert__Reg1_2__Tie0_1_1__Mem1285_1
3064  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3065  // Convert__Reg1_0__Mem5_1
3066  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3067  // Convert__Reg1_1__Mem5_0
3068  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3069  // Convert__Mem1285_1__Reg1_0
3070  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3071  // Convert__Mem1285_0__Reg1_1
3072  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3073  // Convert__Mem5_1__Reg1_0
3074  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3075  // Convert__Mem5_0__Reg1_1
3076  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3077  // Convert__Reg1_0__Mem165_1
3078  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3079  // Convert__Reg1_1__Mem165_0
3080  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3081  // Convert__Reg1_0__Tie0_1_1
3082  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
3083  // Convert__Reg1_0__ImmSExti16i81_1
3084  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3085  // Convert__Reg1_0__ImmSExti32i81_1
3086  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3087  // Convert__Reg1_0__ImmSExti64i81_1
3088  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3089  // Convert__Reg1_1__ImmSExti32i81_0
3090  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3091  // Convert__Reg1_1__ImmSExti64i81_0
3092  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3093  // Convert__Reg1_1__ImmSExti16i81_0
3094  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3095  // Convert__Reg1_0
3096  { CVT_95_Reg, 1, CVT_Done },
3097  // Convert__AbsMem1_0
3098  { CVT_95_addAbsMemOperands, 1, CVT_Done },
3099  // Convert__Mem165_0
3100  { CVT_95_addMemOperands, 1, CVT_Done },
3101  // Convert__Mem325_0
3102  { CVT_95_addMemOperands, 1, CVT_Done },
3103  // Convert__Mem645_0
3104  { CVT_95_addMemOperands, 1, CVT_Done },
3105  // Convert__Mem5_0
3106  { CVT_95_addMemOperands, 1, CVT_Done },
3107  // Convert__Imm1_1__Imm1_0
3108  { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3109  // Convert__Reg1_1
3110  { CVT_95_Reg, 2, CVT_Done },
3111  // Convert__Mem325_1
3112  { CVT_95_addMemOperands, 2, CVT_Done },
3113  // Convert__Mem645_1
3114  { CVT_95_addMemOperands, 2, CVT_Done },
3115  // Convert__Mem165_1
3116  { CVT_95_addMemOperands, 2, CVT_Done },
3117  // Convert__Mem85_0
3118  { CVT_95_addMemOperands, 1, CVT_Done },
3119  // Convert__Reg1_0__Tie0_1_1__Reg1_0
3120  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
3121  // Convert__Reg1_1__Tie0_1_1__Mem165_0
3122  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3123  // Convert__regAX__ImmSExti16i81_1
3124  { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3125  // Convert__regEAX__ImmSExti32i81_1
3126  { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3127  // Convert__regRAX__ImmSExti64i81_1
3128  { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3129  // Convert__Reg1_0__Imm1_1
3130  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3131  // Convert__Reg1_0__ImmSExti64i321_1
3132  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3133  // Convert__Reg1_0__Mem85_1
3134  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3135  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0
3136  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3137  // Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0
3138  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3139  // Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0
3140  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3141  // Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0
3142  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3143  // Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0
3144  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3145  // Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0
3146  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3147  // Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0
3148  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3149  // Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0
3150  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3151  // Convert__Reg1_1__Imm1_0
3152  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3153  // Convert__Reg1_1__Mem85_0
3154  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3155  // Convert__regEAX__ImmSExti32i81_0
3156  { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3157  // Convert__regRAX__ImmSExti64i81_0
3158  { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3159  // Convert__Reg1_1__ImmSExti64i321_0
3160  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3161  // Convert__DstIdx161_1__SrcIdx162_0
3162  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3163  // Convert__DstIdx321_1__SrcIdx322_0
3164  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3165  // Convert__DstIdx641_1__SrcIdx642_0
3166  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3167  // Convert__DstIdx81_1__SrcIdx82_0
3168  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3169  // Convert__DstIdx81_0__SrcIdx82_1
3170  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3171  // Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2
3172  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3173  // Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0
3174  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3175  // Convert__DstIdx321_0__SrcIdx322_1
3176  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3177  // Convert__DstIdx641_0__SrcIdx642_1
3178  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3179  // Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2
3180  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3181  // Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0
3182  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3183  // Convert__DstIdx161_0__SrcIdx162_1
3184  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3185  // Convert__regAX__ImmSExti16i81_0
3186  { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3187  // Convert__Mem1285_0
3188  { CVT_95_addMemOperands, 1, CVT_Done },
3189  // Convert__Mem85_1
3190  { CVT_95_addMemOperands, 2, CVT_Done },
3191  // Convert__Imm1_0__Imm1_1
3192  { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3193  // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
3194  { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3195  // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
3196  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3197  // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
3198  { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3199  // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
3200  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3201  // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2
3202  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3203  // Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0
3204  { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3205  // Convert__regST1
3206  { CVT_regST1, 0, CVT_Done },
3207  // Convert__regST0
3208  { CVT_regST0, 0, CVT_Done },
3209  // Convert__Mem805_0
3210  { CVT_95_addMemOperands, 1, CVT_Done },
3211  // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
3212  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3213  // Convert__Reg1_0__Reg1_0__Imm1_1
3214  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3215  // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
3216  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3217  // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
3218  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3219  // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
3220  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3221  // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
3222  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3223  // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
3224  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3225  // Convert__Reg1_0__Mem165_1__Imm1_2
3226  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3227  // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
3228  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3229  // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
3230  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3231  // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
3232  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3233  // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
3234  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3235  // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
3236  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3237  // Convert__Reg1_1__Reg1_1__Imm1_0
3238  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3239  // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
3240  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3241  // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
3242  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3243  // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
3244  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3245  // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
3246  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3247  // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
3248  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3249  // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
3250  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3251  // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
3252  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3253  // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
3254  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3255  // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
3256  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3257  // Convert__Reg1_2__Mem165_1__Imm1_0
3258  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3259  // Convert__ImmUnsignedi81_1
3260  { CVT_95_addImmOperands, 2, CVT_Done },
3261  // Convert__ImmUnsignedi81_0
3262  { CVT_95_addImmOperands, 1, CVT_Done },
3263  // Convert__DstIdx161_0
3264  { CVT_95_addDstIdxOperands, 1, CVT_Done },
3265  // Convert__DstIdx321_0
3266  { CVT_95_addDstIdxOperands, 1, CVT_Done },
3267  // Convert__DstIdx81_0
3268  { CVT_95_addDstIdxOperands, 1, CVT_Done },
3269  // Convert__DstIdx81_1
3270  { CVT_95_addDstIdxOperands, 2, CVT_Done },
3271  // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
3272  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3273  // Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
3274  { CVT_95_Reg, 4, CVT_Tied, Tie0_4_4, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3275  // Convert__DstIdx321_1
3276  { CVT_95_addDstIdxOperands, 2, CVT_Done },
3277  // Convert__DstIdx161_1
3278  { CVT_95_addDstIdxOperands, 2, CVT_Done },
3279  // Convert__Mem5_1
3280  { CVT_95_addMemOperands, 2, CVT_Done },
3281  // Convert__SrcIdx162_0
3282  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3283  // Convert__SrcIdx322_0
3284  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3285  // Convert__SrcIdx642_0
3286  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3287  // Convert__SrcIdx82_0
3288  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3289  // Convert__SrcIdx82_1
3290  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3291  // Convert__SrcIdx162_1
3292  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3293  // Convert__SrcIdx322_1
3294  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3295  // Convert__SrcIdx642_1
3296  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3297  // Convert__MemOffs16_82_1
3298  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3299  // Convert__MemOffs32_82_1
3300  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3301  // Convert__MemOffs16_162_1
3302  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3303  // Convert__MemOffs32_162_1
3304  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3305  // Convert__MemOffs16_322_1
3306  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3307  // Convert__MemOffs32_322_1
3308  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3309  // Convert__MemOffs32_642_1
3310  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3311  // Convert__MemOffs16_162_0
3312  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3313  // Convert__MemOffs16_322_0
3314  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3315  // Convert__MemOffs16_82_0
3316  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3317  // Convert__MemOffs32_162_0
3318  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3319  // Convert__MemOffs32_322_0
3320  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3321  // Convert__MemOffs32_642_0
3322  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3323  // Convert__MemOffs32_82_0
3324  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3325  // Convert__MemOffs64_82_1
3326  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3327  // Convert__MemOffs64_162_1
3328  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3329  // Convert__MemOffs64_322_1
3330  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3331  // Convert__MemOffs64_642_1
3332  { CVT_95_addMemOffsOperands, 2, CVT_Done },
3333  // Convert__MemOffs64_162_0
3334  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3335  // Convert__MemOffs64_322_0
3336  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3337  // Convert__MemOffs64_642_0
3338  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3339  // Convert__MemOffs64_82_0
3340  { CVT_95_addMemOffsOperands, 1, CVT_Done },
3341  // Convert__Reg1_0__Mem5125_1
3342  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3343  // Convert__Reg1_1__Mem5125_0
3344  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3345  // Convert__GR32orGR641_1__Reg1_0
3346  { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
3347  // Convert__GR32orGR641_0__Reg1_1
3348  { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
3349  // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17
3350  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
3351  // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17
3352  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
3353  // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17
3354  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
3355  // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17
3356  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
3357  // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1
3358  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
3359  // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1
3360  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
3361  // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1
3362  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3363  // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1
3364  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3365  // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16
3366  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
3367  // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16
3368  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
3369  // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16
3370  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
3371  // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16
3372  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
3373  // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0
3374  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
3375  // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0
3376  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
3377  // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0
3378  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3379  // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0
3380  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3381  // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
3382  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3383  // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
3384  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3385  // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
3386  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3387  // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
3388  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3389  // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
3390  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3391  // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
3392  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3393  // Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2
3394  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3395  // Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2
3396  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3397  // Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0
3398  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3399  // Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0
3400  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3401  // Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2
3402  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3403  // Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0
3404  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3405  // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
3406  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3407  // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
3408  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3409  // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1
3410  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3411  // Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0
3412  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3413  // Convert__ImmSExti64i81_0
3414  { CVT_95_addImmOperands, 1, CVT_Done },
3415  // Convert__ImmSExti16i81_0
3416  { CVT_95_addImmOperands, 1, CVT_Done },
3417  // Convert__ImmSExti32i81_0
3418  { CVT_95_addImmOperands, 1, CVT_Done },
3419  // Convert__Mem165_0__ImmUnsignedi81_1
3420  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3421  // Convert__Mem325_0__ImmUnsignedi81_1
3422  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3423  // Convert__Mem645_0__ImmUnsignedi81_1
3424  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3425  // Convert__Mem85_0__ImmUnsignedi81_1
3426  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3427  // Convert__Reg1_1__Tie0_1_1
3428  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Done },
3429  // Convert__Mem85_1__ImmUnsignedi81_0
3430  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3431  // Convert__Mem325_1__ImmUnsignedi81_0
3432  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3433  // Convert__Mem645_1__ImmUnsignedi81_0
3434  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3435  // Convert__Mem165_1__ImmUnsignedi81_0
3436  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3437  // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
3438  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3439  // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
3440  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3441  // Convert__DstIdx641_0
3442  { CVT_95_addDstIdxOperands, 1, CVT_Done },
3443  // Convert__DstIdx641_1
3444  { CVT_95_addDstIdxOperands, 2, CVT_Done },
3445  // Convert__Mem325_2__Reg1_1
3446  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3447  // Convert__Mem645_2__Reg1_1
3448  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3449  // Convert__Mem165_2__Reg1_1
3450  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3451  // Convert__GR32orGR641_0
3452  { CVT_95_addGR32orGR64Operands, 1, CVT_Done },
3453  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2
3454  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3455  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0
3456  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3457  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5
3458  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3459  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0
3460  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3461  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6
3462  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3463  // Convert__Reg1_0__Reg1_1__Mem1285_2
3464  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3465  // Convert__Reg1_0__Reg1_1__Mem2565_2
3466  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3467  // Convert__Reg1_0__Reg1_1__Mem5125_2
3468  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3469  // Convert__Reg1_2__Reg1_1__Mem1285_0
3470  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3471  // Convert__Reg1_2__Reg1_1__Mem2565_0
3472  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3473  // Convert__Reg1_2__Reg1_1__Mem5125_0
3474  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3475  // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
3476  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3477  // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
3478  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3479  // Convert__Reg1_3__Reg1_2__Mem645_0
3480  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3481  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5
3482  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3483  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0
3484  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3485  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5
3486  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3487  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5
3488  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3489  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0
3490  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3491  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0
3492  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3493  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
3494  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3495  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
3496  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3497  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5
3498  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3499  // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
3500  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3501  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
3502  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3503  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
3504  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3505  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
3506  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3507  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3508  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3509  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
3510  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3511  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
3512  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3513  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
3514  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3515  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0
3516  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3517  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
3518  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3519  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3520  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3521  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3522  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3523  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
3524  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3525  // Convert__Reg1_3__Reg1_2__Mem325_0
3526  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3527  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5
3528  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3529  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0
3530  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3531  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
3532  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3533  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
3534  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3535  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0
3536  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3537  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
3538  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3539  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0
3540  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3541  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
3542  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3543  // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
3544  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3545  // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3546  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3547  // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3548  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3549  // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3550  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3551  // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
3552  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3553  // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3554  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3555  // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3556  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3557  // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3558  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3559  // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
3560  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3561  // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
3562  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3563  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3564  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3565  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3566  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3567  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3568  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3569  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3570  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3571  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3572  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3573  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3574  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3575  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3576  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3577  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3578  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3579  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3580  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3581  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3582  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3583  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3584  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3585  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3586  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3587  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3588  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3589  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3590  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3591  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3592  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3593  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3594  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3595  // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3596  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3597  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3598  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3599  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3600  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3601  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3602  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3603  // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
3604  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3605  // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
3606  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3607  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3608  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3609  // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3610  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3611  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3612  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3613  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3614  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3615  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
3616  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3617  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
3618  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3619  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
3620  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3621  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
3622  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3623  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
3624  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3625  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
3626  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3627  // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
3628  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3629  // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
3630  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3631  // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
3632  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3633  // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
3634  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3635  // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
3636  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3637  // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
3638  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3639  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0
3640  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3641  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4
3642  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3643  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4
3644  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3645  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0
3646  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3647  // Convert__Reg1_1__Reg1_3__Reg1_0
3648  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3649  // Convert__Reg1_0__Reg1_2__Reg1_5
3650  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
3651  // Convert__Reg1_0__Reg1_2__Mem645_5
3652  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3653  // Convert__Reg1_1__Reg1_3__Mem645_0
3654  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3655  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4
3656  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3657  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0
3658  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3659  // Convert__Reg1_0__Reg1_2__Mem1285_5
3660  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3661  // Convert__Reg1_1__Reg1_3__Mem1285_0
3662  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3663  // Convert__Reg1_0__Mem2565_1
3664  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3665  // Convert__Reg1_1__Mem2565_0
3666  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3667  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4
3668  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3669  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0
3670  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3671  // Convert__Reg1_0__Reg1_2__Mem2565_5
3672  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3673  // Convert__Reg1_1__Reg1_3__Mem2565_0
3674  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3675  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4
3676  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3677  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0
3678  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3679  // Convert__Reg1_0__Reg1_2__Mem325_5
3680  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3681  // Convert__Reg1_1__Reg1_3__Mem325_0
3682  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3683  // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
3684  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
3685  // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
3686  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3687  // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
3688  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3689  // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
3690  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3691  // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
3692  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3693  // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
3694  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3695  // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
3696  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3697  // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
3698  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3699  // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
3700  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3701  // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
3702  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3703  // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
3704  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3705  // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
3706  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3707  // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
3708  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3709  // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
3710  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3711  // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
3712  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3713  // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
3714  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
3715  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
3716  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3717  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
3718  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3719  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
3720  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3721  // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
3722  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3723  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
3724  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3725  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
3726  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3727  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
3728  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3729  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
3730  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3731  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0
3732  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3733  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
3734  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3735  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0
3736  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3737  // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
3738  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3739  // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
3740  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3741  // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
3742  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3743  // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
3744  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3745  // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
3746  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3747  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3748  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3749  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3750  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3751  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3752  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3753  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3754  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3755  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3756  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3757  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3758  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3759  // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3760  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3761  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3762  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3763  // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
3764  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3765  // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
3766  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3767  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3768  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3769  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3770  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3771  // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
3772  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3773  // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
3774  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3775  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3776  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3777  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3778  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3779  // Convert__Reg1_2__Reg1_1
3780  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3781  // Convert__Mem2565_1__Reg1_0
3782  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3783  // Convert__Mem5125_1__Reg1_0
3784  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3785  // Convert__Mem2565_0__Reg1_1
3786  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3787  // Convert__Mem5125_0__Reg1_1
3788  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3789  // Convert__Mem1285_1__Reg1_3__Reg1_0
3790  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3791  // Convert__Mem2565_1__Reg1_3__Reg1_0
3792  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3793  // Convert__Mem5125_1__Reg1_3__Reg1_0
3794  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3795  // Convert__Mem1285_0__Reg1_2__Reg1_4
3796  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3797  // Convert__Mem2565_0__Reg1_2__Reg1_4
3798  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3799  // Convert__Mem5125_0__Reg1_2__Reg1_4
3800  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3801  // Convert__Reg1_2__Mem325_0
3802  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3803  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0
3804  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3805  // Convert__Reg1_2__Reg1_4__Mem325_0
3806  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3807  // Convert__Reg1_0__Reg1_1__AVX512RC1_2
3808  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3809  // Convert__Reg1_2__Reg1_1__AVX512RC1_0
3810  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3811  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4
3812  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3813  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0
3814  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3815  // Convert__Reg1_0__Reg1_2__Mem5125_5
3816  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3817  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5
3818  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
3819  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0
3820  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3821  // Convert__Reg1_1__Reg1_3__Mem5125_0
3822  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3823  // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
3824  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3825  // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
3826  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3827  // Convert__Reg1_2__Mem645_0
3828  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3829  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0
3830  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3831  // Convert__Reg1_2__Reg1_4__Mem645_0
3832  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3833  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1
3834  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3835  // Convert__Reg1_2__Reg1_4__Reg1_1
3836  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3837  // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
3838  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3839  // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
3840  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3841  // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
3842  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3843  // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
3844  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3845  // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
3846  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
3847  // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
3848  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3849  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5
3850  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3851  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0
3852  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3853  // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3854  { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3855  // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3856  { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3857  // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3858  { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3859  // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3860  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3861  // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3862  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3863  // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3864  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3865  // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
3866  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3867  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6
3868  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
3869  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0
3870  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3871  // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3872  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3873  // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
3874  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3875  // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
3876  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3877  // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
3878  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3879  // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
3880  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
3881  // Convert__Reg1_3__Reg1_2__Reg1_1
3882  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3883  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1
3884  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3885  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
3886  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3887  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3
3888  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3889  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3890  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3891  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3892  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3893  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3894  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3895  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0
3896  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3897  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3898  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3899  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3900  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3901  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3902  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3903  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4
3904  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3905  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4
3906  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3907  // Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0
3908  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3909  // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0
3910  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3911  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3912  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3913  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3914  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3915  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3916  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3917  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3918  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3919  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3920  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3921  // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3922  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3923  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3924  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3925  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
3926  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
3927  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4
3928  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3929  // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0
3930  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3931  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3932  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3933  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3
3934  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3935  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0
3936  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3937  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3938  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3939  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3940  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3941  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
3942  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3943  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3
3944  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3945  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0
3946  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3947  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3948  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3949  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3950  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3951  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
3952  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3953  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0
3954  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3955  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
3956  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3957  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2
3958  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3959  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2
3960  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3961  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0
3962  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3963  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0
3964  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3965  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2
3966  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3967  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3
3968  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3969  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0
3970  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3971  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0
3972  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3973  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6
3974  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3975  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6
3976  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3977  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6
3978  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3979  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6
3980  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3981  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3982  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3983  // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2
3984  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3985  // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0
3986  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3987  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6
3988  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3989  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0
3990  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3991  // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0
3992  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3993  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
3994  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3995  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
3996  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3997  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
3998  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3999  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
4000  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4001  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
4002  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4003  // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
4004  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4005  // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
4006  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4007  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
4008  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4009  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
4010  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4011  // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
4012  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4013  // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
4014  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4015  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
4016  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4017  // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
4018  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4019  // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
4020  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4021  // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
4022  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4023  // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4024  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4025  // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4026  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4027  // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4028  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4029  // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4030  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4031  // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
4032  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4033  // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
4034  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4035  // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
4036  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4037  // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4038  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4039  // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4040  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4041  // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4042  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4043  // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4044  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4045  // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4046  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4047  // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
4048  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4049  // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
4050  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4051  // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
4052  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4053  // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
4054  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4055  // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
4056  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4057  // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
4058  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4059  // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
4060  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4061  // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
4062  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4063  // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1
4064  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4065  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3
4066  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4067  // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1
4068  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4069  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3
4070  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4071  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4
4072  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4073  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4
4074  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4075  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4
4076  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4077  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0
4078  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4079  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0
4080  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4081  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0
4082  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4083  // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1
4084  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4085  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3
4086  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4087  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4
4088  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4089  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4
4090  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4091  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0
4092  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4093  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0
4094  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4095  // Convert__Reg1_1__Mem512_RC256X5_3
4096  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4097  // Convert__Reg1_2__Mem512_RC256X5_0
4098  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4099  // Convert__Reg1_1__Mem512_RC5125_3
4100  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4101  // Convert__Reg1_2__Mem512_RC5125_0
4102  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4103  // Convert__Reg1_1__Mem256_RC5125_3
4104  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4105  // Convert__Reg1_2__Mem256_RC5125_0
4106  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4107  // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1
4108  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4109  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3
4110  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4111  // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1
4112  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4113  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3
4114  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4115  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4
4116  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4117  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4
4118  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4119  // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4
4120  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4121  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0
4122  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4123  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0
4124  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4125  // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0
4126  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4127  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4128  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4129  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4130  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4131  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4132  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4133  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4134  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4135  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4136  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4137  // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4138  { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4139  // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
4140  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4141  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6
4142  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4143  // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
4144  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4145  // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
4146  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4147  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0
4148  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4149  // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
4150  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4151  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6
4152  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4153  // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0
4154  { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4155  // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
4156  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4157  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
4158  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4159  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
4160  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
4161  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
4162  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4163  // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4
4164  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4165  // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0
4166  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4167  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7
4168  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4169  // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4170  { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4171  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8
4172  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4173  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4174  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4175  // Convert__Mem1285_2__Reg1_1__Reg1_0
4176  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4177  // Convert__Mem2565_2__Reg1_1__Reg1_0
4178  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4179  // Convert__Mem1285_0__Reg1_1__Reg1_2
4180  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4181  // Convert__Mem2565_0__Reg1_1__Reg1_2
4182  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4183  // Convert__Reg1_0__Reg1_2__Reg1_4
4184  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4185  // Convert__Mem645_1__Reg1_3__Reg1_0
4186  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4187  // Convert__Mem645_0__Reg1_2__Reg1_4
4188  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4189  // Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0
4190  { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4191  // Convert__Mem325_1__Reg1_3__Reg1_0
4192  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4193  // Convert__Mem325_0__Reg1_2__Reg1_4
4194  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4195  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4
4196  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4197  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0
4198  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4199  // Convert__Reg1_0__Reg1_2__Mem85_5
4200  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4201  // Convert__Reg1_1__Reg1_3__Mem85_0
4202  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4203  // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4
4204  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4205  // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0
4206  { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4207  // Convert__Reg1_0__Reg1_2__Mem165_5
4208  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4209  // Convert__Reg1_1__Reg1_3__Mem165_0
4210  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4211  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
4212  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
4213  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
4214  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
4215  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
4216  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4217  // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17
4218  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4219  // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17
4220  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4221  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
4222  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4223  // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17
4224  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4225  // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17
4226  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4227  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
4228  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
4229  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
4230  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
4231  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
4232  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4233  // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1
4234  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4235  // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1
4236  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4237  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
4238  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4239  // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1
4240  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4241  // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1
4242  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4243  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
4244  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
4245  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
4246  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
4247  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
4248  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4249  // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16
4250  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4251  // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16
4252  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4253  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
4254  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4255  // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16
4256  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4257  // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16
4258  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4259  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
4260  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
4261  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
4262  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
4263  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
4264  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4265  // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0
4266  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4267  // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0
4268  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4269  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
4270  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4271  // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0
4272  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4273  // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0
4274  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4275  // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
4276  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4277  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
4278  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4279  // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
4280  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4281  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
4282  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4283  // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
4284  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4285  // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
4286  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4287  // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
4288  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4289  // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
4290  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4291  // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4292  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4293  // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4294  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4295  // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
4296  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4297  // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
4298  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4299  // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
4300  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4301  // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
4302  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4303  // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
4304  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4305  // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
4306  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4307  // Convert__Mem165_1__Reg1_3__Reg1_0
4308  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4309  // Convert__Mem165_0__Reg1_2__Reg1_4
4310  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4311  // Convert__Reg1_2__Mem1285_1__Reg1_0
4312  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4313  // Convert__Reg1_0__Mem1285_1__Reg1_2
4314  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
4315  // Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0
4316  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4317  // Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0
4318  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4319  // Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0
4320  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4321  // Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4
4322  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4323  // Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4
4324  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4325  // Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4
4326  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4327  // Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0
4328  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4329  // Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0
4330  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4331  // Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4
4332  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4333  // Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4
4334  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4335  // Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0
4336  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4337  // Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0
4338  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4339  // Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0
4340  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4341  // Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4
4342  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4343  // Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4
4344  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4345  // Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4
4346  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4347  // Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2
4348  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_2_2, CVT_Done },
4349  // Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1
4350  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_1_1, CVT_Done },
4351  // Convert__AbsMem161_0
4352  { CVT_95_addAbsMemOperands, 1, CVT_Done },
4353  // Convert__Reg1_1__Tie0_2_2
4354  { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done },
4355  // Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1
4356  { CVT_regEAX, 0, CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_1_1, CVT_Done },
4357};
4358
4359void X86AsmParser::
4360convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
4361                const OperandVector &Operands) {
4362  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
4363  const uint8_t *Converter = ConversionTable[Kind];
4364  unsigned OpIdx;
4365  Inst.setOpcode(Opcode);
4366  for (const uint8_t *p = Converter; *p; p+= 2) {
4367    OpIdx = *(p + 1);
4368    switch (*p) {
4369    default: llvm_unreachable("invalid conversion entry!");
4370    case CVT_Reg:
4371      static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4372      break;
4373    case CVT_Tied: {
4374      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
4375                          std::begin(TiedAsmOperandTable)) &&
4376             "Tied operand not found");
4377      unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
4378      if (TiedResOpnd != (uint8_t) -1)
4379        Inst.addOperand(Inst.getOperand(TiedResOpnd));
4380      break;
4381    }
4382    case CVT_imm_95_10:
4383      Inst.addOperand(MCOperand::createImm(10));
4384      break;
4385    case CVT_95_addImmOperands:
4386      static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
4387      break;
4388    case CVT_regAX:
4389      Inst.addOperand(MCOperand::createReg(X86::AX));
4390      break;
4391    case CVT_regEAX:
4392      Inst.addOperand(MCOperand::createReg(X86::EAX));
4393      break;
4394    case CVT_regRAX:
4395      Inst.addOperand(MCOperand::createReg(X86::RAX));
4396      break;
4397    case CVT_95_Reg:
4398      static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4399      break;
4400    case CVT_95_addMemOperands:
4401      static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5);
4402      break;
4403    case CVT_95_addAbsMemOperands:
4404      static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
4405      break;
4406    case CVT_95_addDstIdxOperands:
4407      static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
4408      break;
4409    case CVT_95_addSrcIdxOperands:
4410      static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
4411      break;
4412    case CVT_95_addGR32orGR64Operands:
4413      static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
4414      break;
4415    case CVT_regST1:
4416      Inst.addOperand(MCOperand::createReg(X86::ST1));
4417      break;
4418    case CVT_regST0:
4419      Inst.addOperand(MCOperand::createReg(X86::ST0));
4420      break;
4421    case CVT_95_addMemOffsOperands:
4422      static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
4423      break;
4424    case CVT_imm_95_17:
4425      Inst.addOperand(MCOperand::createImm(17));
4426      break;
4427    case CVT_imm_95_1:
4428      Inst.addOperand(MCOperand::createImm(1));
4429      break;
4430    case CVT_imm_95_16:
4431      Inst.addOperand(MCOperand::createImm(16));
4432      break;
4433    case CVT_imm_95_0:
4434      Inst.addOperand(MCOperand::createImm(0));
4435      break;
4436    case CVT_95_addAVX512RCOperands:
4437      static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
4438      break;
4439    }
4440  }
4441}
4442
4443void X86AsmParser::
4444convertToMapAndConstraints(unsigned Kind,
4445                           const OperandVector &Operands) {
4446  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
4447  unsigned NumMCOperands = 0;
4448  const uint8_t *Converter = ConversionTable[Kind];
4449  for (const uint8_t *p = Converter; *p; p+= 2) {
4450    switch (*p) {
4451    default: llvm_unreachable("invalid conversion entry!");
4452    case CVT_Reg:
4453      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4454      Operands[*(p + 1)]->setConstraint("r");
4455      ++NumMCOperands;
4456      break;
4457    case CVT_Tied:
4458      ++NumMCOperands;
4459      break;
4460    case CVT_imm_95_10:
4461      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4462      Operands[*(p + 1)]->setConstraint("");
4463      ++NumMCOperands;
4464      break;
4465    case CVT_95_addImmOperands:
4466      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4467      Operands[*(p + 1)]->setConstraint("m");
4468      NumMCOperands += 1;
4469      break;
4470    case CVT_regAX:
4471      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4472      Operands[*(p + 1)]->setConstraint("m");
4473      ++NumMCOperands;
4474      break;
4475    case CVT_regEAX:
4476      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4477      Operands[*(p + 1)]->setConstraint("m");
4478      ++NumMCOperands;
4479      break;
4480    case CVT_regRAX:
4481      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4482      Operands[*(p + 1)]->setConstraint("m");
4483      ++NumMCOperands;
4484      break;
4485    case CVT_95_Reg:
4486      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4487      Operands[*(p + 1)]->setConstraint("r");
4488      NumMCOperands += 1;
4489      break;
4490    case CVT_95_addMemOperands:
4491      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4492      Operands[*(p + 1)]->setConstraint("m");
4493      NumMCOperands += 5;
4494      break;
4495    case CVT_95_addAbsMemOperands:
4496      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4497      Operands[*(p + 1)]->setConstraint("m");
4498      NumMCOperands += 1;
4499      break;
4500    case CVT_95_addDstIdxOperands:
4501      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4502      Operands[*(p + 1)]->setConstraint("m");
4503      NumMCOperands += 1;
4504      break;
4505    case CVT_95_addSrcIdxOperands:
4506      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4507      Operands[*(p + 1)]->setConstraint("m");
4508      NumMCOperands += 2;
4509      break;
4510    case CVT_95_addGR32orGR64Operands:
4511      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4512      Operands[*(p + 1)]->setConstraint("m");
4513      NumMCOperands += 1;
4514      break;
4515    case CVT_regST1:
4516      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4517      Operands[*(p + 1)]->setConstraint("m");
4518      ++NumMCOperands;
4519      break;
4520    case CVT_regST0:
4521      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4522      Operands[*(p + 1)]->setConstraint("m");
4523      ++NumMCOperands;
4524      break;
4525    case CVT_95_addMemOffsOperands:
4526      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4527      Operands[*(p + 1)]->setConstraint("m");
4528      NumMCOperands += 2;
4529      break;
4530    case CVT_imm_95_17:
4531      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4532      Operands[*(p + 1)]->setConstraint("");
4533      ++NumMCOperands;
4534      break;
4535    case CVT_imm_95_1:
4536      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4537      Operands[*(p + 1)]->setConstraint("");
4538      ++NumMCOperands;
4539      break;
4540    case CVT_imm_95_16:
4541      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4542      Operands[*(p + 1)]->setConstraint("");
4543      ++NumMCOperands;
4544      break;
4545    case CVT_imm_95_0:
4546      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4547      Operands[*(p + 1)]->setConstraint("");
4548      ++NumMCOperands;
4549      break;
4550    case CVT_95_addAVX512RCOperands:
4551      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4552      Operands[*(p + 1)]->setConstraint("m");
4553      NumMCOperands += 1;
4554      break;
4555    }
4556  }
4557}
4558
4559namespace {
4560
4561/// MatchClassKind - The kinds of classes which participate in
4562/// instruction matching.
4563enum MatchClassKind {
4564  InvalidMatchClass = 0,
4565  OptionalMatchClass = 1,
4566  MCK__STAR_, // '*'
4567  MCK_b, // 'b'
4568  MCK_d, // 'd'
4569  MCK_pd, // 'pd'
4570  MCK_ps, // 'ps'
4571  MCK_q, // 'q'
4572  MCK_sd, // 'sd'
4573  MCK_ss, // 'ss'
4574  MCK_ub, // 'ub'
4575  MCK_ud, // 'ud'
4576  MCK_uq, // 'uq'
4577  MCK_uw, // 'uw'
4578  MCK_w, // 'w'
4579  MCK__123_, // '{'
4580  MCK__123_1to16_125_, // '{1to16}'
4581  MCK__123_1to2_125_, // '{1to2}'
4582  MCK__123_1to4_125_, // '{1to4}'
4583  MCK__123_1to8_125_, // '{1to8}'
4584  MCK__123_sae_125_, // '{sae}'
4585  MCK__123_z_125_, // '{z}'
4586  MCK__125_, // '}'
4587  MCK_LAST_TOKEN = MCK__125_,
4588  MCK_Reg50, // derived register class
4589  MCK_Reg52, // derived register class
4590  MCK_AL, // register class 'AL'
4591  MCK_AX, // register class 'AX'
4592  MCK_CCR, // register class 'CCR'
4593  MCK_CL, // register class 'CL'
4594  MCK_CS, // register class 'CS'
4595  MCK_DFCCR, // register class 'DFCCR'
4596  MCK_DS, // register class 'DS'
4597  MCK_DX, // register class 'DX'
4598  MCK_EAX, // register class 'EAX'
4599  MCK_EBX, // register class 'EBX'
4600  MCK_ECX, // register class 'ECX'
4601  MCK_EDX, // register class 'EDX'
4602  MCK_ES, // register class 'ES'
4603  MCK_FPCCR, // register class 'FPCCR'
4604  MCK_FS, // register class 'FS'
4605  MCK_GS, // register class 'GS'
4606  MCK_RAX, // register class 'RAX'
4607  MCK_RBX, // register class 'RBX'
4608  MCK_RCX, // register class 'RCX'
4609  MCK_RDX, // register class 'RDX'
4610  MCK_SS, // register class 'SS'
4611  MCK_ST0, // register class 'ST0'
4612  MCK_XMM0, // register class 'XMM0'
4613  MCK_Reg51, // derived register class
4614  MCK_GR32_AD, // register class 'GR32_AD'
4615  MCK_GR64_AD, // register class 'GR64_AD'
4616  MCK_Reg30, // derived register class
4617  MCK_GR32_TC, // register class 'GR32_TC'
4618  MCK_Reg46, // derived register class
4619  MCK_BNDR, // register class 'BNDR'
4620  MCK_GR16_ABCD, // register class 'GR16_ABCD'
4621  MCK_GR32_ABCD, // register class 'GR32_ABCD'
4622  MCK_GR64_ABCD, // register class 'GR64_ABCD'
4623  MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
4624  MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
4625  MCK_Reg38, // derived register class
4626  MCK_Reg41, // derived register class
4627  MCK_Reg44, // derived register class
4628  MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
4629  MCK_Reg42, // derived register class
4630  MCK_Reg45, // derived register class
4631  MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
4632  MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
4633  MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
4634  MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
4635  MCK_Reg33, // derived register class
4636  MCK_Reg39, // derived register class
4637  MCK_Reg64, // derived register class
4638  MCK_Reg67, // derived register class
4639  MCK_GR16_NOREX, // register class 'GR16_NOREX'
4640  MCK_GR32_NOREX, // register class 'GR32_NOREX'
4641  MCK_GR64_TCW64, // register class 'GR64_TCW64'
4642  MCK_GR8_NOREX, // register class 'GR8_NOREX'
4643  MCK_RST, // register class 'RST'
4644  MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
4645  MCK_VR128H, // register class 'VR128H'
4646  MCK_VR128L, // register class 'VR128L'
4647  MCK_VR256H, // register class 'VR256H'
4648  MCK_VR256L, // register class 'VR256L'
4649  MCK_VR64, // register class 'VR64'
4650  MCK_Reg23, // derived register class
4651  MCK_GR64_NOREX, // register class 'GR64_NOREX'
4652  MCK_GR64_TC, // register class 'GR64_TC'
4653  MCK_GRH8, // register class 'GRH8'
4654  MCK_GR32_NOSP, // register class 'GR32_NOSP'
4655  MCK_GR64_NOSP, // register class 'GR64_NOSP'
4656  MCK_Reg34, // derived register class
4657  MCK_Reg65, // derived register class
4658  MCK_CONTROL_REG, // register class 'CONTROL_REG'
4659  MCK_DEBUG_REG, // register class 'DEBUG_REG'
4660  MCK_FR32, // register class 'FR32,FR64,VR128'
4661  MCK_GR16, // register class 'GR16'
4662  MCK_GR32, // register class 'GR32'
4663  MCK_VR256, // register class 'VR256'
4664  MCK_Reg20, // derived register class
4665  MCK_GR64, // register class 'GR64'
4666  MCK_GRH16, // register class 'GRH16'
4667  MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
4668  MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
4669  MCK_GR8, // register class 'GR8'
4670  MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
4671  MCK_VR256X, // register class 'VR256X'
4672  MCK_VR512, // register class 'VR512'
4673  MCK_LAST_REGISTER = MCK_VR512,
4674  MCK_AVX512RC, // user defined class 'AVX512RCOperand'
4675  MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
4676  MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
4677  MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
4678  MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
4679  MCK_Imm, // user defined class 'ImmAsmOperand'
4680  MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
4681  MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
4682  MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
4683  MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
4684  MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
4685  MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
4686  MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
4687  MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
4688  MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
4689  MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
4690  MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
4691  MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
4692  MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
4693  MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
4694  MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
4695  MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
4696  MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
4697  MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
4698  MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
4699  MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
4700  MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
4701  MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
4702  MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
4703  MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
4704  MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
4705  MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
4706  MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
4707  MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
4708  MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
4709  MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
4710  MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
4711  MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
4712  MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
4713  MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
4714  MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
4715  MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
4716  MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
4717  MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
4718  MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
4719  MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
4720  MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
4721  MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
4722  MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
4723  MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
4724  MCK_Mem, // user defined class 'X86MemAsmOperand'
4725  NumMatchClassKinds
4726};
4727
4728}
4729
4730static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
4731  return MCTargetAsmParser::Match_InvalidOperand;
4732}
4733
4734static MatchClassKind matchTokenString(StringRef Name) {
4735  switch (Name.size()) {
4736  default: break;
4737  case 1:	 // 7 strings to match.
4738    switch (Name[0]) {
4739    default: break;
4740    case '*':	 // 1 string to match.
4741      return MCK__STAR_;	 // "*"
4742    case 'b':	 // 1 string to match.
4743      return MCK_b;	 // "b"
4744    case 'd':	 // 1 string to match.
4745      return MCK_d;	 // "d"
4746    case 'q':	 // 1 string to match.
4747      return MCK_q;	 // "q"
4748    case 'w':	 // 1 string to match.
4749      return MCK_w;	 // "w"
4750    case '{':	 // 1 string to match.
4751      return MCK__123_;	 // "{"
4752    case '}':	 // 1 string to match.
4753      return MCK__125_;	 // "}"
4754    }
4755    break;
4756  case 2:	 // 8 strings to match.
4757    switch (Name[0]) {
4758    default: break;
4759    case 'p':	 // 2 strings to match.
4760      switch (Name[1]) {
4761      default: break;
4762      case 'd':	 // 1 string to match.
4763        return MCK_pd;	 // "pd"
4764      case 's':	 // 1 string to match.
4765        return MCK_ps;	 // "ps"
4766      }
4767      break;
4768    case 's':	 // 2 strings to match.
4769      switch (Name[1]) {
4770      default: break;
4771      case 'd':	 // 1 string to match.
4772        return MCK_sd;	 // "sd"
4773      case 's':	 // 1 string to match.
4774        return MCK_ss;	 // "ss"
4775      }
4776      break;
4777    case 'u':	 // 4 strings to match.
4778      switch (Name[1]) {
4779      default: break;
4780      case 'b':	 // 1 string to match.
4781        return MCK_ub;	 // "ub"
4782      case 'd':	 // 1 string to match.
4783        return MCK_ud;	 // "ud"
4784      case 'q':	 // 1 string to match.
4785        return MCK_uq;	 // "uq"
4786      case 'w':	 // 1 string to match.
4787        return MCK_uw;	 // "uw"
4788      }
4789      break;
4790    }
4791    break;
4792  case 3:	 // 1 string to match.
4793    if (memcmp(Name.data()+0, "{z}", 3) != 0)
4794      break;
4795    return MCK__123_z_125_;	 // "{z}"
4796  case 5:	 // 1 string to match.
4797    if (memcmp(Name.data()+0, "{sae}", 5) != 0)
4798      break;
4799    return MCK__123_sae_125_;	 // "{sae}"
4800  case 6:	 // 3 strings to match.
4801    if (memcmp(Name.data()+0, "{1to", 4) != 0)
4802      break;
4803    switch (Name[4]) {
4804    default: break;
4805    case '2':	 // 1 string to match.
4806      if (Name[5] != '}')
4807        break;
4808      return MCK__123_1to2_125_;	 // "{1to2}"
4809    case '4':	 // 1 string to match.
4810      if (Name[5] != '}')
4811        break;
4812      return MCK__123_1to4_125_;	 // "{1to4}"
4813    case '8':	 // 1 string to match.
4814      if (Name[5] != '}')
4815        break;
4816      return MCK__123_1to8_125_;	 // "{1to8}"
4817    }
4818    break;
4819  case 7:	 // 1 string to match.
4820    if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
4821      break;
4822    return MCK__123_1to16_125_;	 // "{1to16}"
4823  }
4824  return InvalidMatchClass;
4825}
4826
4827/// isSubclass - Compute whether \p A is a subclass of \p B.
4828static bool isSubclass(MatchClassKind A, MatchClassKind B) {
4829  if (A == B)
4830    return true;
4831
4832  switch (A) {
4833  default:
4834    return false;
4835
4836  case MCK_Reg50:
4837    switch (B) {
4838    default: return false;
4839    case MCK_Reg51: return true;
4840    case MCK_GR64_NOREX_NOSP: return true;
4841    case MCK_Reg33: return true;
4842    case MCK_Reg23: return true;
4843    case MCK_GR64_NOREX: return true;
4844    case MCK_GR64_NOSP: return true;
4845    case MCK_Reg34: return true;
4846    case MCK_Reg20: return true;
4847    case MCK_GR64: return true;
4848    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4849    }
4850
4851  case MCK_Reg52:
4852    switch (B) {
4853    default: return false;
4854    case MCK_Reg51: return true;
4855    case MCK_Reg46: return true;
4856    case MCK_Reg41: return true;
4857    case MCK_Reg45: return true;
4858    case MCK_GR64_TCW64: return true;
4859    case MCK_GR64_NOREX: return true;
4860    case MCK_GR64_TC: return true;
4861    case MCK_GR64: return true;
4862    case MCK_LOW32_ADDR_ACCESS: return true;
4863    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4864    }
4865
4866  case MCK_AL:
4867    switch (B) {
4868    default: return false;
4869    case MCK_GR8_ABCD_L: return true;
4870    case MCK_GR8_NOREX: return true;
4871    case MCK_GR8: return true;
4872    }
4873
4874  case MCK_AX:
4875    switch (B) {
4876    default: return false;
4877    case MCK_GR16_ABCD: return true;
4878    case MCK_GR16_NOREX: return true;
4879    case MCK_GR16: return true;
4880    }
4881
4882  case MCK_CL:
4883    switch (B) {
4884    default: return false;
4885    case MCK_GR8_ABCD_L: return true;
4886    case MCK_GR8_NOREX: return true;
4887    case MCK_GR8: return true;
4888    }
4889
4890  case MCK_CS:
4891    return B == MCK_SEGMENT_REG;
4892
4893  case MCK_DS:
4894    return B == MCK_SEGMENT_REG;
4895
4896  case MCK_DX:
4897    switch (B) {
4898    default: return false;
4899    case MCK_GR16_ABCD: return true;
4900    case MCK_GR16_NOREX: return true;
4901    case MCK_GR16: return true;
4902    }
4903
4904  case MCK_EAX:
4905    switch (B) {
4906    default: return false;
4907    case MCK_GR32_AD: return true;
4908    case MCK_GR32_TC: return true;
4909    case MCK_GR32_ABCD: return true;
4910    case MCK_GR32_NOREX_NOSP: return true;
4911    case MCK_GR32_NOREX: return true;
4912    case MCK_Reg23: return true;
4913    case MCK_GR32_NOSP: return true;
4914    case MCK_GR32: return true;
4915    case MCK_Reg20: return true;
4916    case MCK_LOW32_ADDR_ACCESS: return true;
4917    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4918    }
4919
4920  case MCK_EBX:
4921    switch (B) {
4922    default: return false;
4923    case MCK_GR32_ABCD: return true;
4924    case MCK_GR32_NOREX_NOSP: return true;
4925    case MCK_GR32_NOREX: return true;
4926    case MCK_Reg23: return true;
4927    case MCK_GR32_NOSP: return true;
4928    case MCK_GR32: return true;
4929    case MCK_Reg20: return true;
4930    case MCK_LOW32_ADDR_ACCESS: return true;
4931    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4932    }
4933
4934  case MCK_ECX:
4935    switch (B) {
4936    default: return false;
4937    case MCK_GR32_TC: return true;
4938    case MCK_GR32_ABCD: return true;
4939    case MCK_GR32_NOREX_NOSP: return true;
4940    case MCK_GR32_NOREX: return true;
4941    case MCK_Reg23: return true;
4942    case MCK_GR32_NOSP: return true;
4943    case MCK_GR32: return true;
4944    case MCK_Reg20: return true;
4945    case MCK_LOW32_ADDR_ACCESS: return true;
4946    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4947    }
4948
4949  case MCK_EDX:
4950    switch (B) {
4951    default: return false;
4952    case MCK_GR32_AD: return true;
4953    case MCK_GR32_TC: return true;
4954    case MCK_GR32_ABCD: return true;
4955    case MCK_GR32_NOREX_NOSP: return true;
4956    case MCK_GR32_NOREX: return true;
4957    case MCK_Reg23: return true;
4958    case MCK_GR32_NOSP: return true;
4959    case MCK_GR32: return true;
4960    case MCK_Reg20: return true;
4961    case MCK_LOW32_ADDR_ACCESS: return true;
4962    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4963    }
4964
4965  case MCK_ES:
4966    return B == MCK_SEGMENT_REG;
4967
4968  case MCK_FS:
4969    return B == MCK_SEGMENT_REG;
4970
4971  case MCK_GS:
4972    return B == MCK_SEGMENT_REG;
4973
4974  case MCK_RAX:
4975    switch (B) {
4976    default: return false;
4977    case MCK_GR64_AD: return true;
4978    case MCK_Reg30: return true;
4979    case MCK_Reg46: return true;
4980    case MCK_GR64_ABCD: return true;
4981    case MCK_Reg38: return true;
4982    case MCK_Reg41: return true;
4983    case MCK_Reg44: return true;
4984    case MCK_Reg42: return true;
4985    case MCK_Reg45: return true;
4986    case MCK_GR64_NOREX_NOSP: return true;
4987    case MCK_Reg33: return true;
4988    case MCK_Reg39: return true;
4989    case MCK_GR64_TCW64: return true;
4990    case MCK_GR64_NOREX: return true;
4991    case MCK_GR64_TC: return true;
4992    case MCK_GR64_NOSP: return true;
4993    case MCK_Reg34: return true;
4994    case MCK_GR64: return true;
4995    }
4996
4997  case MCK_RBX:
4998    switch (B) {
4999    default: return false;
5000    case MCK_GR64_ABCD: return true;
5001    case MCK_GR64_NOREX_NOSP: return true;
5002    case MCK_Reg33: return true;
5003    case MCK_GR64_NOREX: return true;
5004    case MCK_GR64_NOSP: return true;
5005    case MCK_Reg34: return true;
5006    case MCK_GR64: return true;
5007    }
5008
5009  case MCK_RCX:
5010    switch (B) {
5011    default: return false;
5012    case MCK_Reg30: return true;
5013    case MCK_Reg46: return true;
5014    case MCK_GR64_ABCD: return true;
5015    case MCK_Reg38: return true;
5016    case MCK_Reg41: return true;
5017    case MCK_Reg44: return true;
5018    case MCK_Reg42: return true;
5019    case MCK_Reg45: return true;
5020    case MCK_GR64_NOREX_NOSP: return true;
5021    case MCK_Reg33: return true;
5022    case MCK_Reg39: return true;
5023    case MCK_GR64_TCW64: return true;
5024    case MCK_GR64_NOREX: return true;
5025    case MCK_GR64_TC: return true;
5026    case MCK_GR64_NOSP: return true;
5027    case MCK_Reg34: return true;
5028    case MCK_GR64: return true;
5029    }
5030
5031  case MCK_RDX:
5032    switch (B) {
5033    default: return false;
5034    case MCK_GR64_AD: return true;
5035    case MCK_Reg30: return true;
5036    case MCK_Reg46: return true;
5037    case MCK_GR64_ABCD: return true;
5038    case MCK_Reg38: return true;
5039    case MCK_Reg41: return true;
5040    case MCK_Reg44: return true;
5041    case MCK_Reg42: return true;
5042    case MCK_Reg45: return true;
5043    case MCK_GR64_NOREX_NOSP: return true;
5044    case MCK_Reg33: return true;
5045    case MCK_Reg39: return true;
5046    case MCK_GR64_TCW64: return true;
5047    case MCK_GR64_NOREX: return true;
5048    case MCK_GR64_TC: return true;
5049    case MCK_GR64_NOSP: return true;
5050    case MCK_Reg34: return true;
5051    case MCK_GR64: return true;
5052    }
5053
5054  case MCK_SS:
5055    return B == MCK_SEGMENT_REG;
5056
5057  case MCK_ST0:
5058    return B == MCK_RST;
5059
5060  case MCK_XMM0:
5061    switch (B) {
5062    default: return false;
5063    case MCK_VR128L: return true;
5064    case MCK_FR32: return true;
5065    case MCK_FR32X: return true;
5066    }
5067
5068  case MCK_Reg51:
5069    switch (B) {
5070    default: return false;
5071    case MCK_GR64_NOREX: return true;
5072    case MCK_GR64: return true;
5073    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5074    }
5075
5076  case MCK_GR32_AD:
5077    switch (B) {
5078    default: return false;
5079    case MCK_GR32_TC: return true;
5080    case MCK_GR32_ABCD: return true;
5081    case MCK_GR32_NOREX_NOSP: return true;
5082    case MCK_GR32_NOREX: return true;
5083    case MCK_Reg23: return true;
5084    case MCK_GR32_NOSP: return true;
5085    case MCK_GR32: return true;
5086    case MCK_Reg20: return true;
5087    case MCK_LOW32_ADDR_ACCESS: return true;
5088    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5089    }
5090
5091  case MCK_GR64_AD:
5092    switch (B) {
5093    default: return false;
5094    case MCK_Reg30: return true;
5095    case MCK_Reg46: return true;
5096    case MCK_GR64_ABCD: return true;
5097    case MCK_Reg38: return true;
5098    case MCK_Reg41: return true;
5099    case MCK_Reg44: return true;
5100    case MCK_Reg42: return true;
5101    case MCK_Reg45: return true;
5102    case MCK_GR64_NOREX_NOSP: return true;
5103    case MCK_Reg33: return true;
5104    case MCK_Reg39: return true;
5105    case MCK_GR64_TCW64: return true;
5106    case MCK_GR64_NOREX: return true;
5107    case MCK_GR64_TC: return true;
5108    case MCK_GR64_NOSP: return true;
5109    case MCK_Reg34: return true;
5110    case MCK_GR64: return true;
5111    }
5112
5113  case MCK_Reg30:
5114    switch (B) {
5115    default: return false;
5116    case MCK_Reg46: return true;
5117    case MCK_GR64_ABCD: return true;
5118    case MCK_Reg38: return true;
5119    case MCK_Reg41: return true;
5120    case MCK_Reg44: return true;
5121    case MCK_Reg42: return true;
5122    case MCK_Reg45: return true;
5123    case MCK_GR64_NOREX_NOSP: return true;
5124    case MCK_Reg33: return true;
5125    case MCK_Reg39: return true;
5126    case MCK_GR64_TCW64: return true;
5127    case MCK_GR64_NOREX: return true;
5128    case MCK_GR64_TC: return true;
5129    case MCK_GR64_NOSP: return true;
5130    case MCK_Reg34: return true;
5131    case MCK_GR64: return true;
5132    }
5133
5134  case MCK_GR32_TC:
5135    switch (B) {
5136    default: return false;
5137    case MCK_GR32_ABCD: return true;
5138    case MCK_GR32_NOREX_NOSP: return true;
5139    case MCK_GR32_NOREX: return true;
5140    case MCK_Reg23: return true;
5141    case MCK_GR32_NOSP: return true;
5142    case MCK_GR32: return true;
5143    case MCK_Reg20: return true;
5144    case MCK_LOW32_ADDR_ACCESS: return true;
5145    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5146    }
5147
5148  case MCK_Reg46:
5149    switch (B) {
5150    default: return false;
5151    case MCK_Reg41: return true;
5152    case MCK_Reg45: return true;
5153    case MCK_GR64_TCW64: return true;
5154    case MCK_GR64_NOREX: return true;
5155    case MCK_GR64_TC: return true;
5156    case MCK_GR64: return true;
5157    }
5158
5159  case MCK_GR16_ABCD:
5160    switch (B) {
5161    default: return false;
5162    case MCK_GR16_NOREX: return true;
5163    case MCK_GR16: return true;
5164    }
5165
5166  case MCK_GR32_ABCD:
5167    switch (B) {
5168    default: return false;
5169    case MCK_GR32_NOREX_NOSP: return true;
5170    case MCK_GR32_NOREX: return true;
5171    case MCK_Reg23: return true;
5172    case MCK_GR32_NOSP: return true;
5173    case MCK_GR32: return true;
5174    case MCK_Reg20: return true;
5175    case MCK_LOW32_ADDR_ACCESS: return true;
5176    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5177    }
5178
5179  case MCK_GR64_ABCD:
5180    switch (B) {
5181    default: return false;
5182    case MCK_GR64_NOREX_NOSP: return true;
5183    case MCK_Reg33: return true;
5184    case MCK_GR64_NOREX: return true;
5185    case MCK_GR64_NOSP: return true;
5186    case MCK_Reg34: return true;
5187    case MCK_GR64: return true;
5188    }
5189
5190  case MCK_GR8_ABCD_H:
5191    switch (B) {
5192    default: return false;
5193    case MCK_GR8_NOREX: return true;
5194    case MCK_GR8: return true;
5195    }
5196
5197  case MCK_GR8_ABCD_L:
5198    switch (B) {
5199    default: return false;
5200    case MCK_GR8_NOREX: return true;
5201    case MCK_GR8: return true;
5202    }
5203
5204  case MCK_Reg38:
5205    switch (B) {
5206    default: return false;
5207    case MCK_Reg41: return true;
5208    case MCK_GR64_NOREX_NOSP: return true;
5209    case MCK_Reg33: return true;
5210    case MCK_Reg39: return true;
5211    case MCK_GR64_NOREX: return true;
5212    case MCK_GR64_TC: return true;
5213    case MCK_GR64_NOSP: return true;
5214    case MCK_Reg34: return true;
5215    case MCK_GR64: return true;
5216    }
5217
5218  case MCK_Reg41:
5219    switch (B) {
5220    default: return false;
5221    case MCK_GR64_NOREX: return true;
5222    case MCK_GR64_TC: return true;
5223    case MCK_GR64: return true;
5224    }
5225
5226  case MCK_Reg44:
5227    switch (B) {
5228    default: return false;
5229    case MCK_Reg42: return true;
5230    case MCK_Reg45: return true;
5231    case MCK_Reg39: return true;
5232    case MCK_GR64_TCW64: return true;
5233    case MCK_GR64_TC: return true;
5234    case MCK_GR64_NOSP: return true;
5235    case MCK_Reg34: return true;
5236    case MCK_GR64: return true;
5237    }
5238
5239  case MCK_Reg42:
5240    switch (B) {
5241    default: return false;
5242    case MCK_GR64_TCW64: return true;
5243    case MCK_GR64_NOSP: return true;
5244    case MCK_Reg34: return true;
5245    case MCK_GR64: return true;
5246    }
5247
5248  case MCK_Reg45:
5249    switch (B) {
5250    default: return false;
5251    case MCK_GR64_TCW64: return true;
5252    case MCK_GR64_TC: return true;
5253    case MCK_GR64: return true;
5254    }
5255
5256  case MCK_GR32_NOREX_NOSP:
5257    switch (B) {
5258    default: return false;
5259    case MCK_GR32_NOREX: return true;
5260    case MCK_Reg23: return true;
5261    case MCK_GR32_NOSP: return true;
5262    case MCK_GR32: return true;
5263    case MCK_Reg20: return true;
5264    case MCK_LOW32_ADDR_ACCESS: return true;
5265    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5266    }
5267
5268  case MCK_GR64_NOREX_NOSP:
5269    switch (B) {
5270    default: return false;
5271    case MCK_Reg33: return true;
5272    case MCK_GR64_NOREX: return true;
5273    case MCK_GR64_NOSP: return true;
5274    case MCK_Reg34: return true;
5275    case MCK_GR64: return true;
5276    }
5277
5278  case MCK_VK16WM:
5279    return B == MCK_VK1;
5280
5281  case MCK_Reg33:
5282    switch (B) {
5283    default: return false;
5284    case MCK_GR64_NOREX: return true;
5285    case MCK_Reg34: return true;
5286    case MCK_GR64: return true;
5287    }
5288
5289  case MCK_Reg39:
5290    switch (B) {
5291    default: return false;
5292    case MCK_GR64_TC: return true;
5293    case MCK_GR64_NOSP: return true;
5294    case MCK_Reg34: return true;
5295    case MCK_GR64: return true;
5296    }
5297
5298  case MCK_Reg64:
5299    switch (B) {
5300    default: return false;
5301    case MCK_Reg65: return true;
5302    case MCK_VR512: return true;
5303    }
5304
5305  case MCK_Reg67:
5306    switch (B) {
5307    default: return false;
5308    case MCK_Reg65: return true;
5309    case MCK_VR512: return true;
5310    }
5311
5312  case MCK_GR16_NOREX:
5313    return B == MCK_GR16;
5314
5315  case MCK_GR32_NOREX:
5316    switch (B) {
5317    default: return false;
5318    case MCK_Reg23: return true;
5319    case MCK_GR32: return true;
5320    case MCK_Reg20: return true;
5321    case MCK_LOW32_ADDR_ACCESS: return true;
5322    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5323    }
5324
5325  case MCK_GR64_TCW64:
5326    return B == MCK_GR64;
5327
5328  case MCK_GR8_NOREX:
5329    return B == MCK_GR8;
5330
5331  case MCK_VR128H:
5332    switch (B) {
5333    default: return false;
5334    case MCK_FR32: return true;
5335    case MCK_FR32X: return true;
5336    }
5337
5338  case MCK_VR128L:
5339    switch (B) {
5340    default: return false;
5341    case MCK_FR32: return true;
5342    case MCK_FR32X: return true;
5343    }
5344
5345  case MCK_VR256H:
5346    switch (B) {
5347    default: return false;
5348    case MCK_VR256: return true;
5349    case MCK_VR256X: return true;
5350    }
5351
5352  case MCK_VR256L:
5353    switch (B) {
5354    default: return false;
5355    case MCK_VR256: return true;
5356    case MCK_VR256X: return true;
5357    }
5358
5359  case MCK_Reg23:
5360    switch (B) {
5361    default: return false;
5362    case MCK_Reg20: return true;
5363    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5364    }
5365
5366  case MCK_GR64_NOREX:
5367    return B == MCK_GR64;
5368
5369  case MCK_GR64_TC:
5370    return B == MCK_GR64;
5371
5372  case MCK_GR32_NOSP:
5373    switch (B) {
5374    default: return false;
5375    case MCK_GR32: return true;
5376    case MCK_Reg20: return true;
5377    case MCK_LOW32_ADDR_ACCESS: return true;
5378    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5379    }
5380
5381  case MCK_GR64_NOSP:
5382    switch (B) {
5383    default: return false;
5384    case MCK_Reg34: return true;
5385    case MCK_GR64: return true;
5386    }
5387
5388  case MCK_Reg34:
5389    return B == MCK_GR64;
5390
5391  case MCK_Reg65:
5392    return B == MCK_VR512;
5393
5394  case MCK_FR32:
5395    return B == MCK_FR32X;
5396
5397  case MCK_GR32:
5398    switch (B) {
5399    default: return false;
5400    case MCK_Reg20: return true;
5401    case MCK_LOW32_ADDR_ACCESS: return true;
5402    case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5403    }
5404
5405  case MCK_VR256:
5406    return B == MCK_VR256X;
5407
5408  case MCK_Reg20:
5409    return B == MCK_LOW32_ADDR_ACCESS_RBP;
5410
5411  case MCK_LOW32_ADDR_ACCESS:
5412    return B == MCK_LOW32_ADDR_ACCESS_RBP;
5413
5414  case MCK_ImmSExti64i8:
5415    switch (B) {
5416    default: return false;
5417    case MCK_ImmSExti16i8: return true;
5418    case MCK_ImmSExti32i8: return true;
5419    case MCK_ImmSExti64i32: return true;
5420    case MCK_Imm: return true;
5421    }
5422
5423  case MCK_ImmSExti16i8:
5424    switch (B) {
5425    default: return false;
5426    case MCK_ImmSExti64i32: return true;
5427    case MCK_Imm: return true;
5428    }
5429
5430  case MCK_ImmSExti32i8:
5431    return B == MCK_Imm;
5432
5433  case MCK_ImmSExti64i32:
5434    return B == MCK_Imm;
5435
5436  case MCK_AbsMem16:
5437    switch (B) {
5438    default: return false;
5439    case MCK_AbsMem: return true;
5440    case MCK_Mem: return true;
5441    }
5442
5443  case MCK_DstIdx16:
5444    switch (B) {
5445    default: return false;
5446    case MCK_Mem16: return true;
5447    case MCK_Mem: return true;
5448    }
5449
5450  case MCK_DstIdx32:
5451    switch (B) {
5452    default: return false;
5453    case MCK_Mem32: return true;
5454    case MCK_Mem: return true;
5455    }
5456
5457  case MCK_DstIdx64:
5458    switch (B) {
5459    default: return false;
5460    case MCK_Mem64: return true;
5461    case MCK_Mem: return true;
5462    }
5463
5464  case MCK_DstIdx8:
5465    switch (B) {
5466    default: return false;
5467    case MCK_Mem8: return true;
5468    case MCK_Mem: return true;
5469    }
5470
5471  case MCK_MemOffs16_16:
5472    switch (B) {
5473    default: return false;
5474    case MCK_Mem16: return true;
5475    case MCK_Mem: return true;
5476    }
5477
5478  case MCK_MemOffs16_32:
5479    switch (B) {
5480    default: return false;
5481    case MCK_Mem32: return true;
5482    case MCK_Mem: return true;
5483    }
5484
5485  case MCK_MemOffs16_8:
5486    switch (B) {
5487    default: return false;
5488    case MCK_Mem8: return true;
5489    case MCK_Mem: return true;
5490    }
5491
5492  case MCK_MemOffs32_16:
5493    switch (B) {
5494    default: return false;
5495    case MCK_Mem16: return true;
5496    case MCK_Mem: return true;
5497    }
5498
5499  case MCK_MemOffs32_32:
5500    switch (B) {
5501    default: return false;
5502    case MCK_Mem32: return true;
5503    case MCK_Mem: return true;
5504    }
5505
5506  case MCK_MemOffs32_64:
5507    switch (B) {
5508    default: return false;
5509    case MCK_Mem64: return true;
5510    case MCK_Mem: return true;
5511    }
5512
5513  case MCK_MemOffs32_8:
5514    switch (B) {
5515    default: return false;
5516    case MCK_Mem8: return true;
5517    case MCK_Mem: return true;
5518    }
5519
5520  case MCK_MemOffs64_16:
5521    switch (B) {
5522    default: return false;
5523    case MCK_Mem16: return true;
5524    case MCK_Mem: return true;
5525    }
5526
5527  case MCK_MemOffs64_32:
5528    switch (B) {
5529    default: return false;
5530    case MCK_Mem32: return true;
5531    case MCK_Mem: return true;
5532    }
5533
5534  case MCK_MemOffs64_64:
5535    switch (B) {
5536    default: return false;
5537    case MCK_Mem64: return true;
5538    case MCK_Mem: return true;
5539    }
5540
5541  case MCK_MemOffs64_8:
5542    switch (B) {
5543    default: return false;
5544    case MCK_Mem8: return true;
5545    case MCK_Mem: return true;
5546    }
5547
5548  case MCK_SrcIdx16:
5549    switch (B) {
5550    default: return false;
5551    case MCK_Mem16: return true;
5552    case MCK_Mem: return true;
5553    }
5554
5555  case MCK_SrcIdx32:
5556    switch (B) {
5557    default: return false;
5558    case MCK_Mem32: return true;
5559    case MCK_Mem: return true;
5560    }
5561
5562  case MCK_SrcIdx64:
5563    switch (B) {
5564    default: return false;
5565    case MCK_Mem64: return true;
5566    case MCK_Mem: return true;
5567    }
5568
5569  case MCK_SrcIdx8:
5570    switch (B) {
5571    default: return false;
5572    case MCK_Mem8: return true;
5573    case MCK_Mem: return true;
5574    }
5575
5576  case MCK_AbsMem:
5577    return B == MCK_Mem;
5578
5579  case MCK_Mem128:
5580    return B == MCK_Mem;
5581
5582  case MCK_Mem128_RC128:
5583    return B == MCK_Mem;
5584
5585  case MCK_Mem128_RC128X:
5586    return B == MCK_Mem;
5587
5588  case MCK_Mem128_RC256:
5589    return B == MCK_Mem;
5590
5591  case MCK_Mem128_RC256X:
5592    return B == MCK_Mem;
5593
5594  case MCK_Mem16:
5595    return B == MCK_Mem;
5596
5597  case MCK_Mem256:
5598    return B == MCK_Mem;
5599
5600  case MCK_Mem256_RC128:
5601    return B == MCK_Mem;
5602
5603  case MCK_Mem256_RC128X:
5604    return B == MCK_Mem;
5605
5606  case MCK_Mem256_RC256:
5607    return B == MCK_Mem;
5608
5609  case MCK_Mem256_RC256X:
5610    return B == MCK_Mem;
5611
5612  case MCK_Mem256_RC512:
5613    return B == MCK_Mem;
5614
5615  case MCK_Mem32:
5616    return B == MCK_Mem;
5617
5618  case MCK_Mem512:
5619    return B == MCK_Mem;
5620
5621  case MCK_Mem512_RC256X:
5622    return B == MCK_Mem;
5623
5624  case MCK_Mem512_RC512:
5625    return B == MCK_Mem;
5626
5627  case MCK_Mem64:
5628    return B == MCK_Mem;
5629
5630  case MCK_Mem64_RC128:
5631    return B == MCK_Mem;
5632
5633  case MCK_Mem64_RC128X:
5634    return B == MCK_Mem;
5635
5636  case MCK_Mem80:
5637    return B == MCK_Mem;
5638
5639  case MCK_Mem8:
5640    return B == MCK_Mem;
5641  }
5642}
5643
5644static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
5645  X86Operand &Operand = (X86Operand&)GOp;
5646  if (Kind == InvalidMatchClass)
5647    return MCTargetAsmParser::Match_InvalidOperand;
5648
5649  if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
5650    return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
5651             MCTargetAsmParser::Match_Success :
5652             MCTargetAsmParser::Match_InvalidOperand;
5653
5654  switch (Kind) {
5655  default: break;
5656  // 'AVX512RC' class
5657  case MCK_AVX512RC: {
5658    DiagnosticPredicate DP(Operand.isAVX512RC());
5659    if (DP.isMatch())
5660      return MCTargetAsmParser::Match_Success;
5661    break;
5662    }
5663  // 'ImmSExti64i8' class
5664  case MCK_ImmSExti64i8: {
5665    DiagnosticPredicate DP(Operand.isImmSExti64i8());
5666    if (DP.isMatch())
5667      return MCTargetAsmParser::Match_Success;
5668    break;
5669    }
5670  // 'ImmSExti16i8' class
5671  case MCK_ImmSExti16i8: {
5672    DiagnosticPredicate DP(Operand.isImmSExti16i8());
5673    if (DP.isMatch())
5674      return MCTargetAsmParser::Match_Success;
5675    break;
5676    }
5677  // 'ImmSExti32i8' class
5678  case MCK_ImmSExti32i8: {
5679    DiagnosticPredicate DP(Operand.isImmSExti32i8());
5680    if (DP.isMatch())
5681      return MCTargetAsmParser::Match_Success;
5682    break;
5683    }
5684  // 'ImmSExti64i32' class
5685  case MCK_ImmSExti64i32: {
5686    DiagnosticPredicate DP(Operand.isImmSExti64i32());
5687    if (DP.isMatch())
5688      return MCTargetAsmParser::Match_Success;
5689    break;
5690    }
5691  // 'Imm' class
5692  case MCK_Imm: {
5693    DiagnosticPredicate DP(Operand.isImm());
5694    if (DP.isMatch())
5695      return MCTargetAsmParser::Match_Success;
5696    break;
5697    }
5698  // 'ImmUnsignedi8' class
5699  case MCK_ImmUnsignedi8: {
5700    DiagnosticPredicate DP(Operand.isImmUnsignedi8());
5701    if (DP.isMatch())
5702      return MCTargetAsmParser::Match_Success;
5703    break;
5704    }
5705  // 'GR32orGR64' class
5706  case MCK_GR32orGR64: {
5707    DiagnosticPredicate DP(Operand.isGR32orGR64());
5708    if (DP.isMatch())
5709      return MCTargetAsmParser::Match_Success;
5710    break;
5711    }
5712  // 'AbsMem16' class
5713  case MCK_AbsMem16: {
5714    DiagnosticPredicate DP(Operand.isAbsMem16());
5715    if (DP.isMatch())
5716      return MCTargetAsmParser::Match_Success;
5717    break;
5718    }
5719  // 'DstIdx16' class
5720  case MCK_DstIdx16: {
5721    DiagnosticPredicate DP(Operand.isDstIdx16());
5722    if (DP.isMatch())
5723      return MCTargetAsmParser::Match_Success;
5724    break;
5725    }
5726  // 'DstIdx32' class
5727  case MCK_DstIdx32: {
5728    DiagnosticPredicate DP(Operand.isDstIdx32());
5729    if (DP.isMatch())
5730      return MCTargetAsmParser::Match_Success;
5731    break;
5732    }
5733  // 'DstIdx64' class
5734  case MCK_DstIdx64: {
5735    DiagnosticPredicate DP(Operand.isDstIdx64());
5736    if (DP.isMatch())
5737      return MCTargetAsmParser::Match_Success;
5738    break;
5739    }
5740  // 'DstIdx8' class
5741  case MCK_DstIdx8: {
5742    DiagnosticPredicate DP(Operand.isDstIdx8());
5743    if (DP.isMatch())
5744      return MCTargetAsmParser::Match_Success;
5745    break;
5746    }
5747  // 'MemOffs16_16' class
5748  case MCK_MemOffs16_16: {
5749    DiagnosticPredicate DP(Operand.isMemOffs16_16());
5750    if (DP.isMatch())
5751      return MCTargetAsmParser::Match_Success;
5752    break;
5753    }
5754  // 'MemOffs16_32' class
5755  case MCK_MemOffs16_32: {
5756    DiagnosticPredicate DP(Operand.isMemOffs16_32());
5757    if (DP.isMatch())
5758      return MCTargetAsmParser::Match_Success;
5759    break;
5760    }
5761  // 'MemOffs16_8' class
5762  case MCK_MemOffs16_8: {
5763    DiagnosticPredicate DP(Operand.isMemOffs16_8());
5764    if (DP.isMatch())
5765      return MCTargetAsmParser::Match_Success;
5766    break;
5767    }
5768  // 'MemOffs32_16' class
5769  case MCK_MemOffs32_16: {
5770    DiagnosticPredicate DP(Operand.isMemOffs32_16());
5771    if (DP.isMatch())
5772      return MCTargetAsmParser::Match_Success;
5773    break;
5774    }
5775  // 'MemOffs32_32' class
5776  case MCK_MemOffs32_32: {
5777    DiagnosticPredicate DP(Operand.isMemOffs32_32());
5778    if (DP.isMatch())
5779      return MCTargetAsmParser::Match_Success;
5780    break;
5781    }
5782  // 'MemOffs32_64' class
5783  case MCK_MemOffs32_64: {
5784    DiagnosticPredicate DP(Operand.isMemOffs32_64());
5785    if (DP.isMatch())
5786      return MCTargetAsmParser::Match_Success;
5787    break;
5788    }
5789  // 'MemOffs32_8' class
5790  case MCK_MemOffs32_8: {
5791    DiagnosticPredicate DP(Operand.isMemOffs32_8());
5792    if (DP.isMatch())
5793      return MCTargetAsmParser::Match_Success;
5794    break;
5795    }
5796  // 'MemOffs64_16' class
5797  case MCK_MemOffs64_16: {
5798    DiagnosticPredicate DP(Operand.isMemOffs64_16());
5799    if (DP.isMatch())
5800      return MCTargetAsmParser::Match_Success;
5801    break;
5802    }
5803  // 'MemOffs64_32' class
5804  case MCK_MemOffs64_32: {
5805    DiagnosticPredicate DP(Operand.isMemOffs64_32());
5806    if (DP.isMatch())
5807      return MCTargetAsmParser::Match_Success;
5808    break;
5809    }
5810  // 'MemOffs64_64' class
5811  case MCK_MemOffs64_64: {
5812    DiagnosticPredicate DP(Operand.isMemOffs64_64());
5813    if (DP.isMatch())
5814      return MCTargetAsmParser::Match_Success;
5815    break;
5816    }
5817  // 'MemOffs64_8' class
5818  case MCK_MemOffs64_8: {
5819    DiagnosticPredicate DP(Operand.isMemOffs64_8());
5820    if (DP.isMatch())
5821      return MCTargetAsmParser::Match_Success;
5822    break;
5823    }
5824  // 'SrcIdx16' class
5825  case MCK_SrcIdx16: {
5826    DiagnosticPredicate DP(Operand.isSrcIdx16());
5827    if (DP.isMatch())
5828      return MCTargetAsmParser::Match_Success;
5829    break;
5830    }
5831  // 'SrcIdx32' class
5832  case MCK_SrcIdx32: {
5833    DiagnosticPredicate DP(Operand.isSrcIdx32());
5834    if (DP.isMatch())
5835      return MCTargetAsmParser::Match_Success;
5836    break;
5837    }
5838  // 'SrcIdx64' class
5839  case MCK_SrcIdx64: {
5840    DiagnosticPredicate DP(Operand.isSrcIdx64());
5841    if (DP.isMatch())
5842      return MCTargetAsmParser::Match_Success;
5843    break;
5844    }
5845  // 'SrcIdx8' class
5846  case MCK_SrcIdx8: {
5847    DiagnosticPredicate DP(Operand.isSrcIdx8());
5848    if (DP.isMatch())
5849      return MCTargetAsmParser::Match_Success;
5850    break;
5851    }
5852  // 'AbsMem' class
5853  case MCK_AbsMem: {
5854    DiagnosticPredicate DP(Operand.isAbsMem());
5855    if (DP.isMatch())
5856      return MCTargetAsmParser::Match_Success;
5857    break;
5858    }
5859  // 'Mem128' class
5860  case MCK_Mem128: {
5861    DiagnosticPredicate DP(Operand.isMem128());
5862    if (DP.isMatch())
5863      return MCTargetAsmParser::Match_Success;
5864    break;
5865    }
5866  // 'Mem128_RC128' class
5867  case MCK_Mem128_RC128: {
5868    DiagnosticPredicate DP(Operand.isMem128_RC128());
5869    if (DP.isMatch())
5870      return MCTargetAsmParser::Match_Success;
5871    break;
5872    }
5873  // 'Mem128_RC128X' class
5874  case MCK_Mem128_RC128X: {
5875    DiagnosticPredicate DP(Operand.isMem128_RC128X());
5876    if (DP.isMatch())
5877      return MCTargetAsmParser::Match_Success;
5878    break;
5879    }
5880  // 'Mem128_RC256' class
5881  case MCK_Mem128_RC256: {
5882    DiagnosticPredicate DP(Operand.isMem128_RC256());
5883    if (DP.isMatch())
5884      return MCTargetAsmParser::Match_Success;
5885    break;
5886    }
5887  // 'Mem128_RC256X' class
5888  case MCK_Mem128_RC256X: {
5889    DiagnosticPredicate DP(Operand.isMem128_RC256X());
5890    if (DP.isMatch())
5891      return MCTargetAsmParser::Match_Success;
5892    break;
5893    }
5894  // 'Mem16' class
5895  case MCK_Mem16: {
5896    DiagnosticPredicate DP(Operand.isMem16());
5897    if (DP.isMatch())
5898      return MCTargetAsmParser::Match_Success;
5899    break;
5900    }
5901  // 'Mem256' class
5902  case MCK_Mem256: {
5903    DiagnosticPredicate DP(Operand.isMem256());
5904    if (DP.isMatch())
5905      return MCTargetAsmParser::Match_Success;
5906    break;
5907    }
5908  // 'Mem256_RC128' class
5909  case MCK_Mem256_RC128: {
5910    DiagnosticPredicate DP(Operand.isMem256_RC128());
5911    if (DP.isMatch())
5912      return MCTargetAsmParser::Match_Success;
5913    break;
5914    }
5915  // 'Mem256_RC128X' class
5916  case MCK_Mem256_RC128X: {
5917    DiagnosticPredicate DP(Operand.isMem256_RC128X());
5918    if (DP.isMatch())
5919      return MCTargetAsmParser::Match_Success;
5920    break;
5921    }
5922  // 'Mem256_RC256' class
5923  case MCK_Mem256_RC256: {
5924    DiagnosticPredicate DP(Operand.isMem256_RC256());
5925    if (DP.isMatch())
5926      return MCTargetAsmParser::Match_Success;
5927    break;
5928    }
5929  // 'Mem256_RC256X' class
5930  case MCK_Mem256_RC256X: {
5931    DiagnosticPredicate DP(Operand.isMem256_RC256X());
5932    if (DP.isMatch())
5933      return MCTargetAsmParser::Match_Success;
5934    break;
5935    }
5936  // 'Mem256_RC512' class
5937  case MCK_Mem256_RC512: {
5938    DiagnosticPredicate DP(Operand.isMem256_RC512());
5939    if (DP.isMatch())
5940      return MCTargetAsmParser::Match_Success;
5941    break;
5942    }
5943  // 'Mem32' class
5944  case MCK_Mem32: {
5945    DiagnosticPredicate DP(Operand.isMem32());
5946    if (DP.isMatch())
5947      return MCTargetAsmParser::Match_Success;
5948    break;
5949    }
5950  // 'Mem512' class
5951  case MCK_Mem512: {
5952    DiagnosticPredicate DP(Operand.isMem512());
5953    if (DP.isMatch())
5954      return MCTargetAsmParser::Match_Success;
5955    break;
5956    }
5957  // 'Mem512_RC256X' class
5958  case MCK_Mem512_RC256X: {
5959    DiagnosticPredicate DP(Operand.isMem512_RC256X());
5960    if (DP.isMatch())
5961      return MCTargetAsmParser::Match_Success;
5962    break;
5963    }
5964  // 'Mem512_RC512' class
5965  case MCK_Mem512_RC512: {
5966    DiagnosticPredicate DP(Operand.isMem512_RC512());
5967    if (DP.isMatch())
5968      return MCTargetAsmParser::Match_Success;
5969    break;
5970    }
5971  // 'Mem64' class
5972  case MCK_Mem64: {
5973    DiagnosticPredicate DP(Operand.isMem64());
5974    if (DP.isMatch())
5975      return MCTargetAsmParser::Match_Success;
5976    break;
5977    }
5978  // 'Mem64_RC128' class
5979  case MCK_Mem64_RC128: {
5980    DiagnosticPredicate DP(Operand.isMem64_RC128());
5981    if (DP.isMatch())
5982      return MCTargetAsmParser::Match_Success;
5983    break;
5984    }
5985  // 'Mem64_RC128X' class
5986  case MCK_Mem64_RC128X: {
5987    DiagnosticPredicate DP(Operand.isMem64_RC128X());
5988    if (DP.isMatch())
5989      return MCTargetAsmParser::Match_Success;
5990    break;
5991    }
5992  // 'Mem80' class
5993  case MCK_Mem80: {
5994    DiagnosticPredicate DP(Operand.isMem80());
5995    if (DP.isMatch())
5996      return MCTargetAsmParser::Match_Success;
5997    break;
5998    }
5999  // 'Mem8' class
6000  case MCK_Mem8: {
6001    DiagnosticPredicate DP(Operand.isMem8());
6002    if (DP.isMatch())
6003      return MCTargetAsmParser::Match_Success;
6004    break;
6005    }
6006  // 'Mem' class
6007  case MCK_Mem: {
6008    DiagnosticPredicate DP(Operand.isMem());
6009    if (DP.isMatch())
6010      return MCTargetAsmParser::Match_Success;
6011    break;
6012    }
6013  } // end switch (Kind)
6014
6015  if (Operand.isReg()) {
6016    MatchClassKind OpKind;
6017    switch (Operand.getReg()) {
6018    default: OpKind = InvalidMatchClass; break;
6019    case X86::AL: OpKind = MCK_AL; break;
6020    case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
6021    case X86::CL: OpKind = MCK_CL; break;
6022    case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
6023    case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
6024    case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
6025    case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
6026    case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
6027    case X86::SIL: OpKind = MCK_GR8; break;
6028    case X86::DIL: OpKind = MCK_GR8; break;
6029    case X86::BPL: OpKind = MCK_GR8; break;
6030    case X86::SPL: OpKind = MCK_GR8; break;
6031    case X86::R8B: OpKind = MCK_GR8; break;
6032    case X86::R9B: OpKind = MCK_GR8; break;
6033    case X86::R10B: OpKind = MCK_GR8; break;
6034    case X86::R11B: OpKind = MCK_GR8; break;
6035    case X86::R12B: OpKind = MCK_GR8; break;
6036    case X86::R13B: OpKind = MCK_GR8; break;
6037    case X86::R14B: OpKind = MCK_GR8; break;
6038    case X86::R15B: OpKind = MCK_GR8; break;
6039    case X86::SIH: OpKind = MCK_GRH8; break;
6040    case X86::DIH: OpKind = MCK_GRH8; break;
6041    case X86::BPH: OpKind = MCK_GRH8; break;
6042    case X86::SPH: OpKind = MCK_GRH8; break;
6043    case X86::R8BH: OpKind = MCK_GRH8; break;
6044    case X86::R9BH: OpKind = MCK_GRH8; break;
6045    case X86::R10BH: OpKind = MCK_GRH8; break;
6046    case X86::R11BH: OpKind = MCK_GRH8; break;
6047    case X86::R12BH: OpKind = MCK_GRH8; break;
6048    case X86::R13BH: OpKind = MCK_GRH8; break;
6049    case X86::R14BH: OpKind = MCK_GRH8; break;
6050    case X86::R15BH: OpKind = MCK_GRH8; break;
6051    case X86::HAX: OpKind = MCK_GRH16; break;
6052    case X86::HDX: OpKind = MCK_GRH16; break;
6053    case X86::HCX: OpKind = MCK_GRH16; break;
6054    case X86::HBX: OpKind = MCK_GRH16; break;
6055    case X86::HSI: OpKind = MCK_GRH16; break;
6056    case X86::HDI: OpKind = MCK_GRH16; break;
6057    case X86::HBP: OpKind = MCK_GRH16; break;
6058    case X86::HSP: OpKind = MCK_GRH16; break;
6059    case X86::HIP: OpKind = MCK_GRH16; break;
6060    case X86::R8WH: OpKind = MCK_GRH16; break;
6061    case X86::R9WH: OpKind = MCK_GRH16; break;
6062    case X86::R10WH: OpKind = MCK_GRH16; break;
6063    case X86::R11WH: OpKind = MCK_GRH16; break;
6064    case X86::R12WH: OpKind = MCK_GRH16; break;
6065    case X86::R13WH: OpKind = MCK_GRH16; break;
6066    case X86::R14WH: OpKind = MCK_GRH16; break;
6067    case X86::R15WH: OpKind = MCK_GRH16; break;
6068    case X86::AX: OpKind = MCK_AX; break;
6069    case X86::DX: OpKind = MCK_DX; break;
6070    case X86::CX: OpKind = MCK_GR16_ABCD; break;
6071    case X86::BX: OpKind = MCK_GR16_ABCD; break;
6072    case X86::SI: OpKind = MCK_GR16_NOREX; break;
6073    case X86::DI: OpKind = MCK_GR16_NOREX; break;
6074    case X86::BP: OpKind = MCK_GR16_NOREX; break;
6075    case X86::SP: OpKind = MCK_GR16_NOREX; break;
6076    case X86::R8W: OpKind = MCK_GR16; break;
6077    case X86::R9W: OpKind = MCK_GR16; break;
6078    case X86::R10W: OpKind = MCK_GR16; break;
6079    case X86::R11W: OpKind = MCK_GR16; break;
6080    case X86::R12W: OpKind = MCK_GR16; break;
6081    case X86::R13W: OpKind = MCK_GR16; break;
6082    case X86::R14W: OpKind = MCK_GR16; break;
6083    case X86::R15W: OpKind = MCK_GR16; break;
6084    case X86::EAX: OpKind = MCK_EAX; break;
6085    case X86::EDX: OpKind = MCK_EDX; break;
6086    case X86::ECX: OpKind = MCK_ECX; break;
6087    case X86::EBX: OpKind = MCK_EBX; break;
6088    case X86::ESI: OpKind = MCK_GR32_NOREX_NOSP; break;
6089    case X86::EDI: OpKind = MCK_GR32_NOREX_NOSP; break;
6090    case X86::EBP: OpKind = MCK_GR32_NOREX_NOSP; break;
6091    case X86::ESP: OpKind = MCK_GR32_NOREX; break;
6092    case X86::R8D: OpKind = MCK_GR32_NOSP; break;
6093    case X86::R9D: OpKind = MCK_GR32_NOSP; break;
6094    case X86::R10D: OpKind = MCK_GR32_NOSP; break;
6095    case X86::R11D: OpKind = MCK_GR32_NOSP; break;
6096    case X86::R12D: OpKind = MCK_GR32_NOSP; break;
6097    case X86::R13D: OpKind = MCK_GR32_NOSP; break;
6098    case X86::R14D: OpKind = MCK_GR32_NOSP; break;
6099    case X86::R15D: OpKind = MCK_GR32_NOSP; break;
6100    case X86::RAX: OpKind = MCK_RAX; break;
6101    case X86::RDX: OpKind = MCK_RDX; break;
6102    case X86::RCX: OpKind = MCK_RCX; break;
6103    case X86::RBX: OpKind = MCK_RBX; break;
6104    case X86::RSI: OpKind = MCK_Reg38; break;
6105    case X86::RDI: OpKind = MCK_Reg38; break;
6106    case X86::RBP: OpKind = MCK_Reg50; break;
6107    case X86::RSP: OpKind = MCK_Reg33; break;
6108    case X86::R8: OpKind = MCK_Reg44; break;
6109    case X86::R9: OpKind = MCK_Reg44; break;
6110    case X86::R10: OpKind = MCK_Reg42; break;
6111    case X86::R11: OpKind = MCK_Reg44; break;
6112    case X86::R12: OpKind = MCK_GR64_NOSP; break;
6113    case X86::R13: OpKind = MCK_GR64_NOSP; break;
6114    case X86::R14: OpKind = MCK_GR64_NOSP; break;
6115    case X86::R15: OpKind = MCK_GR64_NOSP; break;
6116    case X86::RIP: OpKind = MCK_Reg52; break;
6117    case X86::MM0: OpKind = MCK_VR64; break;
6118    case X86::MM1: OpKind = MCK_VR64; break;
6119    case X86::MM2: OpKind = MCK_VR64; break;
6120    case X86::MM3: OpKind = MCK_VR64; break;
6121    case X86::MM4: OpKind = MCK_VR64; break;
6122    case X86::MM5: OpKind = MCK_VR64; break;
6123    case X86::MM6: OpKind = MCK_VR64; break;
6124    case X86::MM7: OpKind = MCK_VR64; break;
6125    case X86::FP0: OpKind = MCK_RFP32; break;
6126    case X86::FP1: OpKind = MCK_RFP32; break;
6127    case X86::FP2: OpKind = MCK_RFP32; break;
6128    case X86::FP3: OpKind = MCK_RFP32; break;
6129    case X86::FP4: OpKind = MCK_RFP32; break;
6130    case X86::FP5: OpKind = MCK_RFP32; break;
6131    case X86::FP6: OpKind = MCK_RFP32; break;
6132    case X86::XMM0: OpKind = MCK_XMM0; break;
6133    case X86::XMM1: OpKind = MCK_VR128L; break;
6134    case X86::XMM2: OpKind = MCK_VR128L; break;
6135    case X86::XMM3: OpKind = MCK_VR128L; break;
6136    case X86::XMM4: OpKind = MCK_VR128L; break;
6137    case X86::XMM5: OpKind = MCK_VR128L; break;
6138    case X86::XMM6: OpKind = MCK_VR128L; break;
6139    case X86::XMM7: OpKind = MCK_VR128L; break;
6140    case X86::XMM8: OpKind = MCK_VR128H; break;
6141    case X86::XMM9: OpKind = MCK_VR128H; break;
6142    case X86::XMM10: OpKind = MCK_VR128H; break;
6143    case X86::XMM11: OpKind = MCK_VR128H; break;
6144    case X86::XMM12: OpKind = MCK_VR128H; break;
6145    case X86::XMM13: OpKind = MCK_VR128H; break;
6146    case X86::XMM14: OpKind = MCK_VR128H; break;
6147    case X86::XMM15: OpKind = MCK_VR128H; break;
6148    case X86::XMM16: OpKind = MCK_FR32X; break;
6149    case X86::XMM17: OpKind = MCK_FR32X; break;
6150    case X86::XMM18: OpKind = MCK_FR32X; break;
6151    case X86::XMM19: OpKind = MCK_FR32X; break;
6152    case X86::XMM20: OpKind = MCK_FR32X; break;
6153    case X86::XMM21: OpKind = MCK_FR32X; break;
6154    case X86::XMM22: OpKind = MCK_FR32X; break;
6155    case X86::XMM23: OpKind = MCK_FR32X; break;
6156    case X86::XMM24: OpKind = MCK_FR32X; break;
6157    case X86::XMM25: OpKind = MCK_FR32X; break;
6158    case X86::XMM26: OpKind = MCK_FR32X; break;
6159    case X86::XMM27: OpKind = MCK_FR32X; break;
6160    case X86::XMM28: OpKind = MCK_FR32X; break;
6161    case X86::XMM29: OpKind = MCK_FR32X; break;
6162    case X86::XMM30: OpKind = MCK_FR32X; break;
6163    case X86::XMM31: OpKind = MCK_FR32X; break;
6164    case X86::YMM0: OpKind = MCK_VR256L; break;
6165    case X86::YMM1: OpKind = MCK_VR256L; break;
6166    case X86::YMM2: OpKind = MCK_VR256L; break;
6167    case X86::YMM3: OpKind = MCK_VR256L; break;
6168    case X86::YMM4: OpKind = MCK_VR256L; break;
6169    case X86::YMM5: OpKind = MCK_VR256L; break;
6170    case X86::YMM6: OpKind = MCK_VR256L; break;
6171    case X86::YMM7: OpKind = MCK_VR256L; break;
6172    case X86::YMM8: OpKind = MCK_VR256H; break;
6173    case X86::YMM9: OpKind = MCK_VR256H; break;
6174    case X86::YMM10: OpKind = MCK_VR256H; break;
6175    case X86::YMM11: OpKind = MCK_VR256H; break;
6176    case X86::YMM12: OpKind = MCK_VR256H; break;
6177    case X86::YMM13: OpKind = MCK_VR256H; break;
6178    case X86::YMM14: OpKind = MCK_VR256H; break;
6179    case X86::YMM15: OpKind = MCK_VR256H; break;
6180    case X86::YMM16: OpKind = MCK_VR256X; break;
6181    case X86::YMM17: OpKind = MCK_VR256X; break;
6182    case X86::YMM18: OpKind = MCK_VR256X; break;
6183    case X86::YMM19: OpKind = MCK_VR256X; break;
6184    case X86::YMM20: OpKind = MCK_VR256X; break;
6185    case X86::YMM21: OpKind = MCK_VR256X; break;
6186    case X86::YMM22: OpKind = MCK_VR256X; break;
6187    case X86::YMM23: OpKind = MCK_VR256X; break;
6188    case X86::YMM24: OpKind = MCK_VR256X; break;
6189    case X86::YMM25: OpKind = MCK_VR256X; break;
6190    case X86::YMM26: OpKind = MCK_VR256X; break;
6191    case X86::YMM27: OpKind = MCK_VR256X; break;
6192    case X86::YMM28: OpKind = MCK_VR256X; break;
6193    case X86::YMM29: OpKind = MCK_VR256X; break;
6194    case X86::YMM30: OpKind = MCK_VR256X; break;
6195    case X86::YMM31: OpKind = MCK_VR256X; break;
6196    case X86::ZMM0: OpKind = MCK_Reg64; break;
6197    case X86::ZMM1: OpKind = MCK_Reg64; break;
6198    case X86::ZMM2: OpKind = MCK_Reg64; break;
6199    case X86::ZMM3: OpKind = MCK_Reg64; break;
6200    case X86::ZMM4: OpKind = MCK_Reg64; break;
6201    case X86::ZMM5: OpKind = MCK_Reg64; break;
6202    case X86::ZMM6: OpKind = MCK_Reg64; break;
6203    case X86::ZMM7: OpKind = MCK_Reg64; break;
6204    case X86::ZMM8: OpKind = MCK_Reg67; break;
6205    case X86::ZMM9: OpKind = MCK_Reg67; break;
6206    case X86::ZMM10: OpKind = MCK_Reg67; break;
6207    case X86::ZMM11: OpKind = MCK_Reg67; break;
6208    case X86::ZMM12: OpKind = MCK_Reg67; break;
6209    case X86::ZMM13: OpKind = MCK_Reg67; break;
6210    case X86::ZMM14: OpKind = MCK_Reg67; break;
6211    case X86::ZMM15: OpKind = MCK_Reg67; break;
6212    case X86::ZMM16: OpKind = MCK_VR512; break;
6213    case X86::ZMM17: OpKind = MCK_VR512; break;
6214    case X86::ZMM18: OpKind = MCK_VR512; break;
6215    case X86::ZMM19: OpKind = MCK_VR512; break;
6216    case X86::ZMM20: OpKind = MCK_VR512; break;
6217    case X86::ZMM21: OpKind = MCK_VR512; break;
6218    case X86::ZMM22: OpKind = MCK_VR512; break;
6219    case X86::ZMM23: OpKind = MCK_VR512; break;
6220    case X86::ZMM24: OpKind = MCK_VR512; break;
6221    case X86::ZMM25: OpKind = MCK_VR512; break;
6222    case X86::ZMM26: OpKind = MCK_VR512; break;
6223    case X86::ZMM27: OpKind = MCK_VR512; break;
6224    case X86::ZMM28: OpKind = MCK_VR512; break;
6225    case X86::ZMM29: OpKind = MCK_VR512; break;
6226    case X86::ZMM30: OpKind = MCK_VR512; break;
6227    case X86::ZMM31: OpKind = MCK_VR512; break;
6228    case X86::K0: OpKind = MCK_VK1; break;
6229    case X86::K1: OpKind = MCK_VK16WM; break;
6230    case X86::K2: OpKind = MCK_VK16WM; break;
6231    case X86::K3: OpKind = MCK_VK16WM; break;
6232    case X86::K4: OpKind = MCK_VK16WM; break;
6233    case X86::K5: OpKind = MCK_VK16WM; break;
6234    case X86::K6: OpKind = MCK_VK16WM; break;
6235    case X86::K7: OpKind = MCK_VK16WM; break;
6236    case X86::ST0: OpKind = MCK_ST0; break;
6237    case X86::ST1: OpKind = MCK_RST; break;
6238    case X86::ST2: OpKind = MCK_RST; break;
6239    case X86::ST3: OpKind = MCK_RST; break;
6240    case X86::ST4: OpKind = MCK_RST; break;
6241    case X86::ST5: OpKind = MCK_RST; break;
6242    case X86::ST6: OpKind = MCK_RST; break;
6243    case X86::ST7: OpKind = MCK_RST; break;
6244    case X86::FPSW: OpKind = MCK_FPCCR; break;
6245    case X86::EFLAGS: OpKind = MCK_CCR; break;
6246    case X86::DF: OpKind = MCK_DFCCR; break;
6247    case X86::CS: OpKind = MCK_CS; break;
6248    case X86::DS: OpKind = MCK_DS; break;
6249    case X86::SS: OpKind = MCK_SS; break;
6250    case X86::ES: OpKind = MCK_ES; break;
6251    case X86::FS: OpKind = MCK_FS; break;
6252    case X86::GS: OpKind = MCK_GS; break;
6253    case X86::DR0: OpKind = MCK_DEBUG_REG; break;
6254    case X86::DR1: OpKind = MCK_DEBUG_REG; break;
6255    case X86::DR2: OpKind = MCK_DEBUG_REG; break;
6256    case X86::DR3: OpKind = MCK_DEBUG_REG; break;
6257    case X86::DR4: OpKind = MCK_DEBUG_REG; break;
6258    case X86::DR5: OpKind = MCK_DEBUG_REG; break;
6259    case X86::DR6: OpKind = MCK_DEBUG_REG; break;
6260    case X86::DR7: OpKind = MCK_DEBUG_REG; break;
6261    case X86::DR8: OpKind = MCK_DEBUG_REG; break;
6262    case X86::DR9: OpKind = MCK_DEBUG_REG; break;
6263    case X86::DR10: OpKind = MCK_DEBUG_REG; break;
6264    case X86::DR11: OpKind = MCK_DEBUG_REG; break;
6265    case X86::DR12: OpKind = MCK_DEBUG_REG; break;
6266    case X86::DR13: OpKind = MCK_DEBUG_REG; break;
6267    case X86::DR14: OpKind = MCK_DEBUG_REG; break;
6268    case X86::DR15: OpKind = MCK_DEBUG_REG; break;
6269    case X86::CR0: OpKind = MCK_CONTROL_REG; break;
6270    case X86::CR1: OpKind = MCK_CONTROL_REG; break;
6271    case X86::CR2: OpKind = MCK_CONTROL_REG; break;
6272    case X86::CR3: OpKind = MCK_CONTROL_REG; break;
6273    case X86::CR4: OpKind = MCK_CONTROL_REG; break;
6274    case X86::CR5: OpKind = MCK_CONTROL_REG; break;
6275    case X86::CR6: OpKind = MCK_CONTROL_REG; break;
6276    case X86::CR7: OpKind = MCK_CONTROL_REG; break;
6277    case X86::CR8: OpKind = MCK_CONTROL_REG; break;
6278    case X86::CR9: OpKind = MCK_CONTROL_REG; break;
6279    case X86::CR10: OpKind = MCK_CONTROL_REG; break;
6280    case X86::CR11: OpKind = MCK_CONTROL_REG; break;
6281    case X86::CR12: OpKind = MCK_CONTROL_REG; break;
6282    case X86::CR13: OpKind = MCK_CONTROL_REG; break;
6283    case X86::CR14: OpKind = MCK_CONTROL_REG; break;
6284    case X86::CR15: OpKind = MCK_CONTROL_REG; break;
6285    case X86::BND0: OpKind = MCK_BNDR; break;
6286    case X86::BND1: OpKind = MCK_BNDR; break;
6287    case X86::BND2: OpKind = MCK_BNDR; break;
6288    case X86::BND3: OpKind = MCK_BNDR; break;
6289    }
6290    return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
6291                                      getDiagKindFromRegisterClass(Kind);
6292  }
6293
6294  if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
6295    return getDiagKindFromRegisterClass(Kind);
6296
6297  return MCTargetAsmParser::Match_InvalidOperand;
6298}
6299
6300#ifndef NDEBUG
6301const char *getMatchClassName(MatchClassKind Kind) {
6302  switch (Kind) {
6303  case InvalidMatchClass: return "InvalidMatchClass";
6304  case OptionalMatchClass: return "OptionalMatchClass";
6305  case MCK__STAR_: return "MCK__STAR_";
6306  case MCK_b: return "MCK_b";
6307  case MCK_d: return "MCK_d";
6308  case MCK_pd: return "MCK_pd";
6309  case MCK_ps: return "MCK_ps";
6310  case MCK_q: return "MCK_q";
6311  case MCK_sd: return "MCK_sd";
6312  case MCK_ss: return "MCK_ss";
6313  case MCK_ub: return "MCK_ub";
6314  case MCK_ud: return "MCK_ud";
6315  case MCK_uq: return "MCK_uq";
6316  case MCK_uw: return "MCK_uw";
6317  case MCK_w: return "MCK_w";
6318  case MCK__123_: return "MCK__123_";
6319  case MCK__123_1to16_125_: return "MCK__123_1to16_125_";
6320  case MCK__123_1to2_125_: return "MCK__123_1to2_125_";
6321  case MCK__123_1to4_125_: return "MCK__123_1to4_125_";
6322  case MCK__123_1to8_125_: return "MCK__123_1to8_125_";
6323  case MCK__123_sae_125_: return "MCK__123_sae_125_";
6324  case MCK__123_z_125_: return "MCK__123_z_125_";
6325  case MCK__125_: return "MCK__125_";
6326  case MCK_Reg50: return "MCK_Reg50";
6327  case MCK_Reg52: return "MCK_Reg52";
6328  case MCK_AL: return "MCK_AL";
6329  case MCK_AX: return "MCK_AX";
6330  case MCK_CCR: return "MCK_CCR";
6331  case MCK_CL: return "MCK_CL";
6332  case MCK_CS: return "MCK_CS";
6333  case MCK_DFCCR: return "MCK_DFCCR";
6334  case MCK_DS: return "MCK_DS";
6335  case MCK_DX: return "MCK_DX";
6336  case MCK_EAX: return "MCK_EAX";
6337  case MCK_EBX: return "MCK_EBX";
6338  case MCK_ECX: return "MCK_ECX";
6339  case MCK_EDX: return "MCK_EDX";
6340  case MCK_ES: return "MCK_ES";
6341  case MCK_FPCCR: return "MCK_FPCCR";
6342  case MCK_FS: return "MCK_FS";
6343  case MCK_GS: return "MCK_GS";
6344  case MCK_RAX: return "MCK_RAX";
6345  case MCK_RBX: return "MCK_RBX";
6346  case MCK_RCX: return "MCK_RCX";
6347  case MCK_RDX: return "MCK_RDX";
6348  case MCK_SS: return "MCK_SS";
6349  case MCK_ST0: return "MCK_ST0";
6350  case MCK_XMM0: return "MCK_XMM0";
6351  case MCK_Reg51: return "MCK_Reg51";
6352  case MCK_GR32_AD: return "MCK_GR32_AD";
6353  case MCK_GR64_AD: return "MCK_GR64_AD";
6354  case MCK_Reg30: return "MCK_Reg30";
6355  case MCK_GR32_TC: return "MCK_GR32_TC";
6356  case MCK_Reg46: return "MCK_Reg46";
6357  case MCK_BNDR: return "MCK_BNDR";
6358  case MCK_GR16_ABCD: return "MCK_GR16_ABCD";
6359  case MCK_GR32_ABCD: return "MCK_GR32_ABCD";
6360  case MCK_GR64_ABCD: return "MCK_GR64_ABCD";
6361  case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H";
6362  case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L";
6363  case MCK_Reg38: return "MCK_Reg38";
6364  case MCK_Reg41: return "MCK_Reg41";
6365  case MCK_Reg44: return "MCK_Reg44";
6366  case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG";
6367  case MCK_Reg42: return "MCK_Reg42";
6368  case MCK_Reg45: return "MCK_Reg45";
6369  case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP";
6370  case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP";
6371  case MCK_RFP32: return "MCK_RFP32";
6372  case MCK_VK16WM: return "MCK_VK16WM";
6373  case MCK_Reg33: return "MCK_Reg33";
6374  case MCK_Reg39: return "MCK_Reg39";
6375  case MCK_Reg64: return "MCK_Reg64";
6376  case MCK_Reg67: return "MCK_Reg67";
6377  case MCK_GR16_NOREX: return "MCK_GR16_NOREX";
6378  case MCK_GR32_NOREX: return "MCK_GR32_NOREX";
6379  case MCK_GR64_TCW64: return "MCK_GR64_TCW64";
6380  case MCK_GR8_NOREX: return "MCK_GR8_NOREX";
6381  case MCK_RST: return "MCK_RST";
6382  case MCK_VK1: return "MCK_VK1";
6383  case MCK_VR128H: return "MCK_VR128H";
6384  case MCK_VR128L: return "MCK_VR128L";
6385  case MCK_VR256H: return "MCK_VR256H";
6386  case MCK_VR256L: return "MCK_VR256L";
6387  case MCK_VR64: return "MCK_VR64";
6388  case MCK_Reg23: return "MCK_Reg23";
6389  case MCK_GR64_NOREX: return "MCK_GR64_NOREX";
6390  case MCK_GR64_TC: return "MCK_GR64_TC";
6391  case MCK_GRH8: return "MCK_GRH8";
6392  case MCK_GR32_NOSP: return "MCK_GR32_NOSP";
6393  case MCK_GR64_NOSP: return "MCK_GR64_NOSP";
6394  case MCK_Reg34: return "MCK_Reg34";
6395  case MCK_Reg65: return "MCK_Reg65";
6396  case MCK_CONTROL_REG: return "MCK_CONTROL_REG";
6397  case MCK_DEBUG_REG: return "MCK_DEBUG_REG";
6398  case MCK_FR32: return "MCK_FR32";
6399  case MCK_GR16: return "MCK_GR16";
6400  case MCK_GR32: return "MCK_GR32";
6401  case MCK_VR256: return "MCK_VR256";
6402  case MCK_Reg20: return "MCK_Reg20";
6403  case MCK_GR64: return "MCK_GR64";
6404  case MCK_GRH16: return "MCK_GRH16";
6405  case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS";
6406  case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP";
6407  case MCK_GR8: return "MCK_GR8";
6408  case MCK_FR32X: return "MCK_FR32X";
6409  case MCK_VR256X: return "MCK_VR256X";
6410  case MCK_VR512: return "MCK_VR512";
6411  case MCK_AVX512RC: return "MCK_AVX512RC";
6412  case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8";
6413  case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8";
6414  case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8";
6415  case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32";
6416  case MCK_Imm: return "MCK_Imm";
6417  case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8";
6418  case MCK_GR32orGR64: return "MCK_GR32orGR64";
6419  case MCK_AbsMem16: return "MCK_AbsMem16";
6420  case MCK_DstIdx16: return "MCK_DstIdx16";
6421  case MCK_DstIdx32: return "MCK_DstIdx32";
6422  case MCK_DstIdx64: return "MCK_DstIdx64";
6423  case MCK_DstIdx8: return "MCK_DstIdx8";
6424  case MCK_MemOffs16_16: return "MCK_MemOffs16_16";
6425  case MCK_MemOffs16_32: return "MCK_MemOffs16_32";
6426  case MCK_MemOffs16_8: return "MCK_MemOffs16_8";
6427  case MCK_MemOffs32_16: return "MCK_MemOffs32_16";
6428  case MCK_MemOffs32_32: return "MCK_MemOffs32_32";
6429  case MCK_MemOffs32_64: return "MCK_MemOffs32_64";
6430  case MCK_MemOffs32_8: return "MCK_MemOffs32_8";
6431  case MCK_MemOffs64_16: return "MCK_MemOffs64_16";
6432  case MCK_MemOffs64_32: return "MCK_MemOffs64_32";
6433  case MCK_MemOffs64_64: return "MCK_MemOffs64_64";
6434  case MCK_MemOffs64_8: return "MCK_MemOffs64_8";
6435  case MCK_SrcIdx16: return "MCK_SrcIdx16";
6436  case MCK_SrcIdx32: return "MCK_SrcIdx32";
6437  case MCK_SrcIdx64: return "MCK_SrcIdx64";
6438  case MCK_SrcIdx8: return "MCK_SrcIdx8";
6439  case MCK_AbsMem: return "MCK_AbsMem";
6440  case MCK_Mem128: return "MCK_Mem128";
6441  case MCK_Mem128_RC128: return "MCK_Mem128_RC128";
6442  case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X";
6443  case MCK_Mem128_RC256: return "MCK_Mem128_RC256";
6444  case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X";
6445  case MCK_Mem16: return "MCK_Mem16";
6446  case MCK_Mem256: return "MCK_Mem256";
6447  case MCK_Mem256_RC128: return "MCK_Mem256_RC128";
6448  case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X";
6449  case MCK_Mem256_RC256: return "MCK_Mem256_RC256";
6450  case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X";
6451  case MCK_Mem256_RC512: return "MCK_Mem256_RC512";
6452  case MCK_Mem32: return "MCK_Mem32";
6453  case MCK_Mem512: return "MCK_Mem512";
6454  case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X";
6455  case MCK_Mem512_RC512: return "MCK_Mem512_RC512";
6456  case MCK_Mem64: return "MCK_Mem64";
6457  case MCK_Mem64_RC128: return "MCK_Mem64_RC128";
6458  case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X";
6459  case MCK_Mem80: return "MCK_Mem80";
6460  case MCK_Mem8: return "MCK_Mem8";
6461  case MCK_Mem: return "MCK_Mem";
6462  case NumMatchClassKinds: return "NumMatchClassKinds";
6463  }
6464  llvm_unreachable("unhandled MatchClassKind!");
6465}
6466
6467#endif // NDEBUG
6468uint64_t X86AsmParser::
6469ComputeAvailableFeatures(const FeatureBitset& FB) const {
6470  uint64_t Features = 0;
6471  if ((!FB[X86::Mode64Bit]))
6472    Features |= Feature_Not64BitMode;
6473  if ((FB[X86::Mode64Bit]))
6474    Features |= Feature_In64BitMode;
6475  if ((FB[X86::Mode16Bit]))
6476    Features |= Feature_In16BitMode;
6477  if ((!FB[X86::Mode16Bit]))
6478    Features |= Feature_Not16BitMode;
6479  if ((FB[X86::Mode32Bit]))
6480    Features |= Feature_In32BitMode;
6481  return Features;
6482}
6483
6484static bool checkAsmTiedOperandConstraints(const X86AsmParser&AsmParser,
6485                               unsigned Kind,
6486                               const OperandVector &Operands,
6487                               uint64_t &ErrorInfo) {
6488  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
6489  const uint8_t *Converter = ConversionTable[Kind];
6490  for (const uint8_t *p = Converter; *p; p+= 2) {
6491    switch (*p) {
6492    case CVT_Tied: {
6493      unsigned OpIdx = *(p+1);
6494      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
6495                              std::begin(TiedAsmOperandTable)) &&
6496             "Tied operand not found");
6497      unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
6498      unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
6499      if (OpndNum1 != OpndNum2) {
6500        auto &SrcOp1 = Operands[OpndNum1];
6501        auto &SrcOp2 = Operands[OpndNum2];
6502        if (SrcOp1->isReg() && SrcOp2->isReg()) {
6503          if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {
6504            ErrorInfo = OpndNum2;
6505            return false;
6506          }
6507        }
6508      }
6509      break;
6510    }
6511    default:
6512      break;
6513    }
6514  }
6515  return true;
6516}
6517
6518static const char *const MnemonicTable =
6519    "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
6520    "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
6521    "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
6522    "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
6523    "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
6524    "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
6525    "extrq\007blcfill\010blcfilll\010blcfillq\004blci\005blcic\006blcicl\006"
6526    "blcicq\005blcil\005blciq\006blcmsk\007blcmskl\007blcmskq\004blcs\005blc"
6527    "sl\005blcsq\007blendpd\007blendps\010blendvpd\010blendvps\007blsfill\010"
6528    "blsfilll\010blsfillq\004blsi\005blsic\006blsicl\006blsicq\005blsil\005b"
6529    "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl"
6530    "\005bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003b"
6531    "sf\004bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006b"
6532    "swapl\006bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003b"
6533    "tr\004btrl\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzh"
6534    "i\005bzhil\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003"
6535    "cdq\004cdqe\004clac\003clc\003cld\010cldemote\007clflush\nclflushopt\004"
6536    "clgi\003cli\003clr\004clrb\004clrl\004clrq\010clrssbsy\004clrw\004cltd\004"
6537    "cltq\004clts\004clwb\006clzero\003cmc\005cmova\006cmovae\007cmovael\007"
6538    "cmovaeq\007cmovaew\006cmoval\006cmovaq\006cmovaw\005cmovb\006cmovbe\007"
6539    "cmovbel\007cmovbeq\007cmovbew\006cmovbl\006cmovbq\006cmovbw\005cmove\006"
6540    "cmovel\006cmoveq\006cmovew\005cmovg\006cmovge\007cmovgel\007cmovgeq\007"
6541    "cmovgew\006cmovgl\006cmovgq\006cmovgw\005cmovl\006cmovle\007cmovlel\007"
6542    "cmovleq\007cmovlew\006cmovll\006cmovlq\006cmovlw\006cmovne\007cmovnel\007"
6543    "cmovneq\007cmovnew\006cmovno\007cmovnol\007cmovnoq\007cmovnow\006cmovnp"
6544    "\007cmovnpl\007cmovnpq\007cmovnpw\006cmovns\007cmovnsl\007cmovnsq\007cm"
6545    "ovnsw\005cmovo\006cmovol\006cmovoq\006cmovow\005cmovp\006cmovpl\006cmov"
6546    "pq\006cmovpw\005cmovs\006cmovsl\006cmovsq\006cmovsw\003cmp\004cmpb\004c"
6547    "mpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmp"
6548    "sq\005cmpss\005cmpsw\004cmpw\007cmpxchg\ncmpxchg16b\tcmpxchg8b\010cmpxc"
6549    "hgb\010cmpxchgl\010cmpxchgq\010cmpxchgw\006comisd\006comiss\005cpuid\003"
6550    "cqo\004cqto\005crc32\006crc32b\006crc32l\006crc32q\006crc32w\002cs\010c"
6551    "vtdq2pd\010cvtdq2ps\010cvtpd2dq\010cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010"
6552    "cvtpi2ps\010cvtps2dq\010cvtps2pd\010cvtps2pi\010cvtsd2si\tcvtsd2sil\tcv"
6553    "tsd2siq\010cvtsd2ss\010cvtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cvtsi2ss\tcvts"
6554    "i2ssl\tcvtsi2ssq\010cvtss2sd\010cvtss2si\tcvtss2sil\tcvtss2siq\tcvttpd2"
6555    "dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\tcvttsd2si\ncvttsd2sil\ncvttsd2siq\t"
6556    "cvttss2si\ncvttss2sil\ncvttss2siq\003cwd\004cwde\004cwtd\004cwtl\003daa"
6557    "\003das\006data16\003dec\004decb\004decl\004decq\004decw\003div\004divb"
6558    "\004divl\005divpd\005divps\004divq\005divsd\005divss\004divw\004dppd\004"
6559    "dpps\002ds\004emms\005encls\005enclu\005enclv\007endbr32\007endbr64\005"
6560    "enter\002es\textractps\005extrq\005f2xm1\004fabs\004fadd\005faddl\005fa"
6561    "ddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006fcmove\007"
6562    "fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005fcomi\005"
6563    "fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fcomps\005fcoms\004fcos"
6564    "\007fdecstp\004fdiv\005fdivl\005fdivp\005fdivr\006fdivrl\006fdivrp\006f"
6565    "divrs\005fdivs\005femms\005ffree\006ffreep\005fiadd\006fiaddl\006fiadds"
6566    "\005ficom\006ficoml\006ficomp\007ficompl\007ficomps\006ficoms\005fidiv\006"
6567    "fidivl\006fidivr\007fidivrl\007fidivrs\006fidivs\004fild\005fildl\006fi"
6568    "ldll\005filds\005fimul\006fimull\006fimuls\007fincstp\004fist\005fistl\005"
6569    "fistp\006fistpl\007fistpll\006fistps\005fists\006fisttp\007fisttpl\010f"
6570    "isttpll\007fisttps\005fisub\006fisubl\006fisubr\007fisubrl\007fisubrs\006"
6571    "fisubs\003fld\004fld1\005fldcw\006fldenv\004fldl\006fldl2e\006fldl2t\006"
6572    "fldlg2\006fldln2\005fldpi\004flds\004fldt\004fldz\004fmul\005fmull\005f"
6573    "mulp\005fmuls\006fnclex\006fninit\004fnop\006fnsave\006fnstcw\007fnsten"
6574    "v\006fnstsw\006fpatan\005fprem\006fprem1\005fptan\007frndint\006frstor\002"
6575    "fs\006fscale\004fsin\007fsincos\005fsqrt\003fst\004fstl\004fstp\005fstp"
6576    "l\005fstps\005fstpt\004fsts\004fsub\005fsubl\005fsubp\005fsubr\006fsubr"
6577    "l\006fsubrp\006fsubrs\005fsubs\004ftst\005fucom\006fucomi\006fucomp\007"
6578    "fucompi\007fucompp\004fxam\004fxch\007fxrstor\tfxrstor64\006fxsave\010f"
6579    "xsave64\007fxtract\005fyl2x\007fyl2xp1\006getsec\020gf2p8affineinvqb\015"
6580    "gf2p8affineqb\tgf2p8mulb\002gs\006haddpd\006haddps\003hlt\006hsubpd\006"
6581    "hsubps\004idiv\005idivb\005idivl\005idivq\005idivw\004imul\005imulb\005"
6582    "imull\005imulq\005imulw\002in\003inb\003inc\004incb\004incl\004incq\007"
6583    "incsspd\007incsspq\004incw\003inl\003ins\004insb\004insd\010insertps\007"
6584    "insertq\004insl\004insw\003int\004int3\004into\004invd\006invept\006inv"
6585    "lpg\007invlpga\007invpcid\007invvpid\003inw\004iret\005iretd\005iretl\005"
6586    "iretq\005iretw\002ja\003jae\002jb\003jbe\004jcxz\002je\005jecxz\002jg\003"
6587    "jge\002jl\003jle\003jmp\004jmpl\004jmpq\004jmpw\003jne\003jno\003jnp\003"
6588    "jns\002jo\002jp\005jrcxz\002js\005kaddb\005kaddd\005kaddq\005kaddw\005k"
6589    "andb\005kandd\006kandnb\006kandnd\006kandnq\006kandnw\005kandq\005kandw"
6590    "\005kmovb\005kmovd\005kmovq\005kmovw\005knotb\005knotd\005knotq\005knot"
6591    "w\004korb\004kord\004korq\010kortestb\010kortestd\010kortestq\010kortes"
6592    "tw\004korw\010kshiftlb\010kshiftld\010kshiftlq\010kshiftlw\010kshiftrb\010"
6593    "kshiftrd\010kshiftrq\010kshiftrw\006ktestb\006ktestd\006ktestq\006ktest"
6594    "w\010kunpckbw\010kunpckdq\010kunpckwd\006kxnorb\006kxnord\006kxnorq\006"
6595    "kxnorw\005kxorb\005kxord\005kxorq\005kxorw\004lahf\003lar\004larl\004la"
6596    "rq\004larw\005lcall\006lcalll\006lcallq\006lcallw\005lddqu\007ldmxcsr\003"
6597    "lds\004ldsl\004ldsw\003lea\004leal\004leaq\005leave\004leaw\003les\004l"
6598    "esl\004lesw\006lfence\003lfs\004lfsl\004lfsq\004lfsw\004lgdt\005lgdtd\005"
6599    "lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004lgsq\004lgsw\004lidt\005lidtd"
6600    "\005lidtl\005lidtq\005lidtw\004ljmp\005ljmpl\005ljmpq\005ljmpw\004lldt\005"
6601    "lldtw\006llwpcb\004lmsw\005lmsww\004lock\004lods\005lodsb\005lodsd\005l"
6602    "odsl\005lodsq\005lodsw\004loop\005loope\006loopne\005lretl\005lretq\005"
6603    "lretw\003lsl\004lsll\004lslq\004lslw\003lss\004lssl\004lssq\004lssw\003"
6604    "ltr\004ltrw\006lwpins\006lwpval\005lzcnt\006lzcntl\006lzcntq\006lzcntw\n"
6605    "maskmovdqu\010maskmovq\005maxpd\005maxps\005maxsd\005maxss\006mfence\005"
6606    "minpd\005minps\005minsd\005minss\007monitor\010monitorx\007montmul\003m"
6607    "ov\005mov.s\006movabs\007movabsb\007movabsl\007movabsq\007movabsw\006mo"
6608    "vapd\010movapd.s\006movaps\010movaps.s\004movb\006movb.s\005movbe\006mo"
6609    "vbel\006movbeq\006movbew\004movd\007movddup\tmovdir64b\007movdiri\007mo"
6610    "vdq2q\006movdqa\010movdqa.s\006movdqu\010movdqu.s\007movhlps\006movhpd\006"
6611    "movhps\004movl\006movl.s\007movlhps\006movlpd\006movlps\010movmskpd\010"
6612    "movmskps\007movntdq\010movntdqa\006movnti\007movntil\007movntiq\007movn"
6613    "tpd\007movntps\006movntq\007movntsd\007movntss\004movq\006movq.s\007mov"
6614    "q2dq\004movs\005movsb\006movsbl\006movsbq\006movsbw\005movsd\007movsd.s"
6615    "\010movshdup\005movsl\010movsldup\006movslq\005movsq\005movss\007movss."
6616    "s\005movsw\006movswl\006movswq\005movsx\006movsxd\006movupd\010movupd.s"
6617    "\006movups\010movups.s\004movw\006movw.s\006movzbl\006movzbq\006movzbw\006"
6618    "movzwl\006movzwq\005movzx\007mpsadbw\003mul\004mulb\004mull\005mulpd\005"
6619    "mulps\004mulq\005mulsd\005mulss\004mulw\004mulx\005mulxl\005mulxq\005mw"
6620    "ait\006mwaitx\003neg\004negb\004negl\004negq\004negw\003nop\004nopl\004"
6621    "nopq\004nopw\003not\004notb\004notl\004notq\004notw\002or\003orb\003orl"
6622    "\004orpd\004orps\003orq\003orw\003out\004outb\004outl\004outs\005outsb\005"
6623    "outsd\005outsl\005outsw\004outw\005pabsb\005pabsd\005pabsw\010packssdw\010"
6624    "packsswb\010packusdw\010packuswb\005paddb\005paddd\005paddq\006paddsb\006"
6625    "paddsw\007paddusb\007paddusw\005paddw\007palignr\004pand\005pandn\005pa"
6626    "use\005pavgb\007pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq"
6627    "\014pclmulhqlqdq\014pclmullqhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007"
6628    "pcmpeqd\007pcmpeqq\007pcmpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpg"
6629    "td\007pcmpgtq\007pcmpgtw\tpcmpistri\tpcmpistrm\007pconfig\004pdep\005pd"
6630    "epl\005pdepq\004pext\005pextl\005pextq\006pextrb\006pextrd\006pextrq\006"
6631    "pextrw\005pf2id\005pf2iw\005pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfc"
6632    "mpgt\005pfmax\005pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpi"
6633    "t1\010pfrcpit2\010pfrsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007p"
6634    "haddsw\006phaddw\nphminposuw\006phsubd\007phsubsw\006phsubw\005pi2fd\005"
6635    "pi2fw\006pinsrb\006pinsrd\006pinsrq\006pinsrw\tpmaddubsw\007pmaddwd\006"
6636    "pmaxsb\006pmaxsd\006pmaxsw\006pmaxub\006pmaxud\006pmaxuw\006pminsb\006p"
6637    "minsd\006pminsw\006pminub\006pminud\006pminuw\010pmovmskb\010pmovsxbd\010"
6638    "pmovsxbq\010pmovsxbw\010pmovsxdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010"
6639    "pmovzxbq\010pmovzxbw\010pmovzxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010p"
6640    "mulhrsw\007pmulhrw\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003"
6641    "pop\005popal\005popaw\006popcnt\007popcntl\007popcntq\007popcntw\004pop"
6642    "f\005popfd\005popfl\005popfq\005popfw\004popl\004popq\004popw\003por\010"
6643    "prefetch\013prefetchnta\nprefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013"
6644    "prefetchwt1\006psadbw\006pshufb\006pshufd\007pshufhw\007pshuflw\006pshu"
6645    "fw\006psignb\006psignd\006psignw\005pslld\006pslldq\005psllq\005psllw\005"
6646    "psrad\005psraw\005psrld\006psrldq\005psrlq\005psrlw\005psubb\005psubd\005"
6647    "psubq\006psubsb\006psubsw\007psubusb\007psubusw\005psubw\006pswapd\005p"
6648    "test\007ptwrite\010ptwritel\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhq"
6649    "dq\tpunpckhwd\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006p"
6650    "ushal\006pushaw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pus"
6651    "hl\005pushq\005pushw\004pxor\003rcl\004rclb\004rcll\004rclq\004rclw\005"
6652    "rcpps\005rcpss\003rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfs"
6653    "basel\trdfsbaseq\010rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\005rdpid\006"
6654    "rdpkru\005rdpmc\006rdrand\007rdrandl\007rdrandq\007rdrandw\006rdseed\007"
6655    "rdseedl\007rdseedq\007rdseedw\006rdsspd\006rdsspq\005rdtsc\006rdtscp\003"
6656    "rep\005repne\003ret\004retf\005retfq\004retl\004retq\004retw\005rex64\003"
6657    "rol\004rolb\004roll\004rolq\004rolw\003ror\004rorb\004rorl\004rorq\004r"
6658    "orw\004rorx\005rorxl\005rorxq\007roundpd\007roundps\007roundsd\007round"
6659    "ss\003rsm\007rsqrtps\007rsqrtss\010rstorssp\004sahf\004salc\003sar\004s"
6660    "arb\004sarl\004sarq\004sarw\004sarx\005sarxl\005sarxq\013saveprevssp\003"
6661    "sbb\004sbbb\004sbbl\004sbbq\004sbbw\004scas\005scasb\005scasd\005scasl\005"
6662    "scasq\005scasw\004seta\005setae\004setb\005setbe\004sete\004setg\005set"
6663    "ge\004setl\005setle\005setne\005setno\005setnp\005setns\004seto\004setp"
6664    "\004sets\010setssbsy\006sfence\004sgdt\005sgdtd\005sgdtl\005sgdtq\005sg"
6665    "dtw\010sha1msg1\010sha1msg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256ms"
6666    "g2\013sha256rnds2\003shl\004shlb\004shld\005shldl\005shldq\005shldw\004"
6667    "shll\004shlq\004shlw\004shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005"
6668    "shrdl\005shrdq\005shrdw\004shrl\004shrq\004shrw\004shrx\005shrxl\005shr"
6669    "xq\006shufpd\006shufps\004sidt\005sidtd\005sidtl\005sidtq\005sidtw\006s"
6670    "kinit\004sldt\005sldtl\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005"
6671    "smswq\005smsww\006sqrtpd\006sqrtps\006sqrtsd\006sqrtss\002ss\004stac\003"
6672    "stc\003std\004stgi\003sti\007stmxcsr\004stos\005stosb\005stosd\005stosl"
6673    "\005stosq\005stosw\003str\004strl\004strq\004strw\003sub\004subb\004sub"
6674    "l\005subpd\005subps\004subq\005subsd\005subss\004subw\006swapgs\007sysc"
6675    "all\010sysenter\007sysexit\010sysexitl\010sysexitq\006sysret\007sysretl"
6676    "\007sysretq\006t1mskc\007t1mskcl\007t1mskcq\004test\005testb\005testl\005"
6677    "testq\005testw\006tpause\005tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzms"
6678    "k\006tzmskl\006tzmskq\007ucomisd\007ucomiss\003ud2\004ud2b\010umonitor\006"
6679    "umwait\010unpckhpd\010unpckhps\010unpcklpd\010unpcklps\tv4fmaddps\tv4fm"
6680    "addss\nv4fnmaddps\nv4fnmaddss\006vaddpd\006vaddps\006vaddsd\006vaddss\t"
6681    "vaddsubpd\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013vaesenclas"
6682    "t\007vaesimc\020vaeskeygenassist\007valignd\007valignq\007vandnpd\007va"
6683    "ndnps\006vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010vblendps"
6684    "\tvblendvpd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017vbroadca"
6685    "stf32x4\017vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x4\016vbr"
6686    "oadcasti128\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcasti32x8\017"
6687    "vbroadcasti64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadcastss\004v"
6688    "cmp\006vcmppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcomiss\013vc"
6689    "ompresspd\013vcompressps\tvcvtdq2pd\tvcvtdq2ps\tvcvtpd2dq\nvcvtpd2dqx\n"
6690    "vcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013"
6691    "vcvtpd2udqx\013vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd"
6692    "\tvcvtps2ph\tvcvtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nv"
6693    "cvtqq2psx\nvcvtqq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvc"
6694    "vtsd2usi\013vcvtsd2usil\013vcvtsd2usiq\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2s"
6695    "dq\tvcvtsi2ss\nvcvtsi2ssl\nvcvtsi2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil"
6696    "\nvcvtss2siq\nvcvtss2usi\013vcvtss2usil\013vcvtss2usiq\nvcvttpd2dq\013v"
6697    "cvttpd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2udq\014vcvttpd2udqx\014"
6698    "vcvttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2qq\013vcvttps2udq\013v"
6699    "cvttps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2siq\013vcvttsd2usi\014"
6700    "vcvttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvttss2sil\013vcvttss2siq\013"
6701    "vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvc"
6702    "vtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtu"
6703    "si2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsa"
6704    "dbw\006vdivpd\006vdivps\006vdivsd\006vdivss\005vdppd\005vdpps\004verr\004"
6705    "verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpandps\014vextractf128\015vex"
6706    "tractf32x4\015vextractf32x8\015vextractf64x2\015vextractf64x4\014vextra"
6707    "cti128\015vextracti32x4\015vextracti32x8\015vextracti64x2\015vextracti6"
6708    "4x4\nvextractps\013vfixupimmpd\013vfixupimmps\013vfixupimmsd\013vfixupi"
6709    "mmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss\013vfm"
6710    "add213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd213ss\013vfmadd231pd\013"
6711    "vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfmaddpd\010vfmaddps\010vf"
6712    "maddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsub132ps\016vfmaddsub213p"
6713    "d\016vfmaddsub213ps\016vfmaddsub231pd\016vfmaddsub231ps\013vfmaddsubpd\013"
6714    "vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013vfmsub132ss"
6715    "\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss\013vfmsub2"
6716    "31pd\013vfmsub231ps\013vfmsub231sd\013vfmsub231ss\016vfmsubadd132pd\016"
6717    "vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd213ps\016vfmsubadd231pd\016"
6718    "vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010vfmsubps\010"
6719    "vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfnmadd132ps\014vfnmadd132sd\014"
6720    "vfnmadd132ss\014vfnmadd213pd\014vfnmadd213ps\014vfnmadd213sd\014vfnmadd"
6721    "213ss\014vfnmadd231pd\014vfnmadd231ps\014vfnmadd231sd\014vfnmadd231ss\t"
6722    "vfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd\014vfnmsub13"
6723    "2ps\014vfnmsub132sd\014vfnmsub132ss\014vfnmsub213pd\014vfnmsub213ps\014"
6724    "vfnmsub213sd\014vfnmsub213ss\014vfnmsub231pd\014vfnmsub231ps\014vfnmsub"
6725    "231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvfnmsubss\nvfpc"
6726    "lasspd\013vfpclasspdq\013vfpclasspdx\013vfpclasspdy\013vfpclasspdz\nvfp"
6727    "classps\013vfpclasspsl\013vfpclasspsx\013vfpclasspsy\013vfpclasspsz\nvf"
6728    "pclasssd\nvfpclassss\007vfrczpd\007vfrczps\007vfrczsd\007vfrczss\nvgath"
6729    "erdpd\nvgatherdps\015vgatherpf0dpd\015vgatherpf0dps\015vgatherpf0qpd\015"
6730    "vgatherpf0qps\015vgatherpf1dpd\015vgatherpf1dps\015vgatherpf1qpd\015vga"
6731    "therpf1qps\nvgatherqpd\nvgatherqps\tvgetexppd\tvgetexpps\tvgetexpsd\tvg"
6732    "etexpss\nvgetmantpd\nvgetmantps\nvgetmantsd\nvgetmantss\021vgf2p8affine"
6733    "invqb\016vgf2p8affineqb\nvgf2p8mulb\007vhaddpd\007vhaddps\007vhsubpd\007"
6734    "vhsubps\013vinsertf128\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014"
6735    "vinsertf64x4\013vinserti128\014vinserti32x4\014vinserti32x8\014vinserti"
6736    "64x2\014vinserti64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nv"
6737    "maskmovpd\nvmaskmovps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall"
6738    "\007vmclear\006vmfunc\006vminpd\006vminps\006vminsd\006vminss\010vmlaun"
6739    "ch\006vmload\007vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005"
6740    "vmovd\010vmovddup\007vmovdqa\tvmovdqa.s\tvmovdqa32\013vmovdqa32.s\tvmov"
6741    "dqa64\013vmovdqa64.s\007vmovdqu\tvmovdqu.s\tvmovdqu16\013vmovdqu16.s\tv"
6742    "movdqu32\013vmovdqu32.s\tvmovdqu64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8"
6743    ".s\010vmovhlps\007vmovhpd\007vmovhps\010vmovlhps\007vmovlpd\007vmovlps\t"
6744    "vmovmskpd\tvmovmskps\010vmovntdq\tvmovntdqa\010vmovntpd\010vmovntps\005"
6745    "vmovq\007vmovq.s\006vmovsd\010vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010"
6746    "vmovss.s\007vmovupd\tvmovupd.s\007vmovups\tvmovups.s\010vmpsadbw\007vmp"
6747    "trld\007vmptrst\006vmread\007vmreadl\007vmreadq\010vmresume\005vmrun\006"
6748    "vmsave\006vmulpd\006vmulps\006vmulsd\006vmulss\007vmwrite\010vmwritel\010"
6749    "vmwriteq\006vmxoff\005vmxon\005vorpd\005vorps\tvp4dpwssd\nvp4dpwssds\006"
6750    "vpabsb\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpacksswb\tvpackusdw\t"
6751    "vpackuswb\006vpaddb\006vpaddd\006vpaddq\007vpaddsb\007vpaddsw\010vpaddu"
6752    "sb\010vpaddusw\006vpaddw\010vpalignr\005vpand\006vpandd\006vpandn\007vp"
6753    "andnd\007vpandnq\006vpandq\006vpavgb\006vpavgw\010vpblendd\tvpblendmb\t"
6754    "vpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw\014vpbroadcastb\014"
6755    "vpbroadcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014vpbroadcastq\014v"
6756    "pbroadcastw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclmullqhqdq\015vpclm"
6757    "ullqlqdq\nvpclmulqdq\006vpcmov\005vpcmp\006vpcmpb\006vpcmpd\010vpcmpeqb"
6758    "\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010vpcmpgt"
6759    "b\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006vpcmpq"
6760    "\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpuw\006vpcmpw\005vpcom\006vpco"
6761    "mb\006vpcomd\013vpcompressb\013vpcompressd\013vpcompressq\013vpcompress"
6762    "w\006vpcomq\007vpcomub\007vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vp"
6763    "conflictd\013vpconflictq\010vpdpbusd\tvpdpbusds\010vpdpwssd\tvpdpwssds\n"
6764    "vperm2f128\nvperm2i128\006vpermb\006vpermd\010vpermi2b\010vpermi2d\tvpe"
6765    "rmi2pd\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvper"
6766    "milpd\tvpermilps\007vpermpd\007vpermps\006vpermq\010vpermt2b\010vpermt2"
6767    "d\tvpermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006vpermw\tvpexpandb\tv"
6768    "pexpandd\tvpexpandq\tvpexpandw\007vpextrb\007vpextrd\007vpextrq\007vpex"
6769    "trw\nvpgatherdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vpha"
6770    "ddbq\010vphaddbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddu"
6771    "bq\tvphaddubw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010"
6772    "vphaddwq\013vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007"
6773    "vphsubw\010vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplz"
6774    "cntd\010vplzcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssd"
6775    "qh\nvpmacssdql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcssw"
6776    "d\tvpmadcswd\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpm"
6777    "askmovd\nvpmaskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpma"
6778    "xub\007vpmaxud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007"
6779    "vpminsw\007vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmo"
6780    "vd2m\007vpmovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmov"
6781    "m2w\tvpmovmskb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb"
6782    "\010vpmovsdw\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd"
6783    "\tvpmovsxbq\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpm"
6784    "ovusdw\tvpmovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmov"
6785    "wb\tvpmovzxbd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007"
6786    "vpmuldq\tvpmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmu"
6787    "llw\016vpmultishiftqb\010vpmuludq\010vpopcntb\010vpopcntd\010vpopcntq\010"
6788    "vpopcntw\004vpor\005vpord\005vporq\006vpperm\006vprold\006vprolq\007vpr"
6789    "olvd\007vprolvq\006vprord\006vprorq\007vprorvd\007vprorvq\006vprotb\006"
6790    "vprotd\006vprotq\006vprotw\007vpsadbw\013vpscatterdd\013vpscatterdq\013"
6791    "vpscatterqd\013vpscatterqq\006vpshab\006vpshad\006vpshaq\006vpshaw\006v"
6792    "pshlb\006vpshld\007vpshldd\007vpshldq\010vpshldvd\010vpshldvq\010vpshld"
6793    "vw\007vpshldw\006vpshlq\006vpshlw\007vpshrdd\007vpshrdq\010vpshrdvd\010"
6794    "vpshrdvq\010vpshrdvw\007vpshrdw\007vpshufb\014vpshufbitqmb\007vpshufd\010"
6795    "vpshufhw\010vpshuflw\007vpsignb\007vpsignd\007vpsignw\006vpslld\007vpsl"
6796    "ldq\006vpsllq\007vpsllvd\007vpsllvq\007vpsllvw\006vpsllw\006vpsrad\006v"
6797    "psraq\007vpsravd\007vpsravq\007vpsravw\006vpsraw\006vpsrld\007vpsrldq\006"
6798    "vpsrlq\007vpsrlvd\007vpsrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006vpsubd\006"
6799    "vpsubq\007vpsubsb\007vpsubsw\010vpsubusb\010vpsubusw\006vpsubw\nvpternl"
6800    "ogd\nvpternlogq\006vptest\010vptestmb\010vptestmd\010vptestmq\010vptest"
6801    "mw\tvptestnmb\tvptestnmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nvpunpckhdq\013"
6802    "vpunpckhqdq\nvpunpckhwd\nvpunpcklbw\nvpunpckldq\013vpunpcklqdq\nvpunpck"
6803    "lwd\005vpxor\006vpxord\006vpxorq\010vrangepd\010vrangeps\010vrangesd\010"
6804    "vrangess\010vrcp14pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010vrcp28pd\010"
6805    "vrcp28ps\010vrcp28sd\010vrcp28ss\006vrcpps\006vrcpss\tvreducepd\tvreduc"
6806    "eps\tvreducesd\tvreducess\013vrndscalepd\013vrndscaleps\013vrndscalesd\013"
6807    "vrndscaless\010vroundpd\010vroundps\010vroundsd\010vroundss\nvrsqrt14pd"
6808    "\nvrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt28ps\nvrsqrt28s"
6809    "d\nvrsqrt28ss\010vrsqrtps\010vrsqrtss\tvscalefpd\tvscalefps\tvscalefsd\t"
6810    "vscalefss\013vscatterdpd\013vscatterdps\016vscatterpf0dpd\016vscatterpf"
6811    "0dps\016vscatterpf0qpd\016vscatterpf0qps\016vscatterpf1dpd\016vscatterp"
6812    "f1dps\016vscatterpf1qpd\016vscatterpf1qps\013vscatterqpd\013vscatterqps"
6813    "\nvshuff32x4\nvshuff64x2\nvshufi32x4\nvshufi64x2\007vshufpd\007vshufps\007"
6814    "vsqrtpd\007vsqrtps\007vsqrtsd\007vsqrtss\010vstmxcsr\006vsubpd\006vsubp"
6815    "s\006vsubsd\006vsubss\007vtestpd\007vtestps\010vucomisd\010vucomiss\tvu"
6816    "npckhpd\tvunpckhps\tvunpcklpd\tvunpcklps\006vxorpd\006vxorps\010vzeroal"
6817    "l\nvzeroupper\004wait\006wbinvd\010wbnoinvd\010wrfsbase\twrfsbasel\twrf"
6818    "sbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\005wrssd\005"
6819    "wrssq\006wrussd\006wrussq\006xabort\010xacquire\004xadd\005xaddb\005xad"
6820    "dl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xc"
6821    "hgw\txcryptcbc\txcryptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006x"
6822    "getbv\005xlatb\003xor\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw"
6823    "\010xrelease\006xrstor\010xrstor64\007xrstors\txrstors64\005xsave\007xs"
6824    "ave64\006xsavec\010xsavec64\010xsaveopt\nxsaveopt64\006xsaves\010xsaves"
6825    "64\006xsetbv\005xsha1\007xsha256\006xstore\txstorerng\005xtest";
6826
6827namespace {
6828  struct MatchEntry {
6829    uint16_t Mnemonic;
6830    uint16_t Opcode;
6831    uint16_t ConvertFn;
6832    uint8_t RequiredFeatures;
6833    uint8_t Classes[9];
6834    StringRef getMnemonic() const {
6835      return StringRef(MnemonicTable + Mnemonic + 1,
6836                       MnemonicTable[Mnemonic]);
6837    }
6838  };
6839
6840  // Predicate for searching for an opcode.
6841  struct LessOpcode {
6842    bool operator()(const MatchEntry &LHS, StringRef RHS) {
6843      return LHS.getMnemonic() < RHS;
6844    }
6845    bool operator()(StringRef LHS, const MatchEntry &RHS) {
6846      return LHS < RHS.getMnemonic();
6847    }
6848    bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
6849      return LHS.getMnemonic() < RHS.getMnemonic();
6850    }
6851  };
6852} // end anonymous namespace.
6853
6854static const MatchEntry MatchTable0[] = {
6855  { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
6856  { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
6857  { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
6858  { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
6859  { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
6860  { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
6861  { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
6862  { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
6863  { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
6864  { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
6865  { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
6866  { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
6867  { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6868  { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
6869  { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
6870  { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
6871  { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
6872  { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
6873  { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
6874  { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
6875  { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6876  { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6877  { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
6878  { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
6879  { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
6880  { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
6881  { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
6882  { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
6883  { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
6884  { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6885  { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
6886  { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
6887  { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
6888  { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
6889  { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
6890  { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
6891  { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
6892  { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
6893  { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
6894  { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6895  { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6896  { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6897  { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6898  { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
6899  { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
6900  { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
6901  { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
6902  { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
6903  { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
6904  { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6905  { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
6906  { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
6907  { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
6908  { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
6909  { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
6910  { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
6911  { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
6912  { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6913  { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6914  { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6915  { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6916  { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6917  { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6918  { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
6919  { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
6920  { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
6921  { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
6922  { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
6923  { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
6924  { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
6925  { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6926  { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6927  { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
6928  { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6929  { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
6930  { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6931  { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6932  { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6933  { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6934  { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
6935  { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
6936  { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
6937  { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
6938  { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
6939  { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
6940  { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
6941  { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
6942  { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
6943  { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6944  { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6945  { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6946  { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6947  { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6948  { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6949  { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6950  { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6951  { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6952  { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6953  { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6954  { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6955  { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6956  { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6957  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
6958  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
6959  { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
6960  { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
6961  { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
6962  { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
6963  { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
6964  { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
6965  { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6966  { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
6967  { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
6968  { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
6969  { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
6970  { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
6971  { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
6972  { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
6973  { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6974  { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
6975  { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
6976  { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6977  { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6978  { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6979  { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6980  { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
6981  { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
6982  { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6983  { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6984  { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6985  { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6986  { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6987  { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
6988  { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
6989  { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
6990  { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
6991  { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
6992  { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
6993  { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
6994  { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6995  { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
6996  { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
6997  { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
6998  { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
6999  { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7000  { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7001  { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7002  { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7003  { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7004  { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
7005  { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
7006  { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7007  { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7008  { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7009  { 277 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7010  { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7011  { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7012  { 284 /* bextrq */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
7013  { 284 /* bextrq */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
7014  { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7015  { 299 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7016  { 308 /* blcfillq */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7017  { 308 /* blcfillq */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7018  { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7019  { 328 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7020  { 335 /* blcicq */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7021  { 335 /* blcicq */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7022  { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7023  { 342 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7024  { 348 /* blciq */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7025  { 348 /* blciq */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7026  { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7027  { 361 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7028  { 369 /* blcmskq */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7029  { 369 /* blcmskq */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7030  { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7031  { 382 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7032  { 388 /* blcsq */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7033  { 388 /* blcsq */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7034  { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7035  { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7036  { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7037  { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7038  { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7039  { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7040  { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7041  { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7042  { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7043  { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7044  { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7045  { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7046  { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7047  { 436 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7048  { 445 /* blsfillq */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7049  { 445 /* blsfillq */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7050  { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7051  { 465 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7052  { 472 /* blsicq */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7053  { 472 /* blsicq */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7054  { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7055  { 479 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7056  { 485 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7057  { 485 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7058  { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7059  { 498 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7060  { 506 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7061  { 506 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7062  { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7063  { 519 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7064  { 525 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7065  { 525 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7066  { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7067  { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7068  { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7069  { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7070  { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7071  { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7072  { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7073  { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7074  { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7075  { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7076  { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7077  { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7078  { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_BNDR }, },
7079  { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7080  { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7081  { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
7082  { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
7083  { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
7084  { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
7085  { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
7086  { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem }, },
7087  { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
7088  { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
7089  { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7090  { 586 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7091  { 591 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7092  { 591 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7093  { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7094  { 596 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7095  { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7096  { 605 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7097  { 610 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7098  { 610 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7099  { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7100  { 615 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7101  { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
7102  { 633 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
7103  { 640 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7104  { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7105  { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7106  { 647 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7107  { 647 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7108  { 647 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7109  { 652 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7110  { 652 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7111  { 652 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7112  { 652 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7113  { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7114  { 657 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7115  { 657 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7116  { 657 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7117  { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7118  { 662 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7119  { 662 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7120  { 662 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7121  { 666 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7122  { 666 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7123  { 666 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7124  { 666 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7125  { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7126  { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7127  { 674 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7128  { 674 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7129  { 674 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7130  { 679 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7131  { 679 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7132  { 679 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7133  { 679 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7134  { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7135  { 684 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7136  { 684 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7137  { 684 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7138  { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7139  { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7140  { 693 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7141  { 693 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7142  { 693 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7143  { 698 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7144  { 698 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7145  { 698 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7146  { 698 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7147  { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7148  { 703 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7149  { 703 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7150  { 703 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7151  { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7152  { 708 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7153  { 708 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7154  { 708 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7155  { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7156  { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7157  { 723 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7158  { 723 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7159  { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7160  { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7161  { 734 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
7162  { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
7163  { 734 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
7164  { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7165  { 740 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
7166  { 740 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
7167  { 740 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7168  { 746 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7169  { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
7170  { 746 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
7171  { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7172  { 752 /* cbtw */, X86::CBW, Convert_NoOperands, 0, {  }, },
7173  { 770 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
7174  { 775 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
7175  { 779 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
7176  { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7177  { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7178  { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7179  { 811 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
7180  { 816 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
7181  { 824 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR8 }, },
7182  { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR32 }, },
7183  { 834 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR64 }, },
7184  { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7185  { 848 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR16 }, },
7186  { 853 /* cltd */, X86::CDQ, Convert_NoOperands, 0, {  }, },
7187  { 858 /* cltq */, X86::CDQE, Convert_NoOperands, 0, {  }, },
7188  { 863 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
7189  { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7190  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
7191  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
7192  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
7193  { 880 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
7194  { 897 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7195  { 897 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7196  { 905 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7197  { 905 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7198  { 913 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7199  { 913 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7200  { 921 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7201  { 921 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7202  { 928 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7203  { 928 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7204  { 935 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7205  { 935 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7206  { 955 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7207  { 955 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7208  { 963 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7209  { 963 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7210  { 971 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7211  { 971 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7212  { 979 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7213  { 979 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7214  { 986 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7215  { 986 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7216  { 993 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7217  { 993 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7218  { 1006 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7219  { 1006 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7220  { 1013 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7221  { 1013 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7222  { 1020 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7223  { 1020 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7224  { 1040 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7225  { 1040 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7226  { 1048 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7227  { 1048 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7228  { 1056 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7229  { 1056 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7230  { 1064 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7231  { 1064 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7232  { 1071 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7233  { 1071 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7234  { 1078 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7235  { 1078 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7236  { 1098 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7237  { 1098 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7238  { 1106 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7239  { 1106 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7240  { 1114 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7241  { 1114 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7242  { 1122 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7243  { 1122 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7244  { 1129 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7245  { 1129 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7246  { 1136 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7247  { 1136 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7248  { 1150 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7249  { 1150 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7250  { 1158 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7251  { 1158 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7252  { 1166 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7253  { 1166 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7254  { 1181 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7255  { 1181 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7256  { 1189 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7257  { 1189 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7258  { 1197 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7259  { 1197 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7260  { 1212 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7261  { 1212 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7262  { 1220 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7263  { 1220 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7264  { 1228 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7265  { 1228 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7266  { 1243 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7267  { 1243 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7268  { 1251 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7269  { 1251 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7270  { 1259 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7271  { 1259 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7272  { 1273 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7273  { 1273 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7274  { 1280 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7275  { 1280 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7276  { 1287 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7277  { 1287 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7278  { 1300 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7279  { 1300 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7280  { 1307 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7281  { 1307 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7282  { 1314 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7283  { 1314 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7284  { 1327 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7285  { 1327 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7286  { 1334 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7287  { 1334 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7288  { 1341 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7289  { 1341 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7290  { 1348 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
7291  { 1348 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
7292  { 1348 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
7293  { 1348 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
7294  { 1348 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
7295  { 1348 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
7296  { 1348 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
7297  { 1348 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
7298  { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7299  { 1352 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7300  { 1352 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7301  { 1352 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7302  { 1352 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7303  { 1352 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7304  { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7305  { 1357 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7306  { 1357 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7307  { 1357 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7308  { 1357 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7309  { 1357 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7310  { 1357 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7311  { 1357 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7312  { 1357 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7313  { 1362 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7314  { 1362 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7315  { 1368 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7316  { 1368 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7317  { 1374 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7318  { 1374 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7319  { 1374 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7320  { 1374 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7321  { 1374 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7322  { 1374 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7323  { 1374 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7324  { 1374 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7325  { 1374 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7326  { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
7327  { 1390 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7328  { 1390 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
7329  { 1396 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
7330  { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
7331  { 1408 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7332  { 1408 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
7333  { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
7334  { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7335  { 1420 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7336  { 1420 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7337  { 1420 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7338  { 1420 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7339  { 1420 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7340  { 1420 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7341  { 1420 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7342  { 1420 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7343  { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
7344  { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7345  { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7346  { 1454 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7347  { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7348  { 1463 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7349  { 1472 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7350  { 1472 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7351  { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7352  { 1481 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7353  { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7354  { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7355  { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7356  { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7357  { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
7358  { 1514 /* cqto */, X86::CQO, Convert_NoOperands, 0, {  }, },
7359  { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
7360  { 1525 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
7361  { 1525 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
7362  { 1525 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
7363  { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7364  { 1532 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7365  { 1539 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7366  { 1539 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7367  { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
7368  { 1546 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
7369  { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
7370  { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7371  { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7372  { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7373  { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7374  { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7375  { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7376  { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7377  { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7378  { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7379  { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7380  { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7381  { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7382  { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7383  { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7384  { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7385  { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7386  { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7387  { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7388  { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7389  { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7390  { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7391  { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7392  { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7393  { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7394  { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7395  { 1655 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7396  { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7397  { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7398  { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7399  { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7400  { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7401  { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7402  { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7403  { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7404  { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7405  { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7406  { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7407  { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7408  { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7409  { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7410  { 1742 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7411  { 1742 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7412  { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7413  { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7414  { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7415  { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7416  { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7417  { 1760 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7418  { 1770 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7419  { 1770 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7420  { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7421  { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7422  { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7423  { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7424  { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7425  { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7426  { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7427  { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7428  { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7429  { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7430  { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7431  { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7432  { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7433  { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7434  { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7435  { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7436  { 1852 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7437  { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7438  { 1852 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7439  { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7440  { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7441  { 1862 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7442  { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7443  { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7444  { 1893 /* cwtd */, X86::CWD, Convert_NoOperands, 0, {  }, },
7445  { 1898 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, {  }, },
7446  { 1903 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
7447  { 1907 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
7448  { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, {  }, },
7449  { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
7450  { 1922 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7451  { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
7452  { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
7453  { 1927 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7454  { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
7455  { 1932 /* decq */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7456  { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
7457  { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
7458  { 1937 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7459  { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7460  { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7461  { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7462  { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
7463  { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7464  { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7465  { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
7466  { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
7467  { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7468  { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7469  { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7470  { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7471  { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7472  { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7473  { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
7474  { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
7475  { 1973 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7476  { 1973 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7477  { 1979 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7478  { 1979 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7479  { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7480  { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7481  { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
7482  { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
7483  { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7484  { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7485  { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7486  { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7487  { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
7488  { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
7489  { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
7490  { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
7491  { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, 0, {  }, },
7492  { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, 0, {  }, },
7493  { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, 0, {  }, },
7494  { 2042 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
7495  { 2048 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
7496  { 2051 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
7497  { 2051 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
7498  { 2061 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7499  { 2061 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
7500  { 2067 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
7501  { 2073 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
7502  { 2078 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
7503  { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7504  { 2078 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7505  { 2078 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7506  { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7507  { 2083 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7508  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
7509  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7510  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7511  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7512  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7513  { 2095 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7514  { 2101 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7515  { 2106 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7516  { 2112 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
7517  { 2117 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7518  { 2124 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7519  { 2132 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7520  { 2139 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7521  { 2147 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7522  { 2156 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7523  { 2164 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7524  { 2172 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7525  { 2179 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
7526  { 2179 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7527  { 2184 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
7528  { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7529  { 2184 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7530  { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7531  { 2190 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7532  { 2196 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
7533  { 2196 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7534  { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
7535  { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7536  { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7537  { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7538  { 2209 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7539  { 2216 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
7540  { 2223 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7541  { 2230 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7542  { 2236 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
7543  { 2241 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
7544  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7545  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7546  { 2249 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7547  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7548  { 2254 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7549  { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
7550  { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7551  { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7552  { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7553  { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7554  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7555  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7556  { 2266 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7557  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7558  { 2272 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7559  { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
7560  { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7561  { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7562  { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7563  { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7564  { 2286 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7565  { 2293 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7566  { 2299 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
7567  { 2305 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
7568  { 2311 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
7569  { 2324 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7570  { 2331 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7571  { 2344 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7572  { 2358 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7573  { 2366 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7574  { 2374 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7575  { 2387 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7576  { 2401 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7577  { 2409 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7578  { 2417 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7579  { 2429 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7580  { 2435 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7581  { 2442 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7582  { 2454 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7583  { 2461 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7584  { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
7585  { 2481 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7586  { 2493 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7587  { 2500 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7588  { 2508 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7589  { 2515 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7590  { 2528 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7591  { 2536 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7592  { 2545 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7593  { 2559 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7594  { 2573 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7595  { 2581 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7596  { 2589 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7597  { 2596 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7598  { 2600 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
7599  { 2605 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7600  { 2611 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7601  { 2618 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7602  { 2623 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
7603  { 2630 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
7604  { 2637 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
7605  { 2644 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
7606  { 2651 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
7607  { 2657 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7608  { 2662 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7609  { 2667 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
7610  { 2672 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
7611  { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7612  { 2672 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7613  { 2672 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7614  { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7615  { 2677 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7616  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
7617  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7618  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7619  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7620  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7621  { 2689 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7622  { 2695 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
7623  { 2702 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
7624  { 2709 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
7625  { 2714 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7626  { 2721 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7627  { 2728 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7628  { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
7629  { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
7630  { 2736 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7631  { 2743 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
7632  { 2750 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
7633  { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
7634  { 2763 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
7635  { 2769 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
7636  { 2777 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7637  { 2784 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
7638  { 2787 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
7639  { 2794 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
7640  { 2799 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
7641  { 2807 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
7642  { 2813 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7643  { 2817 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7644  { 2822 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
7645  { 2827 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7646  { 2833 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7647  { 2839 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7648  { 2845 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7649  { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7650  { 2850 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7651  { 2850 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7652  { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7653  { 2855 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7654  { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
7655  { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7656  { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7657  { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7658  { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7659  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7660  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7661  { 2867 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7662  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7663  { 2873 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7664  { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
7665  { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7666  { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7667  { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7668  { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7669  { 2887 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7670  { 2894 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7671  { 2900 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
7672  { 2905 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
7673  { 2905 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
7674  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
7675  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7676  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7677  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7678  { 2918 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
7679  { 2918 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
7680  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
7681  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7682  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7683  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7684  { 2933 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
7685  { 2941 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
7686  { 2946 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
7687  { 2946 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
7688  { 2951 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
7689  { 2959 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7690  { 2969 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
7691  { 2976 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7692  { 2985 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
7693  { 2993 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
7694  { 2999 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
7695  { 3007 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
7696  { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7697  { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7698  { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7699  { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7700  { 3045 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7701  { 3045 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7702  { 3055 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
7703  { 3058 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7704  { 3058 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7705  { 3065 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7706  { 3065 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7707  { 3072 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
7708  { 3076 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7709  { 3076 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7710  { 3083 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7711  { 3083 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7712  { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7713  { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7714  { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7715  { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
7716  { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7717  { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7718  { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
7719  { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
7720  { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7721  { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7722  { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
7723  { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
7724  { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7725  { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7726  { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
7727  { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
7728  { 3124 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7729  { 3124 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7730  { 3130 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7731  { 3130 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7732  { 3130 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7733  { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7734  { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7735  { 3130 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7736  { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
7737  { 3130 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
7738  { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7739  { 3130 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7740  { 3136 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7741  { 3136 /* imulq */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7742  { 3136 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7743  { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7744  { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7745  { 3136 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7746  { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
7747  { 3136 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
7748  { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
7749  { 3136 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
7750  { 3142 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7751  { 3142 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7752  { 3142 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7753  { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7754  { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7755  { 3142 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7756  { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
7757  { 3142 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
7758  { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
7759  { 3142 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
7760  { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
7761  { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7762  { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
7763  { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
7764  { 3159 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
7765  { 3159 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7766  { 3164 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
7767  { 3164 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
7768  { 3164 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7769  { 3169 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
7770  { 3169 /* incq */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7771  { 3174 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
7772  { 3182 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
7773  { 3190 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
7774  { 3190 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
7775  { 3190 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7776  { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
7777  { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7778  { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
7779  { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
7780  { 3203 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
7781  { 3213 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7782  { 3213 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
7783  { 3222 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7784  { 3222 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7785  { 3230 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
7786  { 3235 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
7787  { 3240 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7788  { 3244 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
7789  { 3249 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, {  }, },
7790  { 3254 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
7791  { 3259 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7792  { 3259 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7793  { 3266 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7794  { 3273 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
7795  { 3273 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
7796  { 3281 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7797  { 3281 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7798  { 3289 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7799  { 3289 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7800  { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
7801  { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7802  { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
7803  { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
7804  { 3312 /* iretl */, X86::IRET32, Convert_NoOperands, 0, {  }, },
7805  { 3318 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
7806  { 3324 /* iretw */, X86::IRET16, Convert_NoOperands, 0, {  }, },
7807  { 3330 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7808  { 3333 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7809  { 3337 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7810  { 3340 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7811  { 3344 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
7812  { 3349 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7813  { 3352 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7814  { 3358 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7815  { 3361 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7816  { 3365 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7817  { 3368 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7818  { 3372 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7819  { 3372 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
7820  { 3372 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
7821  { 3372 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7822  { 3372 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7823  { 3372 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7824  { 3376 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
7825  { 3376 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
7826  { 3376 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7827  { 3381 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
7828  { 3381 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7829  { 3386 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
7830  { 3386 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
7831  { 3386 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7832  { 3391 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7833  { 3395 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7834  { 3399 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7835  { 3403 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7836  { 3407 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7837  { 3410 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7838  { 3413 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
7839  { 3419 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7840  { 3422 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7841  { 3428 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7842  { 3434 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7843  { 3440 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7844  { 3446 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7845  { 3452 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7846  { 3458 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7847  { 3465 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7848  { 3472 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7849  { 3479 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7850  { 3486 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7851  { 3492 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7852  { 3498 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7853  { 3498 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
7854  { 3498 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, 0, { MCK_VK1, MCK_Mem8 }, },
7855  { 3498 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
7856  { 3498 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VK1 }, },
7857  { 3504 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7858  { 3504 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
7859  { 3504 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, 0, { MCK_VK1, MCK_Mem32 }, },
7860  { 3504 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
7861  { 3504 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VK1 }, },
7862  { 3510 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7863  { 3510 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR64 }, },
7864  { 3510 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, 0, { MCK_VK1, MCK_Mem64 }, },
7865  { 3510 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VK1 }, },
7866  { 3510 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VK1 }, },
7867  { 3516 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7868  { 3516 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
7869  { 3516 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, 0, { MCK_VK1, MCK_Mem16 }, },
7870  { 3516 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
7871  { 3516 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VK1 }, },
7872  { 3522 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7873  { 3528 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7874  { 3534 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7875  { 3540 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7876  { 3546 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7877  { 3551 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7878  { 3556 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7879  { 3561 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7880  { 3570 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7881  { 3579 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7882  { 3588 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7883  { 3597 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7884  { 3602 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7885  { 3611 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7886  { 3620 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7887  { 3629 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7888  { 3638 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7889  { 3647 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7890  { 3656 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7891  { 3665 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7892  { 3674 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7893  { 3681 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7894  { 3688 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7895  { 3695 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
7896  { 3702 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7897  { 3711 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7898  { 3720 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7899  { 3729 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7900  { 3736 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7901  { 3743 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7902  { 3750 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7903  { 3757 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7904  { 3763 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7905  { 3769 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7906  { 3775 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7907  { 3781 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
7908  { 3790 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7909  { 3790 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
7910  { 3795 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
7911  { 3795 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
7912  { 3800 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7913  { 3800 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7914  { 3805 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
7915  { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
7916  { 3805 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7917  { 3805 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7918  { 3811 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
7919  { 3811 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7920  { 3818 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
7921  { 3825 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
7922  { 3825 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7923  { 3832 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7924  { 3838 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7925  { 3850 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
7926  { 3855 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
7927  { 3864 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
7928  { 3864 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
7929  { 3869 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
7930  { 3874 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
7931  { 3874 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
7932  { 3880 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
7933  { 3889 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
7934  { 3894 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
7935  { 3899 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
7936  { 3910 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
7937  { 3915 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
7938  { 3920 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
7939  { 3936 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
7940  { 3942 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7941  { 3948 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
7942  { 3958 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
7943  { 3963 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
7944  { 3968 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
7945  { 3984 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
7946  { 3990 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7947  { 3996 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
7948  { 4002 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
7949  { 4002 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
7950  { 4002 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7951  { 4002 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7952  { 4007 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
7953  { 4007 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7954  { 4013 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem }, },
7955  { 4019 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
7956  { 4019 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7957  { 4030 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7958  { 4030 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7959  { 4036 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
7960  { 4036 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
7961  { 4048 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7962  { 4048 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7963  { 4054 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
7964  { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
7965  { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
7966  { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
7967  { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
7968  { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
7969  { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
7970  { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
7971  { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
7972  { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
7973  { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
7974  { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
7975  { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
7976  { 4094 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7977  { 4099 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7978  { 4105 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7979  { 4112 /* lretl */, X86::LRETL, Convert_NoOperands, 0, {  }, },
7980  { 4112 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
7981  { 4118 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
7982  { 4118 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
7983  { 4124 /* lretw */, X86::LRETW, Convert_NoOperands, 0, {  }, },
7984  { 4124 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
7985  { 4134 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7986  { 4134 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
7987  { 4139 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
7988  { 4139 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
7989  { 4144 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7990  { 4144 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7991  { 4153 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
7992  { 4158 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
7993  { 4163 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
7994  { 4172 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
7995  { 4172 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7996  { 4177 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7997  { 4177 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
7998  { 4177 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7999  { 4177 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8000  { 4184 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8001  { 4184 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
8002  { 4184 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8003  { 4184 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8004  { 4197 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8005  { 4197 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8006  { 4204 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8007  { 4204 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8008  { 4211 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8009  { 4211 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8010  { 4218 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
8011  { 4218 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
8012  { 4229 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
8013  { 4229 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
8014  { 4238 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8015  { 4238 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8016  { 4244 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8017  { 4244 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8018  { 4250 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8019  { 4250 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8020  { 4256 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8021  { 4256 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8022  { 4262 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
8023  { 4269 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8024  { 4269 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8025  { 4275 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8026  { 4275 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8027  { 4281 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8028  { 4281 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8029  { 4287 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8030  { 4287 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8031  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
8032  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8033  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8034  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
8035  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8036  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8037  { 4310 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
8038  { 4322 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8039  { 4322 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8040  { 4322 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8041  { 4322 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8042  { 4335 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
8043  { 4335 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
8044  { 4343 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
8045  { 4343 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
8046  { 4351 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
8047  { 4351 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8048  { 4351 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
8049  { 4359 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
8050  { 4359 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
8051  { 4367 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8052  { 4367 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8053  { 4367 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8054  { 4374 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8055  { 4383 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8056  { 4383 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8057  { 4383 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8058  { 4390 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8059  { 4399 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
8060  { 4399 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
8061  { 4399 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8062  { 4399 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8063  { 4399 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8064  { 4399 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8065  { 4399 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
8066  { 4399 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
8067  { 4399 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8068  { 4404 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8069  { 4417 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8070  { 4417 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8071  { 4424 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8072  { 4424 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8073  { 4431 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8074  { 4431 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8075  { 4438 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
8076  { 4438 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8077  { 4438 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
8078  { 4438 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
8079  { 4438 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8080  { 4438 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8081  { 4438 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
8082  { 4438 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
8083  { 4438 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8084  { 4438 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8085  { 4438 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8086  { 4438 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8087  { 4443 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8088  { 4443 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8089  { 4451 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, Feature_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8090  { 4451 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_GR32 }, },
8091  { 4451 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_1__Mem5125_0, Feature_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
8092  { 4461 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8093  { 4461 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
8094  { 4469 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
8095  { 4477 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8096  { 4477 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8097  { 4477 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8098  { 4484 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8099  { 4493 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8100  { 4493 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8101  { 4493 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8102  { 4500 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8103  { 4509 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8104  { 4517 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8105  { 4517 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8106  { 4524 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8107  { 4524 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8108  { 4531 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
8109  { 4531 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
8110  { 4531 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
8111  { 4531 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
8112  { 4531 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
8113  { 4531 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
8114  { 4531 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
8115  { 4531 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
8116  { 4531 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8117  { 4531 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8118  { 4531 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8119  { 4531 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8120  { 4531 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
8121  { 4531 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
8122  { 4531 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8123  { 4536 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8124  { 4543 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8125  { 4551 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8126  { 4551 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8127  { 4558 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8128  { 4558 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8129  { 4565 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8130  { 4574 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8131  { 4583 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8132  { 4591 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8133  { 4607 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8134  { 4615 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8135  { 4623 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8136  { 4631 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8137  { 4639 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8138  { 4646 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8139  { 4654 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8140  { 4662 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
8141  { 4662 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
8142  { 4662 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8143  { 4662 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8144  { 4662 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8145  { 4662 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
8146  { 4662 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
8147  { 4662 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8148  { 4662 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8149  { 4662 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8150  { 4662 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
8151  { 4662 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8152  { 4662 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
8153  { 4662 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
8154  { 4662 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8155  { 4662 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8156  { 4662 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8157  { 4662 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8158  { 4662 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8159  { 4662 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8160  { 4662 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
8161  { 4662 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8162  { 4662 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8163  { 4662 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8164  { 4667 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8165  { 4667 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8166  { 4667 /* movq.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8167  { 4674 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
8168  { 4687 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
8169  { 4693 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8170  { 4693 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8171  { 4700 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8172  { 4700 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8173  { 4707 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8174  { 4707 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8175  { 4714 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8176  { 4714 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8177  { 4714 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8178  { 4720 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8179  { 4728 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8180  { 4728 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8181  { 4737 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
8182  { 4743 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8183  { 4743 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8184  { 4752 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
8185  { 4752 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
8186  { 4759 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
8187  { 4765 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8188  { 4765 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8189  { 4765 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8190  { 4771 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8191  { 4779 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
8192  { 4785 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8193  { 4785 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8194  { 4792 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8195  { 4792 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8196  { 4799 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8197  { 4799 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8198  { 4799 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8199  { 4799 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8200  { 4799 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8201  { 4799 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8202  { 4799 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8203  { 4812 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8204  { 4812 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8205  { 4812 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8206  { 4819 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8207  { 4828 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8208  { 4828 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8209  { 4828 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8210  { 4835 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8211  { 4844 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
8212  { 4844 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
8213  { 4844 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
8214  { 4844 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
8215  { 4844 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
8216  { 4844 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8217  { 4844 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8218  { 4844 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8219  { 4844 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8220  { 4844 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
8221  { 4844 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
8222  { 4844 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
8223  { 4844 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8224  { 4849 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8225  { 4856 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8226  { 4856 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8227  { 4863 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8228  { 4863 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8229  { 4870 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8230  { 4870 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8231  { 4877 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8232  { 4877 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8233  { 4884 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8234  { 4884 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8235  { 4891 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8236  { 4891 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8237  { 4891 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8238  { 4891 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8239  { 4891 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8240  { 4891 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8241  { 4897 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8242  { 4897 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8243  { 4909 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
8244  { 4909 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8245  { 4914 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8246  { 4914 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8247  { 4919 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8248  { 4919 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8249  { 4925 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8250  { 4925 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8251  { 4931 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8252  { 4931 /* mulq */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8253  { 4936 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8254  { 4936 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8255  { 4942 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8256  { 4942 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8257  { 4948 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8258  { 4948 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8259  { 4958 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8260  { 4958 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8261  { 4964 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8262  { 4964 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8263  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
8264  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
8265  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
8266  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, {  }, },
8267  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
8268  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
8269  { 4987 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8270  { 4987 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8271  { 4992 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8272  { 4992 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8273  { 4997 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8274  { 4997 /* negq */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8275  { 5002 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8276  { 5002 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8277  { 5007 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
8278  { 5011 /* nopl */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
8279  { 5011 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8280  { 5016 /* nopq */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8281  { 5016 /* nopq */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8282  { 5021 /* nopw */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8283  { 5021 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8284  { 5030 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8285  { 5030 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8286  { 5035 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8287  { 5035 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8288  { 5040 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8289  { 5040 /* notq */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8290  { 5045 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8291  { 5045 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8292  { 5053 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8293  { 5053 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8294  { 5053 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
8295  { 5053 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8296  { 5053 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8297  { 5053 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8298  { 5057 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8299  { 5057 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8300  { 5057 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
8301  { 5057 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
8302  { 5057 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8303  { 5057 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
8304  { 5057 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8305  { 5057 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8306  { 5057 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8307  { 5061 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8308  { 5061 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8309  { 5066 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8310  { 5066 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8311  { 5071 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8312  { 5071 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8313  { 5071 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
8314  { 5071 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
8315  { 5071 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8316  { 5071 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
8317  { 5071 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8318  { 5071 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8319  { 5071 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8320  { 5075 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8321  { 5075 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8322  { 5075 /* orw */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
8323  { 5075 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
8324  { 5075 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8325  { 5075 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
8326  { 5075 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8327  { 5075 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8328  { 5075 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8329  { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
8330  { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8331  { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
8332  { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
8333  { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
8334  { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8335  { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
8336  { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
8337  { 5098 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
8338  { 5110 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
8339  { 5116 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
8340  { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
8341  { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8342  { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
8343  { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
8344  { 5127 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8345  { 5127 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8346  { 5127 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8347  { 5127 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8348  { 5133 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8349  { 5133 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8350  { 5133 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8351  { 5133 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8352  { 5139 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8353  { 5139 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8354  { 5139 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8355  { 5139 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8356  { 5145 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8357  { 5145 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8358  { 5145 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8359  { 5145 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8360  { 5154 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8361  { 5154 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8362  { 5154 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8363  { 5154 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8364  { 5163 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8365  { 5163 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8366  { 5172 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8367  { 5172 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8368  { 5172 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8369  { 5172 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8370  { 5181 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8371  { 5181 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8372  { 5181 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8373  { 5181 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8374  { 5187 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8375  { 5187 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8376  { 5187 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8377  { 5187 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8378  { 5193 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8379  { 5193 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8380  { 5193 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8381  { 5193 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8382  { 5199 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8383  { 5199 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8384  { 5199 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8385  { 5199 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8386  { 5206 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8387  { 5206 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8388  { 5206 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8389  { 5206 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8390  { 5213 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8391  { 5213 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8392  { 5213 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8393  { 5213 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8394  { 5221 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8395  { 5221 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8396  { 5221 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8397  { 5221 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8398  { 5229 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8399  { 5229 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8400  { 5229 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8401  { 5229 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8402  { 5235 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
8403  { 5235 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8404  { 5235 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8405  { 5235 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
8406  { 5243 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8407  { 5243 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8408  { 5243 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8409  { 5243 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8410  { 5248 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8411  { 5248 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8412  { 5248 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8413  { 5248 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8414  { 5254 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
8415  { 5260 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8416  { 5260 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8417  { 5260 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8418  { 5260 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8419  { 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8420  { 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8421  { 5274 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8422  { 5274 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8423  { 5274 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8424  { 5274 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8425  { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8426  { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8427  { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8428  { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8429  { 5289 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8430  { 5289 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8431  { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
8432  { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
8433  { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
8434  { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
8435  { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
8436  { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
8437  { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
8438  { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
8439  { 5349 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8440  { 5349 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8441  { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8442  { 5359 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8443  { 5359 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8444  { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8445  { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8446  { 5367 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8447  { 5367 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8448  { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8449  { 5375 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8450  { 5375 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8451  { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8452  { 5383 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8453  { 5383 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8454  { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8455  { 5391 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8456  { 5391 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8457  { 5401 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8458  { 5401 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8459  { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8460  { 5411 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8461  { 5411 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8462  { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8463  { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8464  { 5419 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8465  { 5419 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8466  { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8467  { 5427 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8468  { 5427 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8469  { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8470  { 5435 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8471  { 5435 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8472  { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8473  { 5443 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8474  { 5443 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8475  { 5453 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8476  { 5453 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8477  { 5463 /* pconfig */, X86::PCONFIG, Convert_NoOperands, 0, {  }, },
8478  { 5476 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8479  { 5476 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8480  { 5482 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8481  { 5482 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8482  { 5493 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8483  { 5493 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8484  { 5499 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8485  { 5499 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8486  { 5505 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8487  { 5505 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
8488  { 5512 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
8489  { 5512 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
8490  { 5519 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
8491  { 5519 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
8492  { 5526 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
8493  { 5526 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8494  { 5526 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
8495  { 5533 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8496  { 5533 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8497  { 5539 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8498  { 5539 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8499  { 5545 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8500  { 5545 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8501  { 5551 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8502  { 5551 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8503  { 5557 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8504  { 5557 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8505  { 5565 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8506  { 5565 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8507  { 5573 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8508  { 5573 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8509  { 5581 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8510  { 5581 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8511  { 5587 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8512  { 5587 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8513  { 5593 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8514  { 5593 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8515  { 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8516  { 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8517  { 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8518  { 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8519  { 5614 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8520  { 5614 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8521  { 5620 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8522  { 5620 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8523  { 5629 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8524  { 5629 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8525  { 5638 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8526  { 5638 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8527  { 5647 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8528  { 5647 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8529  { 5655 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8530  { 5655 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8531  { 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8532  { 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8533  { 5668 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8534  { 5668 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8535  { 5668 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8536  { 5668 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8537  { 5675 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8538  { 5675 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8539  { 5675 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8540  { 5675 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8541  { 5683 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8542  { 5683 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8543  { 5683 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8544  { 5683 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8545  { 5690 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8546  { 5690 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8547  { 5701 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8548  { 5701 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8549  { 5701 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8550  { 5701 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8551  { 5708 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8552  { 5708 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8553  { 5708 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8554  { 5708 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8555  { 5716 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8556  { 5716 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8557  { 5716 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8558  { 5716 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8559  { 5723 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8560  { 5723 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8561  { 5729 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8562  { 5729 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8563  { 5735 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8564  { 5735 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
8565  { 5742 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
8566  { 5742 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8567  { 5749 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
8568  { 5749 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
8569  { 5756 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
8570  { 5756 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8571  { 5756 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
8572  { 5756 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
8573  { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8574  { 5763 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8575  { 5763 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8576  { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8577  { 5773 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8578  { 5773 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8579  { 5773 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8580  { 5773 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8581  { 5781 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8582  { 5781 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8583  { 5788 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8584  { 5788 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8585  { 5795 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8586  { 5795 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8587  { 5795 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8588  { 5795 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8589  { 5802 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8590  { 5802 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8591  { 5802 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8592  { 5802 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8593  { 5809 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8594  { 5809 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8595  { 5816 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8596  { 5816 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8597  { 5823 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8598  { 5823 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8599  { 5830 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8600  { 5830 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8601  { 5837 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8602  { 5837 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8603  { 5837 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8604  { 5837 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8605  { 5844 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8606  { 5844 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8607  { 5844 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8608  { 5844 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8609  { 5851 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8610  { 5851 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8611  { 5858 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8612  { 5858 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8613  { 5865 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
8614  { 5865 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8615  { 5874 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8616  { 5874 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8617  { 5883 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8618  { 5883 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8619  { 5892 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8620  { 5892 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8621  { 5901 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8622  { 5901 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8623  { 5910 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8624  { 5910 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8625  { 5919 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8626  { 5919 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8627  { 5928 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8628  { 5928 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8629  { 5937 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8630  { 5937 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8631  { 5946 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8632  { 5946 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8633  { 5955 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8634  { 5955 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8635  { 5964 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8636  { 5964 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8637  { 5973 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8638  { 5973 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8639  { 5982 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8640  { 5982 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8641  { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8642  { 5989 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8643  { 5989 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8644  { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8645  { 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8646  { 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8647  { 6006 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8648  { 6006 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8649  { 6006 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8650  { 6006 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8651  { 6014 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8652  { 6014 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8653  { 6014 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8654  { 6014 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8655  { 6021 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8656  { 6021 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8657  { 6028 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8658  { 6028 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8659  { 6028 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8660  { 6028 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8661  { 6035 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8662  { 6035 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8663  { 6035 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8664  { 6035 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8665  { 6047 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8666  { 6053 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8667  { 6066 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8668  { 6066 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8669  { 6074 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8670  { 6074 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8671  { 6082 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8672  { 6082 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8673  { 6101 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8674  { 6107 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
8675  { 6113 /* popfw */, X86::POPF16, Convert_NoOperands, 0, {  }, },
8676  { 6119 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8677  { 6119 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8678  { 6119 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
8679  { 6119 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
8680  { 6119 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8681  { 6119 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8682  { 6119 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
8683  { 6124 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
8684  { 6124 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
8685  { 6124 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8686  { 6124 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8687  { 6129 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8688  { 6129 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8689  { 6129 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
8690  { 6129 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
8691  { 6129 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8692  { 6129 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8693  { 6129 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8694  { 6134 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8695  { 6134 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8696  { 6134 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8697  { 6134 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8698  { 6138 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8699  { 6147 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8700  { 6159 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8701  { 6170 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8702  { 6181 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8703  { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8704  { 6202 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8705  { 6214 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8706  { 6214 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8707  { 6214 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8708  { 6214 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8709  { 6221 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8710  { 6221 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8711  { 6221 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8712  { 6221 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8713  { 6228 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8714  { 6228 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8715  { 6235 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8716  { 6235 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8717  { 6243 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8718  { 6243 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8719  { 6251 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
8720  { 6251 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
8721  { 6258 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8722  { 6258 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8723  { 6258 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8724  { 6258 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8725  { 6265 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8726  { 6265 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8727  { 6265 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8728  { 6265 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8729  { 6272 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8730  { 6272 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8731  { 6272 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8732  { 6272 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8733  { 6279 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8734  { 6279 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8735  { 6279 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8736  { 6279 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8737  { 6279 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8738  { 6279 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8739  { 6285 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8740  { 6292 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8741  { 6292 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8742  { 6292 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8743  { 6292 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8744  { 6292 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8745  { 6292 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8746  { 6298 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8747  { 6298 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8748  { 6298 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8749  { 6298 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8750  { 6298 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8751  { 6298 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8752  { 6304 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8753  { 6304 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8754  { 6304 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8755  { 6304 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8756  { 6304 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8757  { 6304 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8758  { 6310 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8759  { 6310 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8760  { 6310 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8761  { 6310 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8762  { 6310 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8763  { 6310 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8764  { 6316 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8765  { 6316 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8766  { 6316 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8767  { 6316 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8768  { 6316 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8769  { 6316 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8770  { 6322 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8771  { 6329 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8772  { 6329 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8773  { 6329 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8774  { 6329 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8775  { 6329 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8776  { 6329 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8777  { 6335 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8778  { 6335 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8779  { 6335 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8780  { 6335 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8781  { 6335 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8782  { 6335 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8783  { 6341 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8784  { 6341 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8785  { 6341 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8786  { 6341 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8787  { 6347 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8788  { 6347 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8789  { 6347 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8790  { 6347 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8791  { 6353 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8792  { 6353 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8793  { 6353 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8794  { 6353 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8795  { 6359 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8796  { 6359 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8797  { 6359 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8798  { 6359 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8799  { 6366 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8800  { 6366 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8801  { 6366 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8802  { 6366 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8803  { 6373 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8804  { 6373 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8805  { 6373 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8806  { 6373 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8807  { 6381 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8808  { 6381 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8809  { 6381 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8810  { 6381 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8811  { 6389 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8812  { 6389 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8813  { 6389 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8814  { 6389 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8815  { 6395 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8816  { 6395 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8817  { 6402 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8818  { 6402 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8819  { 6416 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
8820  { 6416 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8821  { 6425 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8822  { 6425 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8823  { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8824  { 6434 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8825  { 6434 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8826  { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8827  { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8828  { 6444 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8829  { 6444 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8830  { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8831  { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8832  { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8833  { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8834  { 6465 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8835  { 6465 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8836  { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8837  { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8838  { 6475 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8839  { 6475 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8840  { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8841  { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8842  { 6485 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8843  { 6485 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8844  { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8845  { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8846  { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8847  { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8848  { 6506 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8849  { 6506 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8850  { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8851  { 6521 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8852  { 6528 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8853  { 6548 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8854  { 6555 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
8855  { 6562 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
8856  { 6569 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
8857  { 6569 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8858  { 6569 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8859  { 6569 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
8860  { 6569 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
8861  { 6569 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8862  { 6569 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8863  { 6569 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
8864  { 6569 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
8865  { 6569 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
8866  { 6575 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
8867  { 6575 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
8868  { 6575 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8869  { 6575 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
8870  { 6575 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
8871  { 6575 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8872  { 6581 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
8873  { 6581 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8874  { 6581 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8875  { 6581 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
8876  { 6581 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
8877  { 6581 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8878  { 6581 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8879  { 6581 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
8880  { 6581 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
8881  { 6581 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8882  { 6587 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8883  { 6587 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8884  { 6587 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8885  { 6587 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8886  { 6596 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8887  { 6596 /* rclb */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8888  { 6596 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
8889  { 6596 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
8890  { 6596 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
8891  { 6596 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
8892  { 6601 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8893  { 6601 /* rcll */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8894  { 6601 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
8895  { 6601 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
8896  { 6601 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8897  { 6601 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8898  { 6606 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8899  { 6606 /* rclq */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8900  { 6606 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
8901  { 6606 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
8902  { 6606 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8903  { 6606 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8904  { 6611 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8905  { 6611 /* rclw */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8906  { 6611 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
8907  { 6611 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
8908  { 6611 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8909  { 6611 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8910  { 6616 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8911  { 6616 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8912  { 6622 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8913  { 6622 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8914  { 6632 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8915  { 6632 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8916  { 6632 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
8917  { 6632 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
8918  { 6632 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
8919  { 6632 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
8920  { 6637 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8921  { 6637 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8922  { 6637 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
8923  { 6637 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
8924  { 6637 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8925  { 6637 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8926  { 6642 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8927  { 6642 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8928  { 6642 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
8929  { 6642 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
8930  { 6642 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8931  { 6642 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8932  { 6647 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8933  { 6647 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8934  { 6647 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
8935  { 6647 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
8936  { 6647 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8937  { 6647 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8938  { 6661 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
8939  { 6671 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8940  { 6690 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
8941  { 6700 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8942  { 6710 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
8943  { 6716 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8944  { 6716 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8945  { 6722 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
8946  { 6729 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
8947  { 6742 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8948  { 6750 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8949  { 6758 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8950  { 6773 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8951  { 6781 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8952  { 6789 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8953  { 6797 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8954  { 6804 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8955  { 6811 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
8956  { 6817 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
8957  { 6824 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
8958  { 6828 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
8959  { 6849 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
8960  { 6849 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
8961  { 6854 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
8962  { 6854 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
8963  { 6859 /* retw */, X86::RETW, Convert_NoOperands, 0, {  }, },
8964  { 6859 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
8965  { 6864 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
8966  { 6874 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8967  { 6874 /* rolb */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8968  { 6874 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
8969  { 6874 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
8970  { 6874 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
8971  { 6874 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
8972  { 6879 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8973  { 6879 /* roll */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8974  { 6879 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
8975  { 6879 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
8976  { 6879 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8977  { 6879 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8978  { 6884 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8979  { 6884 /* rolq */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8980  { 6884 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
8981  { 6884 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
8982  { 6884 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8983  { 6884 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8984  { 6889 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8985  { 6889 /* rolw */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8986  { 6889 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
8987  { 6889 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
8988  { 6889 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8989  { 6889 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8990  { 6898 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8991  { 6898 /* rorb */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8992  { 6898 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
8993  { 6898 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
8994  { 6898 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
8995  { 6898 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
8996  { 6903 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8997  { 6903 /* rorl */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8998  { 6903 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
8999  { 6903 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9000  { 6903 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9001  { 6903 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9002  { 6908 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9003  { 6908 /* rorq */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9004  { 6908 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9005  { 6908 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9006  { 6908 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9007  { 6908 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9008  { 6913 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9009  { 6913 /* rorw */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9010  { 6913 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9011  { 6913 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9012  { 6913 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9013  { 6913 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9014  { 6923 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9015  { 6923 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
9016  { 6929 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9017  { 6929 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
9018  { 6935 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9019  { 6935 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9020  { 6943 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9021  { 6943 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9022  { 6951 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9023  { 6951 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
9024  { 6959 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9025  { 6959 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9026  { 6967 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
9027  { 6971 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9028  { 6971 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9029  { 6979 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9030  { 6979 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9031  { 6987 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9032  { 6996 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
9033  { 7001 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, {  }, },
9034  { 7010 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9035  { 7010 /* sarb */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9036  { 7010 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9037  { 7010 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9038  { 7010 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9039  { 7010 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9040  { 7015 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9041  { 7015 /* sarl */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9042  { 7015 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9043  { 7015 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9044  { 7015 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9045  { 7015 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9046  { 7020 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9047  { 7020 /* sarq */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9048  { 7020 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9049  { 7020 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9050  { 7020 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9051  { 7020 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9052  { 7025 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9053  { 7025 /* sarw */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9054  { 7025 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9055  { 7025 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9056  { 7025 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9057  { 7025 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9058  { 7035 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9059  { 7035 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9060  { 7041 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9061  { 7041 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9062  { 7047 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, {  }, },
9063  { 7063 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9064  { 7063 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9065  { 7063 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9066  { 7063 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9067  { 7063 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9068  { 7063 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9069  { 7068 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9070  { 7068 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9071  { 7068 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9072  { 7068 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9073  { 7068 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9074  { 7068 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9075  { 7068 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9076  { 7068 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9077  { 7068 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9078  { 7073 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9079  { 7073 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9080  { 7073 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9081  { 7073 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9082  { 7073 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9083  { 7073 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9084  { 7073 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9085  { 7073 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9086  { 7073 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9087  { 7078 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9088  { 7078 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9089  { 7078 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9090  { 7078 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9091  { 7078 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9092  { 7078 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9093  { 7078 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9094  { 7078 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9095  { 7078 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9096  { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9097  { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9098  { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
9099  { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9100  { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9101  { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9102  { 7100 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9103  { 7100 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9104  { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9105  { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
9106  { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9107  { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9108  { 7118 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9109  { 7118 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9110  { 7123 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9111  { 7123 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9112  { 7129 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9113  { 7129 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9114  { 7134 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9115  { 7134 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9116  { 7140 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9117  { 7140 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9118  { 7145 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9119  { 7145 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9120  { 7150 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9121  { 7150 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9122  { 7156 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9123  { 7156 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9124  { 7161 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9125  { 7161 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9126  { 7167 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9127  { 7167 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9128  { 7173 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9129  { 7173 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9130  { 7179 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9131  { 7179 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9132  { 7185 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9133  { 7185 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9134  { 7191 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9135  { 7191 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9136  { 7196 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9137  { 7196 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9138  { 7201 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9139  { 7201 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9140  { 7206 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, {  }, },
9141  { 7215 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, {  }, },
9142  { 7233 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9143  { 7239 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9144  { 7245 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9145  { 7251 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9146  { 7251 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9147  { 7260 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9148  { 7260 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9149  { 7269 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9150  { 7269 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9151  { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9152  { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9153  { 7289 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9154  { 7289 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9155  { 7300 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9156  { 7300 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9157  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9158  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9159  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9160  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
9161  { 7327 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9162  { 7327 /* shlb */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9163  { 7327 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9164  { 7327 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9165  { 7327 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9166  { 7327 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9167  { 7337 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9168  { 7337 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9169  { 7337 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9170  { 7337 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9171  { 7337 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9172  { 7337 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9173  { 7343 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9174  { 7343 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9175  { 7343 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9176  { 7343 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9177  { 7343 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9178  { 7343 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9179  { 7349 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9180  { 7349 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9181  { 7349 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9182  { 7349 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9183  { 7349 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9184  { 7349 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9185  { 7355 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9186  { 7355 /* shll */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9187  { 7355 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9188  { 7355 /* shll */, X86::SHL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9189  { 7355 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9190  { 7355 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9191  { 7360 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9192  { 7360 /* shlq */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9193  { 7360 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9194  { 7360 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9195  { 7360 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9196  { 7360 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9197  { 7365 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9198  { 7365 /* shlw */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9199  { 7365 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9200  { 7365 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9201  { 7365 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9202  { 7365 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9203  { 7375 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9204  { 7375 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9205  { 7381 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9206  { 7381 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9207  { 7391 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9208  { 7391 /* shrb */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9209  { 7391 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9210  { 7391 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9211  { 7391 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9212  { 7391 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9213  { 7401 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9214  { 7401 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9215  { 7401 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9216  { 7401 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9217  { 7401 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9218  { 7401 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9219  { 7407 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9220  { 7407 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9221  { 7407 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9222  { 7407 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9223  { 7407 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9224  { 7407 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9225  { 7413 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9226  { 7413 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9227  { 7413 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9228  { 7413 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9229  { 7413 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9230  { 7413 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9231  { 7419 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9232  { 7419 /* shrl */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9233  { 7419 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9234  { 7419 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9235  { 7419 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9236  { 7419 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9237  { 7424 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9238  { 7424 /* shrq */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9239  { 7424 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9240  { 7424 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9241  { 7424 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9242  { 7424 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9243  { 7429 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9244  { 7429 /* shrw */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9245  { 7429 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9246  { 7429 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9247  { 7429 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9248  { 7429 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9249  { 7439 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9250  { 7439 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9251  { 7445 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9252  { 7445 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9253  { 7451 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9254  { 7451 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9255  { 7458 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9256  { 7458 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9257  { 7476 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9258  { 7482 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9259  { 7488 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9260  { 7494 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
9261  { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9262  { 7506 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9263  { 7512 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9264  { 7518 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9265  { 7518 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9266  { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
9267  { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
9268  { 7536 /* smswl */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9269  { 7542 /* smswq */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9270  { 7548 /* smsww */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9271  { 7548 /* smsww */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9272  { 7554 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9273  { 7554 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9274  { 7561 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9275  { 7561 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9276  { 7568 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9277  { 7568 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9278  { 7575 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9279  { 7575 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9280  { 7582 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, {  }, },
9281  { 7585 /* stac */, X86::STAC, Convert_NoOperands, 0, {  }, },
9282  { 7590 /* stc */, X86::STC, Convert_NoOperands, 0, {  }, },
9283  { 7594 /* std */, X86::STD, Convert_NoOperands, 0, {  }, },
9284  { 7598 /* stgi */, X86::STGI, Convert_NoOperands, 0, {  }, },
9285  { 7603 /* sti */, X86::STI, Convert_NoOperands, 0, {  }, },
9286  { 7607 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9287  { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9288  { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9289  { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9290  { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
9291  { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9292  { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9293  { 7632 /* stosl */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9294  { 7632 /* stosl */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9295  { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9296  { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
9297  { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9298  { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9299  { 7654 /* strl */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9300  { 7659 /* strq */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9301  { 7664 /* strw */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9302  { 7664 /* strw */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9303  { 7673 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9304  { 7673 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9305  { 7673 /* subb */, X86::SUB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9306  { 7673 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9307  { 7673 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9308  { 7673 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9309  { 7678 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9310  { 7678 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9311  { 7678 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9312  { 7678 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9313  { 7678 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9314  { 7678 /* subl */, X86::SUB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9315  { 7678 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9316  { 7678 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9317  { 7678 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9318  { 7683 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9319  { 7683 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9320  { 7689 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9321  { 7689 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9322  { 7695 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9323  { 7695 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9324  { 7695 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9325  { 7695 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9326  { 7695 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9327  { 7695 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9328  { 7695 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9329  { 7695 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9330  { 7695 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9331  { 7700 /* subsd */, X86::SUBSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9332  { 7700 /* subsd */, X86::SUBSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9333  { 7706 /* subss */, X86::SUBSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9334  { 7706 /* subss */, X86::SUBSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9335  { 7712 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9336  { 7712 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9337  { 7712 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9338  { 7712 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9339  { 7712 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9340  { 7712 /* subw */, X86::SUB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9341  { 7712 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9342  { 7712 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9343  { 7712 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9344  { 7717 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, {  }, },
9345  { 7724 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, {  }, },
9346  { 7732 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, {  }, },
9347  { 7749 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, 0, {  }, },
9348  { 7758 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, {  }, },
9349  { 7774 /* sysretl */, X86::SYSRET, Convert_NoOperands, 0, {  }, },
9350  { 7782 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
9351  { 7797 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9352  { 7797 /* t1mskcl */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9353  { 7805 /* t1mskcq */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9354  { 7805 /* t1mskcq */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9355  { 7818 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9356  { 7818 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9357  { 7818 /* testb */, X86::TEST8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9358  { 7818 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9359  { 7818 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9360  { 7818 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
9361  { 7824 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9362  { 7824 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9363  { 7824 /* testl */, X86::TEST32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9364  { 7824 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9365  { 7824 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9366  { 7824 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
9367  { 7830 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9368  { 7830 /* testq */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9369  { 7830 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9370  { 7830 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_GR64 }, },
9371  { 7830 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9372  { 7830 /* testq */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
9373  { 7836 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9374  { 7836 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9375  { 7836 /* testw */, X86::TEST16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9376  { 7836 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9377  { 7836 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9378  { 7836 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
9379  { 7842 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
9380  { 7855 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9381  { 7855 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9382  { 7862 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9383  { 7862 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9384  { 7869 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9385  { 7869 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9386  { 7882 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9387  { 7882 /* tzmskl */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9388  { 7889 /* tzmskq */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9389  { 7889 /* tzmskq */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9390  { 7896 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9391  { 7896 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9392  { 7904 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9393  { 7904 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9394  { 7912 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, {  }, },
9395  { 7916 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, {  }, },
9396  { 7921 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
9397  { 7921 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, 0, { MCK_GR32 }, },
9398  { 7921 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9399  { 7930 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
9400  { 7937 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9401  { 7937 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9402  { 7946 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9403  { 7946 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9404  { 7955 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9405  { 7955 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9406  { 7964 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9407  { 7964 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9408  { 7973 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
9409  { 7973 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9410  { 7973 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9411  { 7983 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9412  { 7983 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9413  { 7983 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9414  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
9415  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9416  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9417  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9418  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9419  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9420  { 8015 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9421  { 8015 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9422  { 8015 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9423  { 8015 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9424  { 8015 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9425  { 8015 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9426  { 8015 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9427  { 8015 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9428  { 8015 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9429  { 8015 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9430  { 8015 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9431  { 8015 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9432  { 8015 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9433  { 8015 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9434  { 8015 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9435  { 8015 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9436  { 8015 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9437  { 8015 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9438  { 8015 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9439  { 8015 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9440  { 8015 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9441  { 8015 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9442  { 8015 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9443  { 8015 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9444  { 8015 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9445  { 8015 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9446  { 8015 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9447  { 8015 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9448  { 8015 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9449  { 8015 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9450  { 8015 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9451  { 8015 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9452  { 8015 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9453  { 8015 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9454  { 8022 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9455  { 8022 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9456  { 8022 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9457  { 8022 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9458  { 8022 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9459  { 8022 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9460  { 8022 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9461  { 8022 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9462  { 8022 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9463  { 8022 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9464  { 8022 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9465  { 8022 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9466  { 8022 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9467  { 8022 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9468  { 8022 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9469  { 8022 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9470  { 8022 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9471  { 8022 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9472  { 8022 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9473  { 8022 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9474  { 8022 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9475  { 8022 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9476  { 8022 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9477  { 8022 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9478  { 8022 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9479  { 8022 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9480  { 8022 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9481  { 8022 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9482  { 8022 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9483  { 8022 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9484  { 8022 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9485  { 8022 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9486  { 8022 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9487  { 8022 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9488  { 8029 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9489  { 8029 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9490  { 8029 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
9491  { 8029 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
9492  { 8029 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9493  { 8029 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9494  { 8029 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9495  { 8029 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9496  { 8029 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9497  { 8029 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9498  { 8029 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9499  { 8036 /* vaddss */, X86::VADDSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9500  { 8036 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9501  { 8036 /* vaddss */, X86::VADDSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
9502  { 8036 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
9503  { 8036 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9504  { 8036 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9505  { 8036 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9506  { 8036 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9507  { 8036 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9508  { 8036 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9509  { 8036 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9510  { 8043 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9511  { 8043 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9512  { 8043 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9513  { 8043 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9514  { 8053 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9515  { 8053 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9516  { 8053 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9517  { 8053 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9518  { 8063 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9519  { 8063 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9520  { 8063 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9521  { 8063 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9522  { 8063 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9523  { 8063 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9524  { 8063 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9525  { 8063 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9526  { 8063 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9527  { 8063 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9528  { 8071 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9529  { 8071 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9530  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9531  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9532  { 8071 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9533  { 8071 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9534  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9535  { 8071 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9536  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9537  { 8071 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9538  { 8083 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9539  { 8083 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9540  { 8083 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9541  { 8083 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9542  { 8083 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9543  { 8083 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9544  { 8083 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9545  { 8083 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9546  { 8083 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9547  { 8083 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9548  { 8091 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9549  { 8091 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9550  { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9551  { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9552  { 8091 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9553  { 8091 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9554  { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9555  { 8091 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9556  { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9557  { 8091 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9558  { 8103 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9559  { 8103 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9560  { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9561  { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9562  { 8128 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9563  { 8128 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9564  { 8128 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9565  { 8128 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9566  { 8128 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9567  { 8128 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9568  { 8128 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9569  { 8128 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9570  { 8128 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9571  { 8128 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9572  { 8128 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9573  { 8128 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9574  { 8128 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9575  { 8128 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9576  { 8128 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9577  { 8128 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9578  { 8128 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9579  { 8128 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9580  { 8128 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9581  { 8128 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9582  { 8128 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9583  { 8128 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9584  { 8128 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9585  { 8128 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9586  { 8128 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9587  { 8128 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9588  { 8128 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9589  { 8136 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9590  { 8136 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9591  { 8136 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9592  { 8136 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9593  { 8136 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9594  { 8136 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9595  { 8136 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9596  { 8136 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9597  { 8136 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9598  { 8136 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9599  { 8136 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9600  { 8136 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9601  { 8136 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9602  { 8136 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9603  { 8136 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9604  { 8136 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9605  { 8136 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9606  { 8136 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9607  { 8136 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9608  { 8136 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9609  { 8136 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9610  { 8136 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9611  { 8136 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9612  { 8136 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9613  { 8136 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9614  { 8136 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9615  { 8136 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9616  { 8144 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9617  { 8144 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9618  { 8144 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9619  { 8144 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9620  { 8144 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9621  { 8144 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9622  { 8144 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9623  { 8144 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9624  { 8144 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9625  { 8144 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9626  { 8144 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9627  { 8144 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9628  { 8144 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9629  { 8144 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9630  { 8144 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9631  { 8144 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9632  { 8144 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9633  { 8144 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9634  { 8144 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9635  { 8144 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9636  { 8144 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9637  { 8144 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9638  { 8144 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9639  { 8144 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9640  { 8144 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9641  { 8144 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9642  { 8144 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9643  { 8144 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9644  { 8144 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9645  { 8144 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9646  { 8144 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9647  { 8152 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9648  { 8152 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9649  { 8152 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9650  { 8152 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9651  { 8152 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9652  { 8152 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9653  { 8152 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9654  { 8152 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9655  { 8152 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9656  { 8152 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9657  { 8152 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9658  { 8152 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9659  { 8152 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9660  { 8152 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9661  { 8152 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9662  { 8152 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9663  { 8152 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9664  { 8152 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9665  { 8152 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9666  { 8152 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9667  { 8152 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9668  { 8152 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9669  { 8152 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9670  { 8152 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9671  { 8152 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9672  { 8152 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9673  { 8152 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9674  { 8152 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9675  { 8152 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9676  { 8152 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9677  { 8152 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9678  { 8160 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9679  { 8160 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9680  { 8160 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9681  { 8160 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9682  { 8160 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9683  { 8160 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9684  { 8160 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9685  { 8160 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9686  { 8160 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9687  { 8160 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9688  { 8160 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9689  { 8160 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9690  { 8160 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9691  { 8160 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9692  { 8160 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9693  { 8160 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9694  { 8160 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9695  { 8160 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9696  { 8160 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9697  { 8160 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9698  { 8160 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9699  { 8160 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9700  { 8160 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9701  { 8160 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9702  { 8160 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9703  { 8160 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9704  { 8160 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9705  { 8160 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9706  { 8160 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9707  { 8160 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9708  { 8160 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9709  { 8167 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9710  { 8167 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9711  { 8167 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9712  { 8167 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9713  { 8167 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9714  { 8167 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9715  { 8167 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9716  { 8167 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9717  { 8167 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9718  { 8167 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9719  { 8167 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9720  { 8167 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9721  { 8167 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9722  { 8167 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9723  { 8167 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9724  { 8167 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9725  { 8167 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9726  { 8167 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9727  { 8167 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9728  { 8167 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9729  { 8167 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9730  { 8167 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9731  { 8167 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9732  { 8167 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9733  { 8167 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9734  { 8167 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9735  { 8167 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9736  { 8167 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9737  { 8167 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9738  { 8167 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9739  { 8167 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9740  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9741  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9742  { 8174 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9743  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9744  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9745  { 8174 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9746  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9747  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9748  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9749  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9750  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9751  { 8174 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9752  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9753  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9754  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9755  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9756  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9757  { 8174 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9758  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9759  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9760  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9761  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9762  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9763  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9764  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9765  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9766  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9767  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9768  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9769  { 8184 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9770  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9771  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9772  { 8184 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9773  { 8184 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9774  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9775  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9776  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9777  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9778  { 8184 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9779  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9780  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9781  { 8184 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9782  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9783  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9784  { 8184 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9785  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9786  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9787  { 8184 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9788  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9789  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9790  { 8184 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9791  { 8184 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9792  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9793  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9794  { 8194 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9795  { 8194 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9796  { 8194 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9797  { 8194 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9798  { 8203 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9799  { 8203 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9800  { 8203 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9801  { 8203 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9802  { 8212 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9803  { 8212 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9804  { 8212 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9805  { 8212 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9806  { 8222 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9807  { 8222 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9808  { 8222 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9809  { 8222 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9810  { 8232 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
9811  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
9812  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
9813  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
9814  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
9815  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9816  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9817  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9818  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9819  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9820  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9821  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9822  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9823  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
9824  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
9825  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9826  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9827  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9828  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9829  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
9830  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9831  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9832  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
9833  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
9834  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9835  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9836  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9837  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9838  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
9839  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9840  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9841  { 8327 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
9842  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
9843  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
9844  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
9845  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
9846  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
9847  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
9848  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9849  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9850  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9851  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9852  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9853  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9854  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9855  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9856  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9857  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9858  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9859  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9860  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
9861  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
9862  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9863  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9864  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9865  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9866  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
9867  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9868  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9869  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
9870  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
9871  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9872  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9873  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9874  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9875  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
9876  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9877  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9878  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
9879  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
9880  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
9881  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
9882  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
9883  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
9884  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9885  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9886  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9887  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9888  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9889  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9890  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9891  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9892  { 8435 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9893  { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
9894  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
9895  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
9896  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
9897  { 8435 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9898  { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
9899  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
9900  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
9901  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR512 }, },
9902  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9903  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9904  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9905  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9906  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9907  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9908  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9909  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9910  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9911  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9912  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9913  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9914  { 8448 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9915  { 8448 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9916  { 8448 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9917  { 8448 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
9918  { 8448 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9919  { 8448 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9920  { 8448 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
9921  { 8448 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9922  { 8448 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
9923  { 8448 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
9924  { 8448 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9925  { 8448 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9926  { 8448 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9927  { 8448 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
9928  { 8448 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9929  { 8448 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9930  { 8448 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
9931  { 8448 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9932  { 8448 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
9933  { 8448 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
9934  { 8448 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9935  { 8448 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9936  { 8448 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
9937  { 8448 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
9938  { 8448 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9939  { 8448 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9940  { 8448 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
9941  { 8448 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
9942  { 8448 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9943  { 8448 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
9944  { 8448 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
9945  { 8448 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
9946  { 8448 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9947  { 8448 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
9948  { 8448 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
9949  { 8448 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
9950  { 8448 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9951  { 8448 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9952  { 8448 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9953  { 8448 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9954  { 8448 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9955  { 8448 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9956  { 8448 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9957  { 8448 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9958  { 8448 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9959  { 8448 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9960  { 8448 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9961  { 8448 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9962  { 8448 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9963  { 8448 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9964  { 8448 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9965  { 8448 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9966  { 8448 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9967  { 8448 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9968  { 8448 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9969  { 8448 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9970  { 8448 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9971  { 8448 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9972  { 8448 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9973  { 8448 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9974  { 8448 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9975  { 8448 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9976  { 8448 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9977  { 8448 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9978  { 8453 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9979  { 8453 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9980  { 8453 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9981  { 8453 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
9982  { 8453 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9983  { 8453 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9984  { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
9985  { 8453 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9986  { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
9987  { 8453 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
9988  { 8453 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9989  { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
9990  { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
9991  { 8453 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
9992  { 8453 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9993  { 8453 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9994  { 8453 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9995  { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9996  { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9997  { 8453 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9998  { 8453 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9999  { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10000  { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10001  { 8453 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10002  { 8460 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10003  { 8460 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10004  { 8460 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10005  { 8460 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10006  { 8460 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10007  { 8460 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10008  { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10009  { 8460 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10010  { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10011  { 8460 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10012  { 8460 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10013  { 8460 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
10014  { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
10015  { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
10016  { 8460 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10017  { 8460 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10018  { 8460 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10019  { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10020  { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10021  { 8460 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10022  { 8460 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10023  { 8460 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10024  { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10025  { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10026  { 8467 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10027  { 8467 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10028  { 8467 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10029  { 8467 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
10030  { 8467 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10031  { 8467 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10032  { 8467 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10033  { 8467 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10034  { 8474 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10035  { 8474 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10036  { 8474 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10037  { 8474 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
10038  { 8474 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10039  { 8474 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10040  { 8474 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10041  { 8474 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10042  { 8481 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10043  { 8481 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10044  { 8481 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10045  { 8481 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10046  { 8481 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10047  { 8489 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10048  { 8489 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10049  { 8489 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
10050  { 8489 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
10051  { 8489 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10052  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10053  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
10054  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10055  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
10056  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10057  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
10058  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10059  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10060  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10061  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10062  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10063  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10064  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10065  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10066  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10067  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10068  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
10069  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10070  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
10071  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10072  { 8509 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
10073  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10074  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10075  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10076  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10077  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10078  { 8509 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10079  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10080  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10081  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10082  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10083  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10084  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10085  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10086  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10087  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10088  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10089  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10090  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10091  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10092  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10093  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10094  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10095  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10096  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10097  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10098  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10099  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10100  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10101  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10102  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10103  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10104  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10105  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10106  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10107  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10108  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10109  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10110  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10111  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10112  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10113  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10114  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10115  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10116  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10117  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10118  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10119  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10120  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10121  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10122  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10123  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10124  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10125  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10126  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10127  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10128  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10129  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10130  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10131  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10132  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10133  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10134  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10135  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10136  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10137  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10138  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10139  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10140  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10141  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10142  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10143  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10144  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10145  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10146  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10147  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10148  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10149  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10150  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10151  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10152  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10153  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10154  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10155  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10156  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10157  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10158  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10159  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10160  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10161  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10162  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10163  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10164  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10165  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10166  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10167  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10168  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10169  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10170  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10171  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10172  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10173  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10174  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10175  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10176  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10177  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10178  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10179  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10180  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10181  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10182  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10183  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10184  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10185  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10186  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10187  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10188  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10189  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10190  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10191  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10192  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10193  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10194  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10195  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10196  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10197  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10198  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10199  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10200  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10201  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10202  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10203  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10204  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10205  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10206  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10207  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10208  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10209  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10210  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10211  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10212  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10213  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10214  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10215  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10216  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10217  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10218  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10219  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10220  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10221  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10222  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10223  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10224  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10225  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10226  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10227  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10228  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10229  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10230  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10231  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10232  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10233  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10234  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10235  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10236  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10237  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10238  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10239  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10240  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10241  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10242  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10243  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10244  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10245  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10246  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10247  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10248  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10249  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10250  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10251  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10252  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10253  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10254  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10255  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10256  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10257  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10258  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10259  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10260  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10261  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10262  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10263  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10264  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10265  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10266  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10267  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10268  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10269  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10270  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10271  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10272  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10273  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10274  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10275  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10276  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10277  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10278  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10279  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10280  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10281  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10282  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10283  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10284  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10285  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10286  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10287  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10288  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10289  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10290  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10291  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10292  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10293  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10294  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10295  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10296  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10297  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10298  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10299  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10300  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10301  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10302  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10303  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10304  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10305  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10306  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10307  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10308  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10309  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10310  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10311  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10312  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10313  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10314  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10315  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10316  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10317  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10318  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10319  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10320  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10321  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10322  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10323  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10324  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10325  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10326  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10327  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10328  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10329  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10330  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10331  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10332  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10333  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10334  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10335  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10336  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10337  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10338  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10339  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10340  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10341  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10342  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10343  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10344  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10345  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10346  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10347  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10348  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10349  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10350  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10351  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10352  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10353  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10354  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10355  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10356  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10357  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10358  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10359  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10360  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10361  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10362  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10363  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10364  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10365  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10366  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10367  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10368  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10369  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10370  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10371  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10372  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10373  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10374  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10375  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10376  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10377  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10378  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10379  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10380  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10381  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10382  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10383  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10384  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10385  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10386  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10387  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10388  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10389  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10390  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10391  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10392  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10393  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10394  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10395  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10396  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10397  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10398  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10399  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10400  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10401  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10402  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10403  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10404  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10405  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10406  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10407  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10408  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10409  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
10410  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
10411  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
10412  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
10413  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
10414  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
10415  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
10416  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
10417  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
10418  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10419  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10420  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10421  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10422  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10423  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10424  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10425  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10426  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10427  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10428  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10429  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10430  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10431  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10432  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10433  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10434  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10435  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10436  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10437  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10438  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10439  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10440  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10441  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10442  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10443  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10444  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10445  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10446  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10447  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10448  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10449  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10450  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10451  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10452  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10453  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10454  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10455  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10456  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10457  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10458  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10459  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10460  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10461  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10462  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10463  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10464  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10465  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10466  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10467  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10468  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10469  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10470  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10471  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10472  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10473  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10474  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10475  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10476  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10477  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10478  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10479  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10480  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10481  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10482  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10483  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10484  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10485  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10486  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10487  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10488  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10489  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10490  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10491  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10492  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10493  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10494  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10495  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10496  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10497  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10498  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10499  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10500  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10501  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10502  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10503  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10504  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10505  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10506  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10507  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10508  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10509  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10510  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10511  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10512  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10513  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10514  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10515  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10516  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10517  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10518  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10519  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10520  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10521  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10522  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10523  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10524  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10525  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10526  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10527  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10528  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10529  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10530  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10531  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10532  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10533  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10534  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10535  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10536  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10537  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10538  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10539  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10540  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10541  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10542  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10543  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10544  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10545  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10546  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10547  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10548  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10549  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10550  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10551  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10552  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10553  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10554  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10555  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10556  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10557  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10558  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10559  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10560  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10561  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10562  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10563  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10564  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10565  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10566  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10567  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10568  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10569  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10570  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10571  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10572  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10573  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10574  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10575  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10576  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10577  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10578  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10579  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10580  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10581  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10582  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10583  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10584  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10585  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10586  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10587  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10588  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10589  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10590  { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10591  { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10592  { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10593  { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10594  { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10595  { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10596  { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10597  { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10598  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10599  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10600  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10601  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10602  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10603  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10604  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10605  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10606  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10607  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10608  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10609  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10610  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10611  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10612  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10613  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10614  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10615  { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10616  { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10617  { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10618  { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10619  { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10620  { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10621  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10622  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10623  { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10624  { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10625  { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10626  { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10627  { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10628  { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10629  { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10630  { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10631  { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10632  { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10633  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10634  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10635  { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10636  { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10637  { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10638  { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10639  { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10640  { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10641  { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10642  { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10643  { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10644  { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10645  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10646  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10647  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10648  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10649  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10650  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10651  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10652  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10653  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10654  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10655  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10656  { 8926 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10657  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10658  { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10659  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10660  { 8926 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10661  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10662  { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10663  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10664  { 8936 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10665  { 8936 /* vcvtss2sil */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10666  { 8936 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10667  { 8936 /* vcvtss2sil */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10668  { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10669  { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10670  { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10671  { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10672  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10673  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10674  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10675  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10676  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10677  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10678  { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10679  { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10680  { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10681  { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10682  { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10683  { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10684  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10685  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10686  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10687  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10688  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10689  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10690  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10691  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10692  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10693  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10694  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10695  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10696  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10697  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10698  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10699  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10700  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10701  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10702  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10703  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10704  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10705  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10706  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10707  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10708  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10709  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10710  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10711  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10712  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10713  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10714  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10715  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10716  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10717  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10718  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10719  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10720  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10721  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10722  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10723  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10724  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10725  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10726  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10727  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10728  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10729  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10730  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10731  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10732  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10733  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10734  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10735  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10736  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10737  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10738  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10739  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10740  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10741  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10742  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10743  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10744  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10745  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10746  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10747  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10748  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10749  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10750  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10751  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10752  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10753  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10754  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10755  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10756  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10757  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10758  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10759  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10760  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10761  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10762  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10763  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10764  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10765  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10766  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10767  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10768  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10769  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10770  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10771  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10772  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10773  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10774  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10775  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10776  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10777  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10778  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10779  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10780  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10781  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10782  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10783  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10784  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10785  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10786  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10787  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10788  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10789  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10790  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10791  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10792  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10793  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10794  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10795  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10796  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10797  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10798  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10799  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10800  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10801  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10802  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10803  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10804  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10805  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10806  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10807  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10808  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10809  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10810  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10811  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10812  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10813  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10814  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10815  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10816  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10817  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10818  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10819  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10820  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10821  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10822  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10823  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10824  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10825  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10826  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10827  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10828  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10829  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10830  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10831  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10832  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10833  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10834  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10835  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10836  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10837  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10838  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10839  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10840  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10841  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10842  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10843  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10844  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10845  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10846  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10847  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10848  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10849  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10850  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10851  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10852  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10853  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10854  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10855  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10856  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10857  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10858  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10859  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10860  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10861  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10862  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10863  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10864  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10865  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10866  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10867  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10868  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10869  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10870  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10871  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10872  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10873  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10874  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10875  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10876  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10877  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10878  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10879  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10880  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10881  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10882  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10883  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10884  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10885  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10886  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10887  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10888  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10889  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10890  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10891  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10892  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10893  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10894  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10895  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10896  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10897  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10898  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10899  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10900  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10901  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10902  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10903  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10904  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10905  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10906  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10907  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10908  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10909  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10910  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10911  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10912  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10913  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10914  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10915  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10916  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10917  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10918  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10919  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10920  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10921  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10922  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10923  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10924  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10925  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10926  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10927  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10928  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10929  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10930  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10931  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10932  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10933  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10934  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10935  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10936  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10937  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10938  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10939  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10940  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10941  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10942  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10943  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10944  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10945  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10946  { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10947  { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10948  { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10949  { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10950  { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10951  { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10952  { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10953  { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10954  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10955  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10956  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10957  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10958  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10959  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10960  { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10961  { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10962  { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10963  { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10964  { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10965  { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10966  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10967  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10968  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10969  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10970  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10971  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10972  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10973  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10974  { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10975  { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10976  { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10977  { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10978  { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10979  { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10980  { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10981  { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10982  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10983  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10984  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10985  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10986  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10987  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10988  { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10989  { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10990  { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
10991  { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10992  { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10993  { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
10994  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10995  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10996  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10997  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10998  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10999  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
11000  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11001  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11002  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11003  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11004  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11005  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11006  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11007  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11008  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11009  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11010  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11011  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11012  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11013  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11014  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11015  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11016  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11017  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11018  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11019  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11020  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11021  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11022  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11023  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11024  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11025  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11026  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11027  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11028  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11029  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11030  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11031  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11032  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11033  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11034  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11035  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11036  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11037  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11038  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11039  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11040  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11041  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11042  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11043  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11044  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11045  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11046  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11047  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11048  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11049  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11050  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11051  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11052  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11053  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11054  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11055  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11056  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11057  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11058  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11059  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11060  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11061  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11062  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11063  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11064  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11065  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11066  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11067  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11068  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11069  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11070  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11071  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11072  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11073  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11074  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11075  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11076  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11077  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11078  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11079  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11080  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11081  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11082  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11083  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
11084  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
11085  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11086  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11087  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11088  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11089  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11090  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11091  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11092  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11093  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11094  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11095  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11096  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11097  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11098  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11099  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11100  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11101  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11102  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11103  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11104  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11105  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11106  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11107  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11108  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11109  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11110  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
11111  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11112  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11113  { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11114  { 9360 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11115  { 9360 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11116  { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11117  { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11118  { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11119  { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11120  { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11121  { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11122  { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11123  { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11124  { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11125  { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11126  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11127  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11128  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11129  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11130  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11131  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11132  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11133  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11134  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11135  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11136  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11137  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11138  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11139  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11140  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11141  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11142  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11143  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11144  { 9429 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11145  { 9429 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11146  { 9429 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11147  { 9429 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11148  { 9429 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11149  { 9429 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11150  { 9429 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11151  { 9429 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11152  { 9429 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11153  { 9429 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11154  { 9429 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11155  { 9429 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11156  { 9429 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11157  { 9429 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11158  { 9429 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11159  { 9429 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11160  { 9429 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11161  { 9429 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11162  { 9429 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11163  { 9429 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11164  { 9429 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11165  { 9429 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11166  { 9429 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11167  { 9429 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11168  { 9429 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11169  { 9429 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11170  { 9429 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11171  { 9429 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11172  { 9429 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11173  { 9429 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11174  { 9429 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11175  { 9429 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11176  { 9429 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11177  { 9429 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11178  { 9436 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11179  { 9436 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11180  { 9436 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11181  { 9436 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11182  { 9436 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11183  { 9436 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11184  { 9436 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11185  { 9436 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11186  { 9436 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11187  { 9436 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11188  { 9436 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11189  { 9436 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11190  { 9436 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11191  { 9436 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11192  { 9436 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11193  { 9436 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11194  { 9436 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11195  { 9436 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11196  { 9436 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11197  { 9436 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11198  { 9436 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11199  { 9436 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11200  { 9436 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11201  { 9436 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11202  { 9436 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11203  { 9436 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11204  { 9436 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11205  { 9436 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11206  { 9436 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11207  { 9436 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11208  { 9436 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11209  { 9436 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11210  { 9436 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11211  { 9436 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11212  { 9443 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11213  { 9443 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11214  { 9443 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11215  { 9443 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11216  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11217  { 9443 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11218  { 9443 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11219  { 9443 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11220  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11221  { 9443 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11222  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11223  { 9450 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11224  { 9450 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11225  { 9450 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11226  { 9450 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11227  { 9450 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11228  { 9450 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11229  { 9450 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11230  { 9450 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11231  { 9450 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11232  { 9450 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11233  { 9450 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11234  { 9457 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11235  { 9457 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11236  { 9463 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11237  { 9463 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11238  { 9463 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11239  { 9463 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11240  { 9469 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11241  { 9469 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11242  { 9474 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11243  { 9474 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11244  { 9479 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11245  { 9479 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11246  { 9479 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11247  { 9479 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11248  { 9479 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11249  { 9479 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11250  { 9479 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11251  { 9479 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11252  { 9479 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11253  { 9479 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11254  { 9479 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11255  { 9479 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11256  { 9487 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11257  { 9487 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11258  { 9487 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11259  { 9487 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11260  { 9487 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11261  { 9487 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11262  { 9487 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11263  { 9487 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11264  { 9487 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11265  { 9487 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11266  { 9487 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11267  { 9487 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11268  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11269  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11270  { 9495 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11271  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11272  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11273  { 9495 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11274  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11275  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11276  { 9495 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11277  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11278  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11279  { 9495 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11280  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11281  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11282  { 9495 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11283  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11284  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11285  { 9495 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11286  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11287  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11288  { 9505 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11289  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11290  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11291  { 9505 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11292  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11293  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11294  { 9505 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11295  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11296  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11297  { 9505 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11298  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11299  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11300  { 9505 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11301  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11302  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11303  { 9505 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11304  { 9515 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11305  { 9515 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11306  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11307  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11308  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11309  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11310  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11311  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11312  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11313  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11314  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11315  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11316  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11317  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11318  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11319  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11320  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11321  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11322  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11323  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11324  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11325  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11326  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11327  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11328  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11329  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11330  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11331  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11332  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11333  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11334  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11335  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11336  { 9584 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11337  { 9584 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11338  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11339  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11340  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11341  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11342  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11343  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11344  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11345  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11346  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11347  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11348  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11349  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11350  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11351  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11352  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11353  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11354  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11355  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11356  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11357  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11358  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11359  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11360  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11362  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11363  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11364  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11365  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11366  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11367  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11368  { 9653 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
11369  { 9653 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
11370  { 9653 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
11371  { 9653 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
11372  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11373  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11374  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11375  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11376  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11377  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11378  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11379  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11380  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11381  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11382  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11383  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11384  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11385  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11386  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11387  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11388  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11389  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11390  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11391  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11392  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11393  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11394  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11395  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11396  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11397  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11398  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11399  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11400  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11401  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11402  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11403  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11404  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11405  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11406  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11407  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11408  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11409  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11410  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11411  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11412  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11413  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11414  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11415  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11416  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11417  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11418  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11419  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11420  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11421  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11422  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11423  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11424  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11425  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11426  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11427  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11428  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11429  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11430  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11431  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11432  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11433  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11434  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11435  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11436  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11437  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11438  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11439  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11440  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11441  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11442  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11443  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11444  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11445  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11446  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11447  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11448  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11449  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11450  { 9712 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11451  { 9712 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11452  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11453  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11454  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11455  { 9712 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11456  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11457  { 9712 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11458  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11459  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11460  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11461  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11462  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11463  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11464  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11465  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11466  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11467  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11468  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11469  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11470  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11471  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11472  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11473  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11474  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11475  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11476  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11477  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11478  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11479  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11480  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11481  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11482  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11483  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11484  { 9724 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11485  { 9724 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11486  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11487  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11488  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11489  { 9724 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11490  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11491  { 9724 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11492  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11493  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11494  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11495  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11496  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11497  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11498  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11499  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11500  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11501  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11502  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11503  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11504  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11505  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11507  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11508  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11509  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11510  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11511  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11512  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11513  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11514  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11515  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11516  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11517  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11518  { 9736 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11519  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11520  { 9736 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11521  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11522  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11523  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11524  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11525  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11526  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11527  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11528  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11529  { 9748 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11530  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11531  { 9748 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11532  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11533  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11534  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11535  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11536  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11537  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11538  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11539  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11540  { 9760 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11541  { 9760 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11542  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11543  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11544  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11545  { 9760 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11546  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11547  { 9760 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11548  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11549  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11550  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11551  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11552  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11553  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11554  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11555  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11556  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11557  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11558  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11559  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11560  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11561  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11562  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11563  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11564  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11565  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11566  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11567  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11568  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11569  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11570  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11571  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11572  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11573  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11574  { 9772 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11575  { 9772 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11576  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11577  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11578  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11579  { 9772 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11580  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11581  { 9772 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11582  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11583  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11584  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11585  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11586  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11587  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11588  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11589  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11590  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11591  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11592  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11593  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11594  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11595  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11596  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11597  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11598  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11599  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11600  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11601  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11602  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11603  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11604  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11605  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11606  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11607  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11608  { 9784 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11609  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11610  { 9784 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11611  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11612  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11613  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11614  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11615  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11616  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11617  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11618  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11619  { 9796 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11620  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11621  { 9796 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11622  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11623  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11624  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11625  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11626  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11627  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11628  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11629  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11630  { 9808 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11631  { 9808 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11632  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11633  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11634  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11635  { 9808 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11636  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11637  { 9808 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11638  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11639  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11640  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11641  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11642  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11643  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11644  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11645  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11646  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11647  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11648  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11649  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11650  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11651  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11652  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11653  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11654  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11655  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11656  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11657  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11658  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11659  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11660  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11661  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11662  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11663  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11664  { 9820 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11665  { 9820 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11666  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11667  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11668  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11669  { 9820 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11670  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11671  { 9820 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11672  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11673  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11674  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11675  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11676  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11677  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11678  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11679  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11680  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11681  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11682  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11683  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11684  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11685  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11686  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11687  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11688  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11689  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11690  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11691  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11692  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11693  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11694  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11695  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11696  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11697  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11698  { 9832 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11699  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11700  { 9832 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11701  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11702  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11703  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11704  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11705  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11706  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11707  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11708  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11709  { 9844 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11710  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11711  { 9844 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11712  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11713  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11714  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11715  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11716  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11717  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11718  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11719  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11720  { 9856 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11721  { 9856 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11722  { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11723  { 9856 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11724  { 9856 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11725  { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11726  { 9865 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11727  { 9865 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11728  { 9865 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11729  { 9865 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11730  { 9865 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11731  { 9865 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11732  { 9874 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11733  { 9874 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11734  { 9874 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11735  { 9883 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11736  { 9883 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11737  { 9883 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11738  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11739  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11740  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11741  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11742  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11743  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11744  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11745  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11746  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11747  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11748  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11749  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11750  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11751  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11752  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11753  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11754  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11755  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11756  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11757  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11758  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11759  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11760  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11761  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11762  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11763  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11764  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11765  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11766  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11767  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11768  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11769  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11770  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11771  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11772  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11773  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11774  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11775  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11776  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11777  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11778  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11779  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11780  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11781  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11782  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11783  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11784  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11785  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11786  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11787  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11788  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11789  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11790  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11791  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11792  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11793  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11794  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11795  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11796  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11797  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11798  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11799  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11800  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11801  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11802  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11803  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11804  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11805  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11806  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11807  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11808  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11809  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11810  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11811  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11812  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11813  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11814  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11815  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11816  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11817  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11818  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11819  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11820  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11821  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11822  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11823  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11824  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11825  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11826  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11827  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11828  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11829  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11830  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11831  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11832  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11833  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11834  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11835  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11836  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11837  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11838  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11839  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11840  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11841  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11842  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11843  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11844  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11845  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11846  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11847  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11848  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11849  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11850  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11851  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11852  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11853  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11854  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11855  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11856  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11857  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11858  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11859  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11860  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11861  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11862  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11863  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11864  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11865  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11866  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11867  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11868  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11869  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11870  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11871  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11872  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11873  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11874  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11875  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11876  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11877  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11878  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11879  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11880  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11881  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11882  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11883  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11884  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11885  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11886  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11887  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11888  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11889  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11890  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11891  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11892  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11893  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11894  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11895  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11896  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11897  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11898  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11899  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11900  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11901  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11902  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11903  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11904  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11905  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11906  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11907  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11908  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11909  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11910  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11911  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11912  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11913  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11914  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11915  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11916  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11917  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11918  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11919  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11920  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11921  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11922  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11923  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11924  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11925  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11926  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11927  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11928  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11929  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11930  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11931  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11932  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11933  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11934  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11935  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11936  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11937  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11938  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11939  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11940  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11941  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11942  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11943  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11944  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11945  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11946  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11947  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11948  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11949  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11950  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11951  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11952  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11953  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11954  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11955  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11956  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11957  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11958  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11959  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11960  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11961  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11962  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11963  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11964  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11965  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11966  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11967  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11968  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11969  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11970  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11971  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11972  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11973  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11974  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11975  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11976  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11977  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11978  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11979  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11980  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11981  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11982  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11983  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11984  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11985  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11986  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11987  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11988  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11989  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11990  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11991  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11992  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11993  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11994  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11995  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11996  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11997  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11998  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11999  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12000  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12001  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12002  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12003  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12004  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12005  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12006  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12007  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12008  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12009  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12010  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12011  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12012  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12013  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12014  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12015  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12016  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12017  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12018  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12019  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12020  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12021  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12022  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12023  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12024  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12025  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12026  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12027  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12028  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12029  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12030  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12031  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12032  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12033  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12034  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12035  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12036  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12037  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12038  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12039  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12040  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12041  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12042  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12043  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12044  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12045  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12046  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12047  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12048  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12049  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12050  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12051  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12052  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12053  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12054  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12055  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12056  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12057  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12058  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12059  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12060  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12061  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12062  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12063  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12064  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12065  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12066  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12067  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12068  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12069  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12070  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12071  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12072  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12073  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12074  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12075  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12076  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12077  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12078  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12079  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12080  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12081  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12082  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12083  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12084  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12085  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12086  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12087  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12088  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12089  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12090  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12091  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12092  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12093  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12094  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12095  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12096  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12097  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12098  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12099  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12100  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12101  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12102  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12103  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12104  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12105  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12106  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12107  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12108  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12109  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12110  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12111  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12112  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12113  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12114  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12115  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12116  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12117  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12118  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12119  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12120  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12121  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12122  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12123  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12124  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12125  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12126  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12127  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12128  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12129  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12130  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12131  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12132  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12133  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12134  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12135  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12136  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12137  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12138  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12139  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12140  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12141  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12142  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12143  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12144  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12145  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12146  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12147  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12148  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12149  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12150  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12151  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12152  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12153  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12154  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12155  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12156  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12157  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12158  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12159  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12160  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12161  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12162  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12163  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12164  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12165  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12166  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12167  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12168  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12169  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12170  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12171  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12172  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12173  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12174  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12175  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12176  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12177  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12178  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12179  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12180  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12181  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12182  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12183  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12184  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12185  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12186  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12187  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12188  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12189  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12190  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12191  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12192  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12193  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12194  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12195  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12196  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12197  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12198  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12199  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12200  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12201  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12202  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12203  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12204  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12205  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12206  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12207  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12208  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12209  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12210  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12211  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12212  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12213  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12214  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12215  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12216  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12217  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12218  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12219  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12220  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12221  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12222  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12223  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12224  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12225  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12226  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12227  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12228  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12229  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12230  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12231  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12232  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12233  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12234  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12235  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12236  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12237  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12238  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12239  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12240  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12241  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12242  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12243  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12244  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12245  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12246  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12247  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12248  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12249  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12250  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12251  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12252  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12253  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12254  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12255  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12256  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12257  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12258  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12259  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12260  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12261  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12262  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12263  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12264  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12265  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12266  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12267  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12268  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12269  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12270  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12271  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12272  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12273  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12274  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12275  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12276  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12277  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12278  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12279  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12280  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12281  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12282  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12283  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12284  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12285  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12286  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12287  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12288  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12289  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12290  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12291  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12292  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12293  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12294  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12295  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12296  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12297  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12298  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12299  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12300  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12301  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12302  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12303  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12304  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12305  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12306  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12307  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12308  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12309  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12310  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12311  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12312  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12313  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12314  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12315  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12316  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12317  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12318  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12319  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12320  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12321  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12322  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12323  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12324  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12325  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12326  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12327  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12328  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12329  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12330  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12331  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12332  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12333  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12334  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12335  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12336  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12337  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12338  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12339  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12340  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12341  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12342  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12343  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12344  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12345  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12346  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12347  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12348  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12349  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12350  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12351  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12352  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12353  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12354  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12355  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12356  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12357  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12358  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12359  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12360  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12361  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12362  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12363  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12364  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12365  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12366  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12367  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12368  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12369  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12370  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12371  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12372  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12373  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12374  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12375  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12376  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12377  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12378  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12379  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12380  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12381  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12382  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12383  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12384  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12385  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12386  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12387  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12388  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12389  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12390  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12391  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12392  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12393  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12394  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12395  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12396  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12397  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12398  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12399  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12400  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12401  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12402  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12403  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12404  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12405  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12406  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12407  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12408  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12409  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12410  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12411  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12412  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12413  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12414  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12415  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12416  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12417  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12418  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12419  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12420  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12421  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12422  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12423  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12424  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12425  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12426  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12427  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12428  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12429  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12430  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12431  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12432  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12433  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12434  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12435  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12436  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12437  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12438  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12439  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12440  { 10264 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12441  { 10264 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12442  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12443  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12444  { 10264 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12445  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12446  { 10273 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12447  { 10273 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12448  { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12449  { 10273 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12450  { 10273 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12451  { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12452  { 10282 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12453  { 10282 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12454  { 10282 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12455  { 10291 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12456  { 10291 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12457  { 10291 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12458  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12459  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12460  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12461  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12462  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12463  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12464  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12465  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12466  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12467  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12468  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12469  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12470  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12471  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12472  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12473  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12474  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12475  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12476  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12477  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12478  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12479  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12480  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12481  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12482  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12483  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12484  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12485  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12486  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12487  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12488  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12489  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12490  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12491  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12492  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12493  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12494  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12495  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12496  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12497  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12498  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12499  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12500  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12501  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12502  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12503  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12504  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12505  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12506  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12507  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12508  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12509  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12510  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12511  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12512  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12513  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12514  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12515  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12516  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12517  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12518  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12519  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12520  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12521  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12522  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12523  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12524  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12525  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12526  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12527  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12528  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12529  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12530  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12531  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12532  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12533  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12534  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12535  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12536  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12537  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12538  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12539  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12540  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12541  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12542  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12543  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12544  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12545  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12546  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12547  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12548  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12549  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12550  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12551  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12552  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12553  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12554  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12555  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12556  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12557  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12558  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12559  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12560  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12561  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12562  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12563  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12564  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12565  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12566  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12567  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12568  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12569  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12570  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12571  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12572  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12573  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12574  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12575  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12576  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12577  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12578  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12579  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12580  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12581  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12582  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12583  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12584  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12585  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12586  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12587  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12588  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12589  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12590  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12591  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12592  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12593  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12594  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12595  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12596  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12597  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12598  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12599  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12600  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12601  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12602  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12603  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12604  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12605  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12606  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12607  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12608  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12609  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12610  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12611  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12612  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12613  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12614  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12615  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12616  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12617  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12618  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12619  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12620  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12621  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12622  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12623  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12624  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12625  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12626  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12627  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12628  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12629  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12630  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12631  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12632  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12633  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12634  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12635  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12636  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12637  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12638  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12639  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12640  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12641  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12642  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12643  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12644  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12645  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12646  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12647  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12648  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12649  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12650  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12651  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12652  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12653  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12654  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12655  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12656  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12657  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12658  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12659  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12660  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12661  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12662  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12663  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12664  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12665  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12666  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12667  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12668  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12669  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12670  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12671  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12672  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12673  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12674  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12675  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12676  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12677  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12678  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12679  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12680  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12681  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12682  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12683  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12684  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12685  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12686  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12687  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12688  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12689  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12690  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12691  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12692  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12693  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12694  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12695  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12696  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12697  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12698  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12699  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12700  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12701  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12702  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12703  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12704  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12705  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12706  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12707  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12708  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12709  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12710  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12711  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12712  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12713  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12714  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12715  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12716  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12717  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12718  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12719  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12720  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12721  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12722  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12723  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12724  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12725  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12726  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12727  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12728  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12729  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12730  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12731  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12732  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12733  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12734  { 10466 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12735  { 10466 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12736  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12737  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12738  { 10466 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12739  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12740  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12741  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12742  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12743  { 10486 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12744  { 10486 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12745  { 10486 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12746  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12747  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12748  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12749  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12750  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12751  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12752  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12753  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12754  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12755  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12756  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12757  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12758  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12759  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12760  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12761  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12762  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12763  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12764  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12765  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12766  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12767  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12768  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12769  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12770  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12771  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12772  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12773  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12774  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12775  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12776  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12777  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12778  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12779  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12780  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12781  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12782  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12783  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12784  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12785  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12786  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12787  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12788  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12789  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12790  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12791  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12792  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12793  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12794  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12795  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12796  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12797  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12798  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12799  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12800  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12801  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12802  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12803  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12804  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12805  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12806  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12807  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12808  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12809  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12810  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12811  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12812  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12813  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12814  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12815  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12816  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12817  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12818  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12819  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12820  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12821  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12822  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12823  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12824  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12825  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12826  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12827  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12828  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12829  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12830  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12831  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12832  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12833  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12834  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12835  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12836  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12837  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12838  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12839  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12840  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12841  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12842  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12843  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12844  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12845  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12846  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12847  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12848  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12849  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12850  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12851  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12852  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12853  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12854  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12855  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12856  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12857  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12858  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12859  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12860  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12861  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12862  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12863  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12864  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12865  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12866  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12867  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12868  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12869  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12870  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12871  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12872  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12873  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12874  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12875  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12876  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12877  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12878  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12879  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12880  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12881  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12882  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12883  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12884  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12886  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12887  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12888  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12889  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12890  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12891  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12892  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12893  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12894  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12895  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12896  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12897  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12898  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12899  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12900  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12901  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12902  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12903  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12904  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12905  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12906  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12907  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12908  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12909  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12910  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12911  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12912  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12913  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12914  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12915  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12916  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12917  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12918  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12919  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12920  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12921  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12922  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12923  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12924  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12925  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12926  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12927  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12928  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12929  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12930  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12931  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12932  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12933  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12934  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12935  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12936  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12937  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12938  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12939  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12940  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12941  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12942  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12943  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12944  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12945  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12946  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12947  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12948  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12949  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12950  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12951  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12952  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12953  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12954  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12955  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12956  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12957  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12958  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12959  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12960  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12961  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12962  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12963  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12964  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12965  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12966  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12967  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12968  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12969  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12970  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12971  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12972  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12973  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12974  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12975  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12976  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12977  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12978  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12979  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12980  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12981  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12982  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12983  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12984  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12985  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12986  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12987  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12988  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12989  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12990  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12991  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12992  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12993  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12994  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12995  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12996  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12997  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12998  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12999  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13000  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13001  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13002  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13003  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13004  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13005  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13006  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13007  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13008  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13009  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13010  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13011  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13012  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13013  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13014  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13015  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13016  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13017  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13018  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13019  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13020  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13021  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13022  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13023  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13024  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13025  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13026  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13027  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13028  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13029  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13030  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13031  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13032  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13033  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13034  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13035  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13036  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13037  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13038  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13039  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13040  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
13041  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
13042  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
13043  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13044  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13045  { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13046  { 10715 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13047  { 10715 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13048  { 10727 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13049  { 10727 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13050  { 10739 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13051  { 10739 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13052  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13053  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13054  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13055  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13056  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13057  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13058  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
13059  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
13060  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
13061  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13062  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13063  { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13064  { 10774 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13065  { 10774 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13066  { 10786 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13067  { 10786 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13068  { 10798 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13069  { 10798 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13070  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13071  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1 }, },
13072  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13073  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13074  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13075  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1 }, },
13076  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13077  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13078  { 10832 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13079  { 10832 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13080  { 10832 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13081  { 10832 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13082  { 10840 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13083  { 10840 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13084  { 10840 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13085  { 10840 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13086  { 10848 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13087  { 10848 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
13088  { 10856 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13089  { 10856 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
13090  { 10864 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13091  { 10864 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
13092  { 10864 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13093  { 10864 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, 0, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13094  { 10864 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13095  { 10875 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13096  { 10875 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13097  { 10875 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13098  { 10875 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13099  { 10875 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13100  { 10886 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13101  { 10900 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13102  { 10914 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13103  { 10928 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13104  { 10942 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13105  { 10956 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13106  { 10970 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13107  { 10984 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13108  { 10998 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13109  { 10998 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13110  { 10998 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13111  { 10998 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13112  { 10998 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13113  { 11009 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
13114  { 11009 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
13115  { 11009 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, 0, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13116  { 11009 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13117  { 11009 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, 0, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13118  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13119  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13120  { 11020 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13121  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13122  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13123  { 11020 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13124  { 11020 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13125  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13126  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13127  { 11020 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13128  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13129  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13130  { 11020 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13131  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13132  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13133  { 11020 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13134  { 11020 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13135  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13136  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13137  { 11020 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13138  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13139  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13140  { 11020 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13141  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13142  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13143  { 11020 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13144  { 11020 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13145  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13146  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13147  { 11020 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13148  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13149  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13150  { 11030 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13151  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13152  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13153  { 11030 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13154  { 11030 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13155  { 11030 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13156  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13157  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13158  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13159  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13160  { 11030 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13161  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13162  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13163  { 11030 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13164  { 11030 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13165  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13166  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13167  { 11030 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13168  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13169  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13170  { 11030 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13171  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13172  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13173  { 11030 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13174  { 11030 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13175  { 11030 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13176  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13177  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13178  { 11040 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13179  { 11040 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13180  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13181  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13182  { 11040 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13183  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13184  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13185  { 11040 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13186  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13187  { 11050 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13188  { 11050 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13189  { 11050 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13190  { 11050 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13191  { 11050 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13192  { 11050 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13193  { 11050 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13194  { 11050 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13195  { 11050 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13196  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13197  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13198  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13199  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13200  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13201  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13202  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13203  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13204  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13205  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13206  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13207  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13208  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13209  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13210  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13211  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13212  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13213  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13214  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13215  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13216  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13217  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13218  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13219  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13220  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13221  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13222  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13223  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13224  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13225  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13226  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13227  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13228  { 11071 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13229  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13230  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13231  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13232  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13233  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13234  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13235  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13236  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13237  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13238  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13239  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13241  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13242  { 11071 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13243  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13244  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13245  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13246  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13247  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13248  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13249  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13250  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13251  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13252  { 11071 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13253  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13255  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13256  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13257  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13258  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13259  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13260  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13261  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13262  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13263  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13264  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13265  { 11093 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13266  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13267  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13268  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13269  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13270  { 11093 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13271  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13272  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13273  { 11093 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13274  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13275  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13276  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13277  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13278  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13279  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13280  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13281  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13282  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13283  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13284  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13285  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13286  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13287  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13288  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13289  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13290  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13291  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13292  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13293  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13294  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13295  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13296  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13297  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13298  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13299  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13300  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13301  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13302  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13303  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13304  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13305  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13306  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13307  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13308  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13309  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13310  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13311  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13312  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13313  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13314  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13315  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13316  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13317  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13318  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13319  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13320  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13321  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13322  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13323  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13324  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13325  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13326  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13327  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13328  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13329  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13330  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13331  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13332  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13333  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13334  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13335  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13336  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13337  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13338  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13339  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13340  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13341  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13342  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13343  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13344  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13345  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13346  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13347  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13348  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13349  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13350  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13351  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13352  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13353  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13354  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13355  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13356  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13357  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13358  { 11148 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13359  { 11148 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13360  { 11148 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13361  { 11148 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13362  { 11156 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13363  { 11156 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13364  { 11156 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13365  { 11156 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13366  { 11164 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13367  { 11164 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13368  { 11164 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13369  { 11164 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13370  { 11172 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13371  { 11172 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13372  { 11172 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13373  { 11172 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13374  { 11180 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13375  { 11180 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13376  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13377  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13378  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13379  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13380  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13381  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13382  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13383  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13384  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13385  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13386  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13387  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13388  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13389  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13390  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13391  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13392  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13393  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13394  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13395  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13396  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13397  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13398  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13399  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13400  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13401  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13402  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13403  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13404  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13405  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13406  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13407  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13408  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13409  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13410  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13411  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13412  { 11244 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13413  { 11244 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13414  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13415  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13416  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13417  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13418  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13419  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13420  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13421  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13422  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13423  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13424  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13425  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13426  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13427  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13428  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13429  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13430  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13431  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13432  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13433  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13434  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13435  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13436  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13437  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13438  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13439  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13440  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13441  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13442  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13443  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13444  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13445  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13446  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13447  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13448  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13449  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13450  { 11308 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13451  { 11308 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13452  { 11308 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13453  { 11308 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13454  { 11318 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13455  { 11318 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13456  { 11325 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
13457  { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
13458  { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
13459  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13460  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13461  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13462  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13463  { 11357 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13464  { 11357 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13465  { 11357 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13466  { 11357 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13467  { 11368 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13468  { 11368 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13469  { 11368 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13470  { 11368 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13471  { 11368 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13472  { 11368 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13473  { 11368 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13474  { 11368 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13475  { 11368 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13476  { 11368 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13477  { 11368 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13478  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13479  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13480  { 11368 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13481  { 11368 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13482  { 11368 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13483  { 11368 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13484  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13485  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13486  { 11368 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13487  { 11368 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13488  { 11368 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13489  { 11368 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13490  { 11368 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13491  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13492  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13493  { 11368 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13494  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13495  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13496  { 11368 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13497  { 11368 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13498  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13499  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13500  { 11368 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13501  { 11375 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13502  { 11375 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13503  { 11375 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13504  { 11375 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13505  { 11375 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13506  { 11375 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13507  { 11375 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13508  { 11375 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13509  { 11375 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13510  { 11375 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13511  { 11375 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13512  { 11375 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13513  { 11375 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13514  { 11375 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13515  { 11375 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13516  { 11375 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13517  { 11375 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13518  { 11375 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13519  { 11375 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13520  { 11375 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13521  { 11375 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13522  { 11375 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13523  { 11375 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13524  { 11375 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13525  { 11375 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13526  { 11375 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13527  { 11375 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13528  { 11375 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13529  { 11375 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13530  { 11375 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13531  { 11375 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13532  { 11375 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13533  { 11375 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13534  { 11375 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13535  { 11382 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13536  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13537  { 11382 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13538  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13539  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13540  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13541  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13542  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13543  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13544  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13545  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13546  { 11389 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13547  { 11389 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13548  { 11389 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13549  { 11389 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13550  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13551  { 11389 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13552  { 11389 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13553  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13554  { 11389 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13555  { 11389 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13556  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13557  { 11396 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, {  }, },
13558  { 11403 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
13559  { 11411 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, {  }, },
13560  { 11418 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13561  { 11418 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13562  { 11418 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13563  { 11418 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13564  { 11418 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13565  { 11418 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13566  { 11418 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13567  { 11418 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13568  { 11418 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13569  { 11418 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13570  { 11418 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13571  { 11418 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13572  { 11418 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13573  { 11418 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13574  { 11418 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13575  { 11418 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13576  { 11418 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13577  { 11418 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13578  { 11418 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13579  { 11418 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13580  { 11418 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13581  { 11418 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13582  { 11418 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13583  { 11418 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584  { 11418 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13585  { 11418 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13586  { 11418 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13587  { 11418 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13588  { 11418 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13589  { 11418 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13590  { 11418 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13591  { 11418 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13592  { 11418 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13593  { 11418 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13594  { 11425 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13595  { 11425 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13596  { 11425 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13597  { 11425 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13598  { 11425 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13599  { 11425 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13600  { 11425 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13601  { 11425 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13602  { 11425 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13603  { 11425 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13604  { 11425 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13605  { 11425 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13606  { 11425 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13607  { 11425 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13608  { 11425 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13609  { 11425 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13610  { 11425 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13611  { 11425 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13612  { 11425 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13613  { 11425 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13614  { 11425 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13615  { 11425 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13616  { 11425 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13617  { 11425 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618  { 11425 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13619  { 11425 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13620  { 11425 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13621  { 11425 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13622  { 11425 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13623  { 11425 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13624  { 11425 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13625  { 11425 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13626  { 11425 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13627  { 11425 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13628  { 11432 /* vminsd */, X86::VMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13629  { 11432 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13630  { 11432 /* vminsd */, X86::VMINSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13631  { 11432 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13632  { 11432 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13633  { 11432 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13634  { 11432 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13635  { 11432 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13636  { 11432 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13637  { 11432 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13638  { 11432 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13639  { 11439 /* vminss */, X86::VMINSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13640  { 11439 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13641  { 11439 /* vminss */, X86::VMINSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13642  { 11439 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13643  { 11439 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13644  { 11439 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13645  { 11439 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13646  { 11439 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13647  { 11439 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13648  { 11439 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13649  { 11439 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13650  { 11446 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, {  }, },
13651  { 11455 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
13652  { 11455 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
13653  { 11462 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, {  }, },
13654  { 11470 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13655  { 11470 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13656  { 11470 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13657  { 11470 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13658  { 11470 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13659  { 11470 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13660  { 11470 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13661  { 11470 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13662  { 11470 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13663  { 11470 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13664  { 11470 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13665  { 11470 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13666  { 11470 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13667  { 11470 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13668  { 11470 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13669  { 11470 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13670  { 11470 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13671  { 11470 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13672  { 11470 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13673  { 11470 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13674  { 11470 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13675  { 11470 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13676  { 11470 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13677  { 11470 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13678  { 11470 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13679  { 11470 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13680  { 11470 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13681  { 11470 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13682  { 11470 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13683  { 11470 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13684  { 11470 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13685  { 11470 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13686  { 11478 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13687  { 11478 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13688  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13689  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13690  { 11478 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13691  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13692  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13693  { 11478 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13694  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13695  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13696  { 11478 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13697  { 11488 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13698  { 11488 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13699  { 11488 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13700  { 11488 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13701  { 11488 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13702  { 11488 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13703  { 11488 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13704  { 11488 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13705  { 11488 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13706  { 11488 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13707  { 11488 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13708  { 11488 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13709  { 11488 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13710  { 11488 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13711  { 11488 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13712  { 11488 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13713  { 11488 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13714  { 11488 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13715  { 11488 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13716  { 11488 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13717  { 11488 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13718  { 11488 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13719  { 11488 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13720  { 11488 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13721  { 11488 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13722  { 11488 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13723  { 11488 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13724  { 11488 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13725  { 11488 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13726  { 11488 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13727  { 11488 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13728  { 11488 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13729  { 11496 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13730  { 11496 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13731  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13732  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13733  { 11496 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13734  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13735  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13736  { 11496 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13737  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13738  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13739  { 11496 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13740  { 11506 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
13741  { 11506 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
13742  { 11506 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
13743  { 11506 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
13744  { 11506 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
13745  { 11506 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
13746  { 11506 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
13747  { 11506 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
13748  { 11506 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
13749  { 11506 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
13750  { 11506 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
13751  { 11506 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
13752  { 11512 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13753  { 11512 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13754  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13755  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13756  { 11512 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13757  { 11512 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13758  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13759  { 11512 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13760  { 11512 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
13761  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
13762  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13763  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13764  { 11512 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13765  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13766  { 11512 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13767  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13768  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13769  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13770  { 11512 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13771  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13772  { 11512 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13773  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13774  { 11521 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13775  { 11521 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13776  { 11521 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13777  { 11521 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13778  { 11521 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13779  { 11521 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13780  { 11521 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13781  { 11521 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13782  { 11529 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13783  { 11529 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13784  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13785  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13786  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13787  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13788  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13789  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13790  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13791  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13792  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13793  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13794  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13795  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13796  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13797  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13798  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13799  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13801  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13802  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13803  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13804  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13805  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13806  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13807  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13808  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13809  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13810  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13811  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13812  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13813  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13814  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13815  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13816  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13817  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13818  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13819  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13820  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13821  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13822  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13823  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13824  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13825  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13826  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13827  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13828  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13829  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13830  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13831  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13832  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13833  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13834  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13835  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13836  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13837  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13838  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13839  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13840  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13841  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13842  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13843  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13844  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13845  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13846  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13847  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13848  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13849  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13850  { 11583 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13851  { 11583 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13852  { 11583 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13853  { 11583 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13854  { 11583 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13855  { 11583 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13856  { 11583 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13857  { 11583 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13858  { 11591 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13859  { 11591 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13860  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13861  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13862  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13863  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13864  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13865  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13866  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13867  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13868  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13869  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13870  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13871  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13872  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13873  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13874  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13875  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13876  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13877  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13878  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13879  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13880  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13881  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13882  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13883  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13884  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13885  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13886  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13887  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13888  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13889  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13891  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13892  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13893  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13894  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13895  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13896  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13897  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13898  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13899  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13900  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13901  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13902  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13903  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13904  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13905  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13906  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13907  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13908  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13909  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13910  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13911  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13912  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13913  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13914  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13915  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13916  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13917  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13918  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13919  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13920  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13921  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13922  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13923  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13924  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13925  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13926  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13927  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13928  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13929  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13930  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13931  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13932  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13933  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13934  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13935  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13936  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13937  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13938  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13939  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13940  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13941  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13942  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13943  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13944  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13945  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13946  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13947  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13948  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13949  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13950  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13951  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13952  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13953  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13954  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13955  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13956  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13957  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13958  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13959  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13960  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13961  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13962  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13963  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13964  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13965  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13966  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13967  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13968  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13969  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13970  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13971  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13972  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13973  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13974  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13975  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13976  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13977  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13978  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13979  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13980  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13981  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13982  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13983  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13984  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13985  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13986  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13987  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13988  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13989  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13990  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13991  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13992  { 11687 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13993  { 11687 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13994  { 11696 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
13995  { 11696 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
13996  { 11696 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13997  { 11696 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13998  { 11704 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
13999  { 11704 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14000  { 11704 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14001  { 11704 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14002  { 11712 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14003  { 11712 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14004  { 11721 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14005  { 11721 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14006  { 11721 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14007  { 11721 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14008  { 11729 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14009  { 11729 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14010  { 11729 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14011  { 11729 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14012  { 11737 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14013  { 11737 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14014  { 11747 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14015  { 11747 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14016  { 11757 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14017  { 11757 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14018  { 11757 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14019  { 11757 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14020  { 11757 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14021  { 11766 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14022  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14023  { 11766 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14024  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14025  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14026  { 11776 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14027  { 11776 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14028  { 11776 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14029  { 11776 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14030  { 11776 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14031  { 11785 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14032  { 11785 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14033  { 11785 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14034  { 11785 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14035  { 11785 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14036  { 11794 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14037  { 11794 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14038  { 11794 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
14039  { 11794 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14040  { 11794 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
14041  { 11794 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
14042  { 11794 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
14043  { 11794 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14044  { 11794 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14045  { 11794 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14046  { 11794 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
14047  { 11800 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14048  { 11800 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14049  { 11808 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14050  { 11808 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14051  { 11808 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14052  { 11808 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
14053  { 11808 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14054  { 11808 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14055  { 11808 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14056  { 11808 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14057  { 11808 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14058  { 11808 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14059  { 11808 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14060  { 11808 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14061  { 11815 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14062  { 11815 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14063  { 11815 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14064  { 11815 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14065  { 11824 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14066  { 11824 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14067  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14068  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14069  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14070  { 11824 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14071  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14072  { 11824 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14073  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14074  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14075  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14076  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14077  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14078  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14079  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14080  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14081  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14082  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14083  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14084  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14085  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14086  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14087  { 11834 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14088  { 11834 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14089  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14090  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14091  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14092  { 11834 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14093  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14094  { 11834 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14095  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14096  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14097  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14098  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14099  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14100  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14101  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14102  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14103  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14104  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14105  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14106  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14107  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14108  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14109  { 11844 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
14110  { 11844 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
14111  { 11844 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
14112  { 11844 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
14113  { 11844 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14114  { 11844 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14115  { 11844 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14116  { 11844 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14117  { 11844 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14118  { 11844 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14119  { 11844 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14120  { 11844 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14121  { 11851 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14122  { 11851 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14123  { 11851 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14124  { 11851 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14125  { 11860 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14126  { 11860 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14127  { 11860 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14128  { 11860 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14129  { 11860 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14130  { 11860 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14131  { 11860 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14132  { 11860 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14133  { 11860 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14134  { 11860 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14135  { 11860 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14136  { 11860 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14137  { 11860 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14138  { 11860 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14139  { 11860 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14140  { 11860 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14141  { 11860 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14142  { 11860 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14143  { 11860 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14144  { 11860 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14145  { 11860 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14146  { 11860 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14147  { 11860 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14148  { 11860 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14149  { 11860 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14150  { 11860 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14151  { 11860 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14152  { 11860 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14153  { 11860 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14154  { 11860 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14155  { 11860 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14156  { 11860 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14157  { 11868 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14158  { 11868 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14159  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14160  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14161  { 11868 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14162  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14163  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14164  { 11868 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14165  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14166  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14167  { 11868 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14168  { 11878 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14169  { 11878 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14170  { 11878 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14171  { 11878 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14172  { 11878 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14173  { 11878 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14174  { 11878 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14175  { 11878 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14176  { 11878 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14177  { 11878 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14178  { 11878 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14179  { 11878 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14180  { 11878 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14181  { 11878 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14182  { 11878 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14183  { 11878 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14184  { 11878 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14185  { 11878 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14186  { 11878 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14187  { 11878 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14188  { 11878 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14189  { 11878 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14190  { 11878 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14191  { 11878 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14192  { 11878 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14193  { 11878 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14194  { 11878 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14195  { 11878 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14196  { 11878 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14197  { 11878 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14198  { 11878 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14199  { 11878 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14200  { 11886 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14201  { 11886 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14202  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14203  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14204  { 11886 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14205  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14206  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14207  { 11886 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14208  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14209  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14210  { 11886 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14211  { 11896 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14212  { 11896 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14213  { 11896 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14214  { 11896 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14215  { 11905 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14216  { 11913 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14217  { 11928 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14218  { 11928 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
14219  { 11936 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14220  { 11936 /* vmreadq */, X86::VMREAD64mr, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
14221  { 11944 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, {  }, },
14222  { 11953 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14223  { 11953 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14224  { 11959 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14225  { 11959 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14226  { 11966 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14227  { 11966 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14228  { 11966 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14229  { 11966 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14230  { 11966 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14231  { 11966 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14232  { 11966 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14233  { 11966 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14234  { 11966 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14235  { 11966 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14236  { 11966 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14237  { 11966 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14238  { 11966 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14239  { 11966 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14240  { 11966 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14241  { 11966 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14242  { 11966 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14243  { 11966 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14244  { 11966 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14245  { 11966 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14246  { 11966 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14247  { 11966 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14248  { 11966 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14249  { 11966 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14250  { 11966 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14251  { 11966 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14252  { 11966 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14253  { 11966 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14254  { 11966 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14255  { 11966 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14256  { 11966 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14257  { 11966 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14258  { 11966 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14259  { 11966 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14260  { 11973 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14261  { 11973 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14262  { 11973 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14263  { 11973 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14264  { 11973 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14265  { 11973 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14266  { 11973 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14267  { 11973 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14268  { 11973 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14269  { 11973 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14270  { 11973 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14271  { 11973 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14272  { 11973 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14273  { 11973 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14274  { 11973 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14275  { 11973 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14276  { 11973 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14277  { 11973 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14278  { 11973 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14279  { 11973 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14280  { 11973 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14281  { 11973 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14282  { 11973 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14283  { 11973 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14284  { 11973 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14285  { 11973 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14286  { 11973 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14287  { 11973 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14288  { 11973 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14289  { 11973 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14290  { 11973 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14291  { 11973 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14292  { 11973 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14293  { 11973 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14294  { 11980 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14295  { 11980 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14296  { 11980 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14297  { 11980 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14298  { 11980 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14299  { 11980 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14300  { 11980 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14301  { 11980 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14302  { 11980 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14303  { 11980 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14304  { 11980 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14305  { 11987 /* vmulss */, X86::VMULSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14306  { 11987 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14307  { 11987 /* vmulss */, X86::VMULSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14308  { 11987 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14309  { 11987 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14310  { 11987 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14311  { 11987 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14312  { 11987 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14313  { 11987 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14314  { 11987 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14315  { 11987 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14316  { 12002 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14317  { 12002 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
14318  { 12011 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14319  { 12011 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
14320  { 12020 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, {  }, },
14321  { 12027 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14322  { 12033 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14323  { 12033 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14324  { 12033 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14325  { 12033 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14326  { 12033 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14327  { 12033 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14328  { 12033 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14329  { 12033 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14330  { 12033 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14331  { 12033 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14332  { 12033 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14333  { 12033 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14334  { 12033 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14335  { 12033 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14336  { 12033 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14337  { 12033 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14338  { 12033 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14339  { 12033 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14340  { 12033 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14341  { 12033 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14342  { 12033 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14343  { 12033 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14344  { 12033 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14345  { 12033 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14346  { 12033 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14347  { 12033 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14348  { 12033 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14349  { 12033 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14350  { 12033 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14351  { 12033 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14352  { 12033 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14353  { 12039 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14354  { 12039 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14355  { 12039 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14356  { 12039 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14357  { 12039 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14358  { 12039 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14359  { 12039 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14360  { 12039 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14361  { 12039 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14362  { 12039 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14363  { 12039 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14364  { 12039 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14365  { 12039 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14366  { 12039 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14367  { 12039 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14368  { 12039 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14369  { 12039 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14370  { 12039 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14371  { 12039 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14372  { 12039 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14373  { 12039 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14374  { 12039 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14375  { 12039 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14376  { 12039 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14377  { 12039 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14378  { 12039 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14379  { 12039 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14380  { 12039 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14381  { 12039 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14382  { 12039 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14383  { 12039 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14384  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14385  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14386  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14387  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14388  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14389  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14390  { 12066 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14391  { 12066 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14392  { 12066 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14393  { 12066 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14394  { 12066 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14395  { 12066 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14396  { 12066 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14397  { 12066 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14398  { 12066 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14399  { 12066 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14400  { 12066 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14401  { 12066 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14402  { 12066 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14403  { 12066 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14404  { 12066 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14405  { 12066 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14406  { 12066 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14407  { 12066 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14408  { 12066 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14409  { 12066 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14410  { 12066 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14411  { 12066 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14412  { 12073 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14413  { 12073 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14414  { 12073 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14415  { 12073 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14416  { 12073 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14417  { 12073 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14418  { 12073 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14419  { 12073 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14420  { 12073 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14421  { 12073 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14422  { 12073 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14423  { 12073 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
14424  { 12073 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
14425  { 12073 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14426  { 12073 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14427  { 12073 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14428  { 12073 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14429  { 12073 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14430  { 12073 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14431  { 12073 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14432  { 12073 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14433  { 12073 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14434  { 12073 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14435  { 12073 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14436  { 12073 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14437  { 12073 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14438  { 12073 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14439  { 12073 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14440  { 12073 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14441  { 12073 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14442  { 12073 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14443  { 12080 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14444  { 12080 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14445  { 12080 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14446  { 12080 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14447  { 12080 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14448  { 12080 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14449  { 12080 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
14450  { 12080 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
14451  { 12080 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14452  { 12080 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14453  { 12080 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14454  { 12080 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14455  { 12080 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14456  { 12080 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14457  { 12080 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14458  { 12080 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14459  { 12080 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14460  { 12080 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14461  { 12080 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14462  { 12080 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14463  { 12080 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14464  { 12080 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14465  { 12080 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14466  { 12080 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14467  { 12080 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14468  { 12080 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14469  { 12080 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14470  { 12087 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14471  { 12087 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14472  { 12087 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14473  { 12087 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14474  { 12087 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14475  { 12087 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14476  { 12087 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14477  { 12087 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14478  { 12087 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14479  { 12087 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14480  { 12087 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14481  { 12087 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14482  { 12087 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14483  { 12087 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14484  { 12087 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14485  { 12087 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14486  { 12087 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14487  { 12087 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14488  { 12087 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14489  { 12087 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14490  { 12087 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14491  { 12087 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14492  { 12094 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14493  { 12094 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14494  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14495  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14496  { 12094 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14497  { 12094 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14498  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14499  { 12094 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14500  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14501  { 12094 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14502  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14503  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14504  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14505  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14506  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14507  { 12094 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14508  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14509  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14510  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14511  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14512  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14513  { 12094 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14514  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14515  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14516  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14517  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14518  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14519  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14520  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14521  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14522  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14523  { 12104 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14524  { 12104 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14525  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14526  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14527  { 12104 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14528  { 12104 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14529  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14530  { 12104 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14531  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14532  { 12104 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14533  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14534  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14535  { 12104 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14536  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14537  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14538  { 12104 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14539  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14540  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14541  { 12104 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14542  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14543  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14544  { 12104 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14545  { 12114 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14546  { 12114 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14547  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14548  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14549  { 12114 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14550  { 12114 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14551  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14552  { 12114 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14553  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14554  { 12114 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14555  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14556  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14557  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14558  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14559  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14560  { 12114 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14561  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14562  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14563  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14564  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14565  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14566  { 12114 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14567  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14568  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14569  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14570  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14571  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14572  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14573  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14574  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14575  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14576  { 12124 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14577  { 12124 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14578  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14579  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14580  { 12124 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14581  { 12124 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14582  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14583  { 12124 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14584  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14585  { 12124 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14586  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14587  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14588  { 12124 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14589  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14590  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14591  { 12124 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14592  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14593  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14594  { 12124 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14595  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14596  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14597  { 12124 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14598  { 12134 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14599  { 12134 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14600  { 12134 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14601  { 12134 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14602  { 12134 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14603  { 12134 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14604  { 12134 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14605  { 12134 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14606  { 12134 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14607  { 12134 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14608  { 12134 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14609  { 12134 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14610  { 12134 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14611  { 12134 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14612  { 12134 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14613  { 12134 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14614  { 12134 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14615  { 12134 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14616  { 12134 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14617  { 12134 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14618  { 12134 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14619  { 12134 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14620  { 12141 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14621  { 12141 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14622  { 12141 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14623  { 12141 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14624  { 12141 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14625  { 12141 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14626  { 12141 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14627  { 12141 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14628  { 12141 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14629  { 12141 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14630  { 12141 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14631  { 12141 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14632  { 12141 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14633  { 12141 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14634  { 12141 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14635  { 12141 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14636  { 12141 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14637  { 12141 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14638  { 12141 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14639  { 12141 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14640  { 12141 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14641  { 12141 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14642  { 12141 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14643  { 12141 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14644  { 12141 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14645  { 12141 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14646  { 12141 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14647  { 12141 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14648  { 12141 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14649  { 12141 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14650  { 12141 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14651  { 12148 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14652  { 12148 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14653  { 12148 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14654  { 12148 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14655  { 12148 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14656  { 12148 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14657  { 12148 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14658  { 12148 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14659  { 12148 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14660  { 12148 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14661  { 12148 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14662  { 12148 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14663  { 12148 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14664  { 12148 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14665  { 12148 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14666  { 12148 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14667  { 12148 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14668  { 12148 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14669  { 12148 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14670  { 12148 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14671  { 12148 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14672  { 12148 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14673  { 12148 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14674  { 12148 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14675  { 12148 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14676  { 12148 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14677  { 12148 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14678  { 12148 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14679  { 12148 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14680  { 12148 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14681  { 12148 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14682  { 12155 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14683  { 12155 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14684  { 12155 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14685  { 12155 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14686  { 12155 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14687  { 12155 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14688  { 12155 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14689  { 12155 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14690  { 12155 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14691  { 12155 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14692  { 12155 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14693  { 12155 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14694  { 12155 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14695  { 12155 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14696  { 12155 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14697  { 12155 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14698  { 12155 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14699  { 12155 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14700  { 12155 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14701  { 12155 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14702  { 12155 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14703  { 12155 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14704  { 12163 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14705  { 12163 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14706  { 12163 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14707  { 12163 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14708  { 12163 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14709  { 12163 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14710  { 12163 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14711  { 12163 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14712  { 12163 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14713  { 12163 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14714  { 12163 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14715  { 12163 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14716  { 12163 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14717  { 12163 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14718  { 12163 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14719  { 12163 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14720  { 12163 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14721  { 12163 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14722  { 12163 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14723  { 12163 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14724  { 12163 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14725  { 12163 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14726  { 12171 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14727  { 12171 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14728  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14729  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14730  { 12171 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14731  { 12171 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14732  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14733  { 12171 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14734  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14735  { 12171 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14736  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14737  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14738  { 12171 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14739  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14740  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14741  { 12171 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14742  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14743  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14744  { 12171 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14745  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14746  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14747  { 12171 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14748  { 12180 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14749  { 12180 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14750  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14751  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14752  { 12180 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14753  { 12180 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14754  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14755  { 12180 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14756  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14757  { 12180 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14758  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14759  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14760  { 12180 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14761  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14762  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14763  { 12180 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14764  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14765  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14766  { 12180 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14767  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14768  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14769  { 12180 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14770  { 12189 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14771  { 12189 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14772  { 12189 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14773  { 12189 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14774  { 12189 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14775  { 12189 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14776  { 12189 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14777  { 12189 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14778  { 12189 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14779  { 12189 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14780  { 12189 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14781  { 12189 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14782  { 12189 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14783  { 12189 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14784  { 12189 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14785  { 12189 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14786  { 12189 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14787  { 12189 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14788  { 12189 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14789  { 12189 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14790  { 12189 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14791  { 12189 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14792  { 12196 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14793  { 12196 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14794  { 12196 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14795  { 12196 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14796  { 12196 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14797  { 12196 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14798  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14799  { 12196 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14800  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14801  { 12196 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14802  { 12196 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14803  { 12196 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14804  { 12196 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14805  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14806  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14807  { 12196 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14808  { 12196 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14809  { 12196 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14810  { 12196 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14811  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14812  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14813  { 12196 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14814  { 12205 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14815  { 12205 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14816  { 12205 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14817  { 12205 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14818  { 12211 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14819  { 12211 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14820  { 12211 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14821  { 12211 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14822  { 12211 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14823  { 12211 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14824  { 12211 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14825  { 12211 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14826  { 12211 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14827  { 12211 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14828  { 12211 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14829  { 12211 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14830  { 12211 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14831  { 12211 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14832  { 12211 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14833  { 12211 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14834  { 12211 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14835  { 12211 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14836  { 12211 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14837  { 12211 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14838  { 12211 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14839  { 12211 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14840  { 12211 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14841  { 12211 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14842  { 12211 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14843  { 12211 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14844  { 12211 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14845  { 12218 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14846  { 12218 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14847  { 12218 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14848  { 12218 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14849  { 12225 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14850  { 12225 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14851  { 12225 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14852  { 12225 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14853  { 12225 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14854  { 12225 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14855  { 12225 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14856  { 12225 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14857  { 12225 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14858  { 12225 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14859  { 12225 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14860  { 12225 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14861  { 12225 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14862  { 12225 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14863  { 12225 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14864  { 12225 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14865  { 12225 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14866  { 12225 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14867  { 12225 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14868  { 12225 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14869  { 12225 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870  { 12225 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14871  { 12225 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14872  { 12225 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14873  { 12225 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14874  { 12225 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14875  { 12225 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14876  { 12233 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14877  { 12233 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14878  { 12233 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14879  { 12233 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14880  { 12233 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14881  { 12233 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14882  { 12233 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14883  { 12233 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14884  { 12233 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14885  { 12233 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14886  { 12233 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14887  { 12233 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14888  { 12233 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14889  { 12233 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14890  { 12233 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14891  { 12233 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14892  { 12233 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14893  { 12233 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14894  { 12233 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14895  { 12233 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14896  { 12233 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14897  { 12233 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14898  { 12233 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14899  { 12233 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14900  { 12233 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14901  { 12233 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14902  { 12233 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14903  { 12241 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14904  { 12241 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14905  { 12241 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14906  { 12241 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14907  { 12241 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14908  { 12241 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14909  { 12241 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14910  { 12241 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14911  { 12241 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14912  { 12241 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14913  { 12241 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14914  { 12241 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14915  { 12241 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14916  { 12241 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14917  { 12241 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14918  { 12241 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14919  { 12241 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14920  { 12241 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14921  { 12241 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14922  { 12241 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14923  { 12241 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14924  { 12241 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14925  { 12241 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14926  { 12241 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14927  { 12241 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14928  { 12241 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14929  { 12241 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14930  { 12248 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14931  { 12248 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14932  { 12248 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14933  { 12248 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14934  { 12248 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14935  { 12248 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14936  { 12248 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14937  { 12248 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14938  { 12248 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14939  { 12248 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14940  { 12248 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14941  { 12248 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14942  { 12248 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14943  { 12248 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14944  { 12248 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14945  { 12248 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14946  { 12248 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14947  { 12248 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14948  { 12248 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14949  { 12248 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14950  { 12248 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14951  { 12248 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14952  { 12255 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14953  { 12255 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14954  { 12255 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14955  { 12255 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14956  { 12255 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14957  { 12255 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14958  { 12255 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14959  { 12255 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14960  { 12255 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14961  { 12255 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14962  { 12255 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14963  { 12255 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14964  { 12255 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14965  { 12255 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14966  { 12255 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14967  { 12255 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14968  { 12255 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14969  { 12255 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14970  { 12255 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14971  { 12255 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14972  { 12255 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14973  { 12255 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14974  { 12262 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14975  { 12262 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14976  { 12262 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14977  { 12262 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14978  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14979  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14980  { 12271 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14981  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14982  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14983  { 12271 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14984  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14985  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14986  { 12271 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14987  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14988  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14989  { 12271 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14990  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14991  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14992  { 12271 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14993  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14994  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14995  { 12271 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14996  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14997  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14998  { 12281 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14999  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15000  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15001  { 12281 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15002  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15003  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15004  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15005  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15006  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15007  { 12281 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15008  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15009  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15010  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15011  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15012  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15013  { 12281 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15014  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15015  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15016  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15017  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15018  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15019  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15020  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15021  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15022  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15023  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15024  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15025  { 12291 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15026  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15027  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15028  { 12291 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15029  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15030  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15031  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15032  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15033  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15034  { 12291 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15035  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15036  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15037  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15038  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15039  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15040  { 12291 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15041  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15042  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15043  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15044  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15045  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15046  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15047  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15048  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15049  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15050  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15051  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15052  { 12301 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15053  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15054  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15055  { 12301 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15056  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15057  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15058  { 12301 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15059  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15060  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15061  { 12301 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15062  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15063  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15064  { 12301 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15065  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15066  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15067  { 12301 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15068  { 12311 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15069  { 12311 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15070  { 12311 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15071  { 12311 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15072  { 12321 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15073  { 12321 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15074  { 12321 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15075  { 12321 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15076  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15077  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15078  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15079  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15080  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15081  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15082  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15083  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15084  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32 }, },
15085  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256 }, },
15086  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32X }, },
15087  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256X }, },
15088  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR512 }, },
15089  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15090  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15091  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15092  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15093  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15094  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15095  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15096  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15097  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15098  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15099  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15100  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15101  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15102  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15103  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15104  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15105  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15106  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15107  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15108  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15109  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15110  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15111  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15112  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15113  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15114  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15115  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
15116  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
15117  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
15118  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
15119  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR512 }, },
15120  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15121  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15122  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15123  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15124  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15125  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15126  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15127  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15128  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15129  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15130  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15131  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15132  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15133  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15134  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15135  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15136  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15137  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15138  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
15139  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
15140  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
15141  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
15142  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
15143  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
15144  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15145  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15146  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
15147  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR256X }, },
15148  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR512 }, },
15149  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15150  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15151  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15152  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
15153  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
15154  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
15155  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
15156  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
15157  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15158  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15159  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15160  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15161  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15162  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15163  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15164  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15165  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15166  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15167  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15168  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15169  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15170  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15171  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15172  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15173  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15174  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15175  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15176  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15177  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15178  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15179  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15180  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15181  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15182  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15183  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
15184  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256 }, },
15185  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
15186  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256X }, },
15187  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR512 }, },
15188  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15189  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15190  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15191  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15192  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15193  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15194  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15195  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15196  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15197  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15198  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15199  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15200  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15201  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15202  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15203  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15204  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15205  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15206  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15207  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15208  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15209  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15210  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15211  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15212  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15213  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15214  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15215  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15216  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15217  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15218  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15219  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15220  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15221  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15222  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15223  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15224  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15225  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15226  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15227  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15228  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15229  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15230  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15231  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15232  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15233  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15234  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15235  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15236  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15237  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15238  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15239  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15240  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15241  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15242  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15243  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15244  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15245  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15246  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15247  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15248  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15249  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15250  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15251  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15252  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15253  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15254  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15255  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15256  { 12481 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15257  { 12481 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15258  { 12481 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15259  { 12481 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15260  { 12481 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15261  { 12481 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15262  { 12488 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15263  { 12488 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15264  { 12488 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15265  { 12488 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15266  { 12488 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15267  { 12488 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15268  { 12488 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15269  { 12488 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15270  { 12488 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15271  { 12488 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15272  { 12488 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15273  { 12488 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15274  { 12488 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15275  { 12488 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15276  { 12488 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15277  { 12488 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15278  { 12488 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15279  { 12488 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15280  { 12488 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15281  { 12488 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15282  { 12488 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15283  { 12488 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15284  { 12488 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15285  { 12488 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15286  { 12488 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15287  { 12488 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15288  { 12488 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15289  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15290  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15291  { 12488 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15292  { 12488 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15293  { 12488 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15294  { 12488 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15295  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15296  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15297  { 12488 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15298  { 12488 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15299  { 12488 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15300  { 12488 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15301  { 12488 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15302  { 12488 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15303  { 12488 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15304  { 12488 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15305  { 12488 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15306  { 12488 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15307  { 12488 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15308  { 12488 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15309  { 12488 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15310  { 12488 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15311  { 12488 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15312  { 12488 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15313  { 12488 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15314  { 12488 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15315  { 12488 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15316  { 12488 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15317  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15318  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15319  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15320  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15321  { 12488 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15322  { 12488 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15323  { 12488 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15324  { 12488 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15325  { 12488 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15326  { 12488 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15327  { 12488 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15328  { 12488 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15329  { 12488 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15330  { 12488 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15331  { 12488 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15332  { 12488 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15333  { 12488 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15334  { 12488 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15335  { 12488 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15336  { 12488 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15337  { 12488 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15338  { 12488 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15339  { 12488 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15340  { 12488 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15341  { 12488 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15342  { 12488 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15343  { 12488 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15344  { 12488 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15345  { 12488 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15346  { 12488 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15347  { 12488 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15348  { 12488 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15349  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15350  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15351  { 12488 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15352  { 12488 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15353  { 12488 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15354  { 12488 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15355  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15356  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15357  { 12488 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15358  { 12488 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15359  { 12488 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15360  { 12488 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15361  { 12488 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15362  { 12488 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15363  { 12488 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15364  { 12488 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15365  { 12488 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15366  { 12488 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15367  { 12488 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15368  { 12488 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15369  { 12488 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15370  { 12488 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15371  { 12488 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15372  { 12488 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15373  { 12488 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15374  { 12488 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15375  { 12488 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15376  { 12488 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15377  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15378  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15379  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15380  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15381  { 12488 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15382  { 12494 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15383  { 12494 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15384  { 12494 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15385  { 12494 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15386  { 12494 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15387  { 12494 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15388  { 12494 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15389  { 12494 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15390  { 12494 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15391  { 12494 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15392  { 12494 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15393  { 12494 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15394  { 12501 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15395  { 12501 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15396  { 12501 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15397  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15398  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15399  { 12501 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15400  { 12501 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15401  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15402  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15403  { 12501 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15404  { 12501 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15405  { 12501 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15406  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15407  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15408  { 12501 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15409  { 12501 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15410  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15411  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15412  { 12508 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15413  { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15414  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15415  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15416  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15417  { 12508 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15418  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15419  { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15420  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15421  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15422  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15423  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15424  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15425  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15426  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15427  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15428  { 12517 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15429  { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15430  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15431  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15432  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15433  { 12517 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15434  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15435  { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15436  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15437  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15438  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15439  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15440  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15441  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15442  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15443  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15444  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15445  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15446  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15447  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15448  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15449  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15450  { 12526 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15451  { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15452  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15453  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15454  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15455  { 12526 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15456  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15457  { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15458  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15459  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15460  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15461  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15462  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15463  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15464  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15465  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15466  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15467  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15468  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15469  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15470  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15471  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15472  { 12535 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15473  { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15474  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15475  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15476  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15477  { 12535 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15478  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15479  { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15480  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15481  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15482  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15483  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15484  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15485  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15486  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15487  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15488  { 12544 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15489  { 12544 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15490  { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15491  { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15492  { 12566 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15493  { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15494  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15495  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15496  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15497  { 12566 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15498  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15499  { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15500  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15501  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15502  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15503  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15504  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15505  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15506  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15507  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15508  { 12575 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15509  { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15510  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15511  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15512  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15513  { 12575 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15514  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15515  { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15516  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15517  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15518  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15519  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15520  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15521  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15522  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15523  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15524  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15525  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15526  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15527  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15528  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15529  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15530  { 12584 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15531  { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15532  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15533  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15534  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15535  { 12584 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15536  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15537  { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15538  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15539  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15540  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15541  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15542  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15543  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15544  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15545  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15546  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15547  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15548  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15549  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15550  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15551  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15552  { 12593 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15553  { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15554  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15555  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15556  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15557  { 12593 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15558  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15559  { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15560  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15561  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15562  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15563  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15564  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15565  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15566  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15567  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15568  { 12602 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15569  { 12602 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15570  { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15571  { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15572  { 12624 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15573  { 12624 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15574  { 12624 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15575  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15576  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15577  { 12624 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15578  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15579  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15580  { 12624 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15581  { 12624 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15582  { 12624 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15583  { 12624 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15584  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15585  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15586  { 12624 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15587  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15588  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15589  { 12624 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15590  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15591  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15592  { 12631 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15593  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15594  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15595  { 12631 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15596  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15597  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15598  { 12631 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15599  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15600  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15601  { 12631 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15602  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15603  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15604  { 12639 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15605  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15606  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15607  { 12639 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15608  { 12639 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15609  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15610  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15611  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15612  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15613  { 12639 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15614  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15615  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15616  { 12639 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15617  { 12639 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15618  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15619  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15620  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15621  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15622  { 12647 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15623  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15624  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15625  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15626  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15627  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15628  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15629  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15630  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15631  { 12647 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15632  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15633  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15634  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15635  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15636  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15637  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15638  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15639  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15640  { 12655 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15641  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15642  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15643  { 12655 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15644  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15645  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15646  { 12655 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15647  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15648  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15649  { 12655 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15650  { 12663 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15651  { 12663 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15652  { 12663 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15653  { 12663 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15654  { 12663 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15655  { 12663 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15656  { 12663 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15657  { 12663 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15658  { 12663 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15659  { 12663 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15660  { 12663 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15661  { 12663 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15662  { 12670 /* vpcom */, X86::VPCOMBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15663  { 12670 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15664  { 12670 /* vpcom */, X86::VPCOMDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15665  { 12670 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15666  { 12670 /* vpcom */, X86::VPCOMQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15667  { 12670 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15668  { 12670 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15669  { 12670 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15670  { 12670 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15671  { 12670 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15672  { 12670 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15673  { 12670 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15674  { 12670 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15675  { 12670 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15676  { 12670 /* vpcom */, X86::VPCOMWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15677  { 12670 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15678  { 12676 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15679  { 12676 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15680  { 12683 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15681  { 12683 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15682  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15683  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15684  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15685  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15686  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15687  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15688  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15689  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15690  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15691  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15692  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15693  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15694  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15695  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15696  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15697  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15698  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15699  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15700  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15701  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15702  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15703  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15704  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15705  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15706  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15707  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15708  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15709  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15710  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15711  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15712  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15713  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15714  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15715  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15716  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15717  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15718  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15719  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15720  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15721  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15722  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15723  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15724  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15725  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15726  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15727  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15728  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15729  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15730  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15731  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15732  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15733  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15734  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15735  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15736  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15737  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15738  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15739  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15740  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15741  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15742  { 12738 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15743  { 12738 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15744  { 12745 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15745  { 12745 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15746  { 12753 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15747  { 12753 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15748  { 12761 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15749  { 12761 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15750  { 12769 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15751  { 12769 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15752  { 12777 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15753  { 12777 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15754  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15755  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15756  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15757  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
15758  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
15759  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
15760  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
15761  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
15762  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
15763  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15764  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15765  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15766  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15767  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15768  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15769  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15770  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15771  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15772  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15773  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15774  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15775  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15776  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15777  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15778  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15779  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15780  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15781  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15782  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15783  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15784  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
15785  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
15786  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
15787  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
15788  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
15789  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
15790  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15791  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15792  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15793  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15794  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15795  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15796  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15797  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15798  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15799  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15800  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15801  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15802  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15803  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15804  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15805  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15806  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15807  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15808  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15809  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15810  { 12808 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15811  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15812  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15813  { 12808 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15814  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15815  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15816  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15817  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15818  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15819  { 12808 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15820  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15821  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15822  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15823  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15824  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15825  { 12808 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15826  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15827  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15828  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15829  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15830  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15831  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15832  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15833  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15834  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15835  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15836  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15837  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15838  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15839  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15840  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15841  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15842  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15843  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15844  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15845  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15846  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15847  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15848  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15849  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15850  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15851  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15852  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15853  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15854  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15855  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15856  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15857  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15858  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15859  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15860  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15861  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15862  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15863  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15864  { 12827 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15865  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15866  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15867  { 12827 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15868  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15869  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15870  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15871  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15872  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15873  { 12827 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15874  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15875  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15876  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15877  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15878  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15879  { 12827 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15880  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15881  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15882  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15883  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15884  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15885  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15886  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15887  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15888  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15889  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15890  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15891  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15892  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15893  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15894  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15895  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15896  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15897  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15898  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15899  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15900  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15901  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15902  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15903  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15904  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15905  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15906  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15907  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15908  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15909  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15910  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15911  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15912  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15913  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15914  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15915  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15916  { 12846 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15917  { 12846 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15918  { 12857 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15919  { 12857 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15920  { 12868 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15921  { 12868 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15922  { 12868 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15923  { 12868 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15924  { 12868 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15925  { 12868 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15926  { 12868 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15927  { 12868 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15928  { 12868 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929  { 12868 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15930  { 12868 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15931  { 12868 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932  { 12868 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15933  { 12868 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15934  { 12868 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15935  { 12868 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15936  { 12868 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15937  { 12868 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15938  { 12875 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15939  { 12875 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15940  { 12875 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15941  { 12875 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15942  { 12875 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15943  { 12875 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15944  { 12875 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15945  { 12875 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15946  { 12875 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15947  { 12875 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15948  { 12875 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15949  { 12875 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15950  { 12875 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15951  { 12875 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15952  { 12875 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15953  { 12875 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15954  { 12875 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15955  { 12875 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15956  { 12875 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15957  { 12875 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15958  { 12882 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15959  { 12882 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15960  { 12882 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15961  { 12882 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15962  { 12882 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15963  { 12882 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15964  { 12882 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15965  { 12882 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15966  { 12882 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15967  { 12882 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15968  { 12882 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15969  { 12882 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15970  { 12882 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15971  { 12882 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15972  { 12882 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15973  { 12882 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15974  { 12882 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15975  { 12882 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15976  { 12891 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15977  { 12891 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15978  { 12891 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15979  { 12891 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15980  { 12891 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15981  { 12891 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15982  { 12891 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15983  { 12891 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15984  { 12891 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15985  { 12891 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15986  { 12891 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15987  { 12891 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15988  { 12891 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15989  { 12891 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15990  { 12891 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15991  { 12891 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15992  { 12891 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15993  { 12891 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15994  { 12891 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15995  { 12891 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15996  { 12891 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15997  { 12891 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15998  { 12891 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15999  { 12891 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16000  { 12891 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16001  { 12891 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16002  { 12891 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16003  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16004  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16005  { 12900 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16006  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16007  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16008  { 12900 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16009  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16010  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16011  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16012  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16013  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16014  { 12900 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16015  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16016  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16017  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16018  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16019  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16020  { 12900 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16021  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16022  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16023  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16024  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16025  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16026  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16027  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16028  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16029  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16030  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16031  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16032  { 12910 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16033  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16034  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16035  { 12910 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16036  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16037  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16038  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16039  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16040  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16041  { 12910 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16042  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16043  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16044  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16045  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16046  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16047  { 12910 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16048  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16049  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16050  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16051  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16052  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16053  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16054  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16055  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16056  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16057  { 12920 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16058  { 12920 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16059  { 12920 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16060  { 12920 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16061  { 12920 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16062  { 12920 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16063  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16064  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16065  { 12920 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16066  { 12920 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16067  { 12920 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16068  { 12920 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16069  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16070  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16071  { 12920 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16072  { 12920 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16073  { 12920 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16074  { 12920 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16075  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16076  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16077  { 12920 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16078  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16079  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16080  { 12920 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16081  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16082  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16083  { 12920 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16084  { 12929 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16085  { 12929 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16086  { 12929 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16087  { 12929 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16088  { 12929 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16089  { 12929 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16090  { 12929 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16091  { 12929 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16092  { 12929 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16093  { 12929 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16094  { 12929 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16095  { 12929 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16096  { 12929 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16097  { 12929 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16098  { 12929 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16099  { 12929 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16100  { 12929 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16101  { 12929 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16102  { 12938 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16103  { 12938 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16104  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16105  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16106  { 12938 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16107  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16108  { 12949 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16109  { 12949 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16110  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16111  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16112  { 12949 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16113  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16114  { 12960 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16115  { 12960 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16116  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16117  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16118  { 12960 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16119  { 12960 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16120  { 12960 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16121  { 12960 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16122  { 12960 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16123  { 12960 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16124  { 12960 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16125  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16126  { 12960 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16127  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16128  { 12960 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16129  { 12960 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16130  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16131  { 12960 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16132  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16133  { 12960 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16134  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16135  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16136  { 12960 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16137  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16138  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16139  { 12960 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16140  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16141  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16142  { 12960 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16143  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16144  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16145  { 12960 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16146  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16147  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16148  { 12960 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16149  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16150  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16151  { 12960 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16152  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16153  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16154  { 12960 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16155  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16156  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16157  { 12960 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16158  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16159  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16160  { 12960 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16161  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16162  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16163  { 12960 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16164  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16165  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16166  { 12960 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16167  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16168  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16169  { 12960 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16170  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16171  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16172  { 12960 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16173  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16174  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16175  { 12960 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16176  { 12970 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16177  { 12970 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16178  { 12970 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16179  { 12970 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16180  { 12970 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16181  { 12970 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16182  { 12970 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16183  { 12970 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16184  { 12970 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16185  { 12970 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16186  { 12970 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16187  { 12970 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16188  { 12970 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16189  { 12970 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16190  { 12970 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16191  { 12970 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16192  { 12970 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16193  { 12970 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16194  { 12970 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16195  { 12970 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16196  { 12970 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16197  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16198  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16199  { 12970 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16200  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16201  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16202  { 12970 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16203  { 12970 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16204  { 12970 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16205  { 12970 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16206  { 12970 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16207  { 12970 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16208  { 12970 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16209  { 12970 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16210  { 12970 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16211  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16212  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16213  { 12970 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16214  { 12970 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16215  { 12970 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16216  { 12970 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16217  { 12970 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16218  { 12970 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16219  { 12970 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16220  { 12970 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16221  { 12970 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16222  { 12970 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16223  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16224  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16225  { 12970 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16226  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16227  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16228  { 12970 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16229  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16230  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16231  { 12970 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16232  { 12970 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16233  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16234  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16235  { 12970 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16236  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16237  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16238  { 12980 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16239  { 12980 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16240  { 12980 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16241  { 12980 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16242  { 12980 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16243  { 12980 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16244  { 12980 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16245  { 12980 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16246  { 12980 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16247  { 12980 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16248  { 12980 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16249  { 12980 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16250  { 12980 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16251  { 12980 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16252  { 12980 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16253  { 12980 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16254  { 12980 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16255  { 12980 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16256  { 12980 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16257  { 12980 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16258  { 12980 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16259  { 12980 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16260  { 12980 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16261  { 12980 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16262  { 12980 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16263  { 12980 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16264  { 12980 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16265  { 12980 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16266  { 12980 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16267  { 12980 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16268  { 12980 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16269  { 12980 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16270  { 12980 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16271  { 12980 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16272  { 12980 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16273  { 12980 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16274  { 12980 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16275  { 12980 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276  { 12988 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16277  { 12988 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16278  { 12988 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16279  { 12988 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16280  { 12988 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16281  { 12988 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16282  { 12988 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16283  { 12988 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16284  { 12988 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16285  { 12988 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16286  { 12988 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16287  { 12988 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16288  { 12988 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16289  { 12988 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16290  { 12988 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16291  { 12988 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16292  { 12988 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16293  { 12988 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16294  { 12988 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16295  { 12988 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16296  { 12996 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16297  { 12996 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16298  { 12996 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16299  { 12996 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16300  { 12996 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16301  { 12996 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16302  { 12996 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16303  { 12996 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16304  { 12996 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16305  { 12996 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16306  { 12996 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16307  { 12996 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16308  { 12996 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16309  { 12996 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16310  { 12996 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16311  { 12996 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16312  { 12996 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16313  { 12996 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16314  { 12996 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16315  { 12996 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16316  { 12996 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16317  { 12996 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16318  { 12996 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16319  { 12996 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16320  { 12996 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16321  { 12996 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16322  { 12996 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16323  { 12996 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16324  { 12996 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16325  { 12996 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16326  { 12996 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16327  { 12996 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16328  { 12996 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16329  { 12996 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16330  { 12996 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16331  { 12996 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16332  { 12996 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16333  { 12996 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16334  { 13003 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16335  { 13003 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16336  { 13003 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16337  { 13003 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16338  { 13003 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16339  { 13003 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16340  { 13003 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16341  { 13003 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16342  { 13003 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16343  { 13003 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16344  { 13003 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16345  { 13003 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16346  { 13003 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16347  { 13003 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16348  { 13003 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16349  { 13003 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16350  { 13003 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16351  { 13003 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16352  { 13012 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16353  { 13012 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16354  { 13012 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16355  { 13012 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16356  { 13012 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16357  { 13012 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16358  { 13012 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16359  { 13012 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16360  { 13012 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16361  { 13012 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16362  { 13012 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16363  { 13012 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16364  { 13012 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16365  { 13012 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16366  { 13012 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16367  { 13012 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16368  { 13012 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16369  { 13012 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16370  { 13012 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16371  { 13012 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16372  { 13012 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16373  { 13012 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16374  { 13012 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16375  { 13012 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16376  { 13012 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16377  { 13012 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16378  { 13012 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16379  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16380  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16381  { 13021 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16382  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16383  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16384  { 13021 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16385  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16386  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16387  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16388  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16389  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16390  { 13021 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16391  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16392  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16393  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16394  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16395  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16396  { 13021 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16397  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16398  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16399  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16400  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16401  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16402  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16403  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16404  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16405  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16406  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16407  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16408  { 13031 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16409  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16410  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16411  { 13031 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16412  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16413  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16414  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16415  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16416  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16417  { 13031 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16418  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16419  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16420  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16421  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16422  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16423  { 13031 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16424  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16425  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16426  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16427  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16428  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16429  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16430  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16431  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16432  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16433  { 13041 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16434  { 13041 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16435  { 13041 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16436  { 13041 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16437  { 13041 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16438  { 13041 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16439  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16440  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16441  { 13041 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16442  { 13041 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16443  { 13041 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16444  { 13041 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16445  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16446  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16447  { 13041 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16448  { 13041 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16449  { 13041 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16450  { 13041 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16451  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16452  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16453  { 13041 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16454  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16455  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16456  { 13041 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16457  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16458  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16459  { 13041 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16460  { 13050 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16461  { 13050 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16462  { 13050 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16463  { 13050 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16464  { 13050 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16465  { 13050 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16466  { 13050 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16467  { 13050 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16468  { 13050 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16469  { 13050 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16470  { 13050 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16471  { 13050 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16472  { 13050 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16473  { 13050 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16474  { 13050 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16475  { 13050 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16476  { 13050 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16477  { 13050 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16478  { 13059 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16479  { 13059 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16480  { 13059 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16481  { 13059 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16482  { 13059 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16483  { 13059 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16484  { 13059 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16485  { 13059 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16486  { 13059 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16487  { 13059 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16488  { 13059 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16489  { 13059 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16490  { 13059 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16491  { 13059 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16492  { 13059 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16493  { 13059 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16494  { 13059 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16495  { 13059 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16496  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16497  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16498  { 13066 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16499  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16500  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16501  { 13066 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16502  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16503  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16504  { 13066 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16505  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16506  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16507  { 13066 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16508  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16509  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16510  { 13066 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16511  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16512  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16513  { 13066 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16514  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16515  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16516  { 13076 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16517  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16518  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16519  { 13076 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16520  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16521  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16522  { 13076 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16523  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16524  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16525  { 13076 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16526  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16527  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16528  { 13076 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16529  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16530  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16531  { 13076 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16532  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16533  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16534  { 13086 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16535  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16536  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16537  { 13086 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16538  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16539  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16540  { 13086 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16541  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16542  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16543  { 13086 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16544  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16545  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16546  { 13086 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16547  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16548  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16549  { 13086 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16550  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16551  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16552  { 13096 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16553  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16554  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16555  { 13096 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16556  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16557  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16558  { 13096 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16559  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16560  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16561  { 13096 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16562  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16563  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16564  { 13096 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16565  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16566  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16567  { 13096 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16568  { 13106 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16569  { 13106 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
16570  { 13106 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16571  { 13106 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, },
16572  { 13114 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
16573  { 13114 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
16574  { 13114 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
16575  { 13114 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
16576  { 13122 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
16577  { 13122 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
16578  { 13122 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
16579  { 13122 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
16580  { 13130 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16581  { 13130 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
16582  { 13130 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16583  { 13130 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, },
16584  { 13138 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16585  { 13138 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16586  { 13138 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16587  { 13138 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16588  { 13138 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16589  { 13149 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16590  { 13149 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
16591  { 13149 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16592  { 13149 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, 0, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16593  { 13149 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16594  { 13160 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
16595  { 13160 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
16596  { 13160 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, 0, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16597  { 13160 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16598  { 13160 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, 0, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16599  { 13171 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16600  { 13171 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16601  { 13171 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16602  { 13171 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16603  { 13171 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16604  { 13182 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16605  { 13182 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16606  { 13191 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16607  { 13191 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16608  { 13200 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16609  { 13200 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16610  { 13209 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16611  { 13209 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16612  { 13209 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16613  { 13209 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16614  { 13217 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16615  { 13217 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16616  { 13226 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16617  { 13226 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16618  { 13226 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16619  { 13226 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16620  { 13235 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16621  { 13235 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16622  { 13245 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16623  { 13245 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16624  { 13255 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16625  { 13255 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16626  { 13265 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16627  { 13265 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16628  { 13275 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16629  { 13275 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16630  { 13285 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16631  { 13285 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16632  { 13295 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16633  { 13295 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16634  { 13295 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16635  { 13295 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16636  { 13303 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16637  { 13303 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16638  { 13312 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16639  { 13312 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16640  { 13321 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16641  { 13321 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16642  { 13333 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16643  { 13333 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16644  { 13342 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16645  { 13342 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16646  { 13342 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16647  { 13342 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16648  { 13350 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16649  { 13350 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16650  { 13359 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16651  { 13359 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16652  { 13359 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16653  { 13359 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16654  { 13368 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16655  { 13368 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16656  { 13368 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16657  { 13368 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16658  { 13376 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16659  { 13376 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16660  { 13385 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16661  { 13385 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16662  { 13385 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
16663  { 13385 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, },
16664  { 13393 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
16665  { 13393 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
16666  { 13393 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
16667  { 13393 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
16668  { 13401 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
16669  { 13401 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, },
16670  { 13401 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
16671  { 13401 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
16672  { 13409 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16673  { 13409 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16674  { 13409 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
16675  { 13409 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, },
16676  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16677  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16678  { 13417 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16679  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16680  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16681  { 13417 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16682  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16683  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16684  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16685  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16686  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16687  { 13417 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16688  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16689  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16690  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16691  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16692  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16693  { 13417 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16694  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16695  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16696  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16697  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16698  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16699  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16700  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16701  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16702  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16703  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16704  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16705  { 13426 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16706  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16707  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16708  { 13426 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16709  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16710  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16711  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16712  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16713  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16714  { 13426 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16715  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16716  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16717  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16718  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16719  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16720  { 13426 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16721  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16722  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16723  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16724  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16725  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16726  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16727  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16728  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16729  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16730  { 13435 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16731  { 13435 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16732  { 13444 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16733  { 13444 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16734  { 13454 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16735  { 13454 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16736  { 13464 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16737  { 13464 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16738  { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16739  { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16740  { 13485 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16741  { 13485 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16742  { 13496 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16743  { 13496 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16744  { 13506 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16745  { 13506 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16746  { 13516 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16747  { 13516 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16748  { 13525 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16749  { 13525 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16750  { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16751  { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16752  { 13545 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16753  { 13545 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16754  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16755  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16756  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16757  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16758  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16759  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16760  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16761  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16762  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16763  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16764  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16765  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16766  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16767  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16768  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16769  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16770  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16771  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16772  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16773  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16774  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16775  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16776  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16777  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16778  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16779  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16780  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16781  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16782  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16783  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16784  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16785  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16786  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16787  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16788  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16789  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16790  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16791  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16792  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16793  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16794  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16795  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16796  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16797  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16798  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16799  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16800  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16801  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16802  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16803  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16804  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16805  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16806  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16807  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16808  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16809  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16810  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16811  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16812  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16813  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16814  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16815  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16816  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16817  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16818  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16819  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16820  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16821  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16822  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16823  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16824  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16825  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16826  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16827  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16828  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16829  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16830  { 13590 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16831  { 13590 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16832  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16833  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16834  { 13590 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16835  { 13590 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16836  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16837  { 13590 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16838  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16839  { 13590 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16840  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16841  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16842  { 13590 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16843  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16844  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16845  { 13590 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16846  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16847  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16848  { 13590 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16849  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16850  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16851  { 13590 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16852  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
16853  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
16854  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16855  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16856  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
16857  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
16858  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16859  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16860  { 13621 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16861  { 13621 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16862  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16863  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16864  { 13621 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16865  { 13621 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16866  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16867  { 13621 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16868  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16869  { 13621 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16870  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16871  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16872  { 13621 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16873  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16874  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16875  { 13621 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16876  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16877  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16878  { 13621 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16879  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16880  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16881  { 13621 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16882  { 13629 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16883  { 13629 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16884  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16885  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16886  { 13629 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16887  { 13629 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16888  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16889  { 13629 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16890  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16891  { 13629 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16892  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16893  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16894  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16895  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16896  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16897  { 13629 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16898  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16899  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16900  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16901  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16902  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16903  { 13629 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16904  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16905  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16906  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16907  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16908  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16909  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16910  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16911  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16912  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16913  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16914  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16915  { 13637 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16916  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16917  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16918  { 13637 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16919  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16920  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16921  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16922  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16923  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16924  { 13637 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16925  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16926  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16927  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16928  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16929  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16930  { 13637 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16931  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16932  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16933  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16934  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16935  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16936  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16937  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16938  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16939  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16940  { 13645 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16941  { 13645 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16942  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16943  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16944  { 13645 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16945  { 13645 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16946  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16947  { 13645 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16948  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16949  { 13645 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16950  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16951  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16952  { 13645 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16953  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16954  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16955  { 13645 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16956  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16957  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16958  { 13645 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16959  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16960  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16961  { 13645 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16962  { 13653 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16963  { 13653 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16964  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16965  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16966  { 13653 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16967  { 13653 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16968  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16969  { 13653 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16970  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16971  { 13653 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16972  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16973  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16974  { 13653 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16975  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16976  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16977  { 13653 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16978  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16979  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16980  { 13653 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16981  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16982  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16983  { 13653 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16984  { 13661 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16985  { 13661 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16986  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16987  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16988  { 13661 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16989  { 13661 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16990  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16991  { 13661 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16992  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16993  { 13661 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16994  { 13661 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16995  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16996  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16997  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16998  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16999  { 13661 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17000  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17001  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17002  { 13661 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17003  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17004  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17005  { 13661 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17006  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17007  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17008  { 13661 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17009  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17010  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17011  { 13661 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17012  { 13661 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17013  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17014  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17015  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17016  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17017  { 13669 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17018  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17019  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17020  { 13669 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17021  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17022  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17023  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17024  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17025  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17026  { 13669 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17027  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17028  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17029  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17030  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17031  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17032  { 13669 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17033  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17034  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17035  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17036  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17037  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17038  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17039  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17040  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17041  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17042  { 13677 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17043  { 13677 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17044  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17045  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17046  { 13677 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17047  { 13677 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17048  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17049  { 13677 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17050  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17051  { 13677 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17052  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17053  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17054  { 13677 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17055  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17056  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17057  { 13677 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17058  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17059  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17060  { 13677 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17061  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17062  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17063  { 13677 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17064  { 13685 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17065  { 13685 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17066  { 13685 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17067  { 13685 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17068  { 13685 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17069  { 13685 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17070  { 13685 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17071  { 13685 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17072  { 13685 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17073  { 13685 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17074  { 13685 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17075  { 13685 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17076  { 13685 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17077  { 13685 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17078  { 13685 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17079  { 13685 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17080  { 13685 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17081  { 13685 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17082  { 13685 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17083  { 13685 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17084  { 13685 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17085  { 13685 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17086  { 13693 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17087  { 13693 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17088  { 13693 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17089  { 13693 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17090  { 13693 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17091  { 13693 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17092  { 13693 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17093  { 13693 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17094  { 13693 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17095  { 13693 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17096  { 13693 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17097  { 13693 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17098  { 13693 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17099  { 13693 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17100  { 13693 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17101  { 13693 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17102  { 13693 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17103  { 13693 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17104  { 13693 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17105  { 13693 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17106  { 13693 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17107  { 13693 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17108  { 13693 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17109  { 13693 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17110  { 13693 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17111  { 13693 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17112  { 13693 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17113  { 13693 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17114  { 13693 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17115  { 13693 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17116  { 13693 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17117  { 13701 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17118  { 13701 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17119  { 13701 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17120  { 13701 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17121  { 13701 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17122  { 13701 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17123  { 13701 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17124  { 13701 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17125  { 13701 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17126  { 13701 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17127  { 13701 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17128  { 13701 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17129  { 13701 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17130  { 13701 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17131  { 13701 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17132  { 13701 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17133  { 13701 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17134  { 13701 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17135  { 13701 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17136  { 13701 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17137  { 13701 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17138  { 13701 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17139  { 13701 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17140  { 13701 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17141  { 13701 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17142  { 13701 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17143  { 13701 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17144  { 13709 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17145  { 13709 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17146  { 13709 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17147  { 13709 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17148  { 13709 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17149  { 13709 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17150  { 13709 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17151  { 13709 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17152  { 13709 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17153  { 13709 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17154  { 13709 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17155  { 13709 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17156  { 13709 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17157  { 13709 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17158  { 13709 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17159  { 13709 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17160  { 13709 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17161  { 13709 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17162  { 13709 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17163  { 13709 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17164  { 13709 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17165  { 13709 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17166  { 13717 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17167  { 13717 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17168  { 13717 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17169  { 13717 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17170  { 13717 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17171  { 13717 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17172  { 13717 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17173  { 13717 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17174  { 13717 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17175  { 13717 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17176  { 13717 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17177  { 13717 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17178  { 13717 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17179  { 13717 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17180  { 13717 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17181  { 13717 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17182  { 13717 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17183  { 13717 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17184  { 13717 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17185  { 13717 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17186  { 13717 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17187  { 13717 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17188  { 13725 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17189  { 13725 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17190  { 13725 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17191  { 13725 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17192  { 13725 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17193  { 13725 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17194  { 13725 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17195  { 13725 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17196  { 13725 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17197  { 13725 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17198  { 13725 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17199  { 13725 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17200  { 13725 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17201  { 13725 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17202  { 13725 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17203  { 13725 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17204  { 13725 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17205  { 13725 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17206  { 13725 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17207  { 13725 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17208  { 13725 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17209  { 13725 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17210  { 13725 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17211  { 13725 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17212  { 13725 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17213  { 13725 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17214  { 13725 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17215  { 13725 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17216  { 13725 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17217  { 13725 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17218  { 13725 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17219  { 13733 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17220  { 13733 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17221  { 13733 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17222  { 13733 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17223  { 13733 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17224  { 13733 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17225  { 13733 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17226  { 13733 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17227  { 13733 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17228  { 13733 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17229  { 13733 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17230  { 13733 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17231  { 13733 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17232  { 13733 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17233  { 13733 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17234  { 13733 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17235  { 13733 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17236  { 13733 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17237  { 13733 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17238  { 13733 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17239  { 13733 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17240  { 13733 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17241  { 13733 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17242  { 13733 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17243  { 13733 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17244  { 13733 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17245  { 13733 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17246  { 13741 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17247  { 13741 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17248  { 13741 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17249  { 13741 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17250  { 13741 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17251  { 13741 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17252  { 13741 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17253  { 13741 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17254  { 13741 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17255  { 13741 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17256  { 13741 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17257  { 13741 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17258  { 13741 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17259  { 13741 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17260  { 13741 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17261  { 13741 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17262  { 13741 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17263  { 13741 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17264  { 13741 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17265  { 13741 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17266  { 13741 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17267  { 13741 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17268  { 13749 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17269  { 13749 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17270  { 13749 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17271  { 13758 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17272  { 13758 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17273  { 13758 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17274  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17275  { 13767 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17276  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17277  { 13767 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17278  { 13767 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17279  { 13767 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17280  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17281  { 13767 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17282  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17283  { 13767 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17284  { 13767 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17285  { 13767 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17286  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17287  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17288  { 13767 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17289  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17290  { 13775 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17291  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17292  { 13775 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17293  { 13775 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17294  { 13775 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17295  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17296  { 13775 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17297  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17298  { 13775 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17299  { 13775 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17300  { 13775 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17301  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17302  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17303  { 13775 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17304  { 13783 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17305  { 13783 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17306  { 13783 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17307  { 13792 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17308  { 13792 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17309  { 13792 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17310  { 13801 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17311  { 13801 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17312  { 13801 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17313  { 13810 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17314  { 13810 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17315  { 13810 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17316  { 13819 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
17317  { 13819 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
17318  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17319  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17320  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17321  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17322  { 13838 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17323  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17324  { 13838 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17325  { 13838 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17326  { 13838 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17327  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17328  { 13838 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17329  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17330  { 13838 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17331  { 13838 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17332  { 13838 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17333  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17334  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17335  { 13838 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17336  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17337  { 13846 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17338  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17339  { 13846 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17340  { 13846 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17341  { 13846 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17342  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17343  { 13846 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17344  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17345  { 13846 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17346  { 13846 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17347  { 13846 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17348  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17349  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17350  { 13846 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17351  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17352  { 13854 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17353  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17354  { 13854 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17355  { 13854 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17356  { 13854 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17357  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17358  { 13854 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17359  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17360  { 13854 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17361  { 13854 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17362  { 13854 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17363  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17364  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17365  { 13854 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17366  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17367  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17368  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17369  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17370  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17371  { 13862 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17372  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17373  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17374  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17375  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17376  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17377  { 13862 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17378  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17379  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17380  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17381  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17382  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17383  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17384  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17385  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17386  { 13871 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17387  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17388  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17389  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17390  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17391  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17392  { 13871 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17393  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17394  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17395  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17396  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17397  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17398  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17399  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17400  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17401  { 13880 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17402  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17403  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17404  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17405  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17406  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17407  { 13880 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17408  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17409  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17410  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17411  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17412  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17413  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17414  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17415  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17416  { 13889 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17417  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17418  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17419  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17420  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17421  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17422  { 13889 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17423  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17424  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17425  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17426  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17427  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17428  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17429  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17430  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17431  { 13898 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17432  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17433  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17434  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17435  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17436  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17437  { 13898 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17438  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17439  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17440  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17441  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17442  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17443  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17444  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17445  { 13907 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17446  { 13907 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17447  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17448  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17449  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17450  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17451  { 13907 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17452  { 13907 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17453  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17454  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17455  { 13907 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17456  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17457  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17458  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17459  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17460  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17461  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17462  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17463  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17464  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17465  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17466  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17467  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17468  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17469  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17470  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17471  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17472  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17473  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17474  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17475  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17476  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17477  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17478  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17479  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17480  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17481  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17482  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17483  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
17484  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
17485  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
17486  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
17487  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
17488  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17489  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17490  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17491  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17492  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17493  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17494  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17495  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17497  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17498  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17499  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17500  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17501  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17502  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17503  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17504  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17505  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17506  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17507  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17508  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17509  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17510  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17511  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17512  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17513  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17514  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17515  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17516  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17517  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17518  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17519  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17520  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17521  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17522  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17523  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17524  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17525  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17526  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17527  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17528  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17529  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17530  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17531  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17532  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17533  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17534  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17535  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17536  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17537  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17538  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17539  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17540  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17541  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17542  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17543  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17544  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17545  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17546  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17547  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17548  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17549  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17550  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17551  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17552  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17553  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17554  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17555  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17556  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17557  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17558  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17559  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17560  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17561  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17562  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17563  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17564  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17565  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17566  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17567  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17568  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17569  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17570  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17571  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17572  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17573  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17574  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17575  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17576  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17577  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17578  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17579  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17580  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17581  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17582  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17583  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17584  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17585  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17586  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17587  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17588  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17589  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17590  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17591  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17592  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17593  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17594  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17595  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17596  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17597  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17598  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17599  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17600  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17601  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17602  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17603  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17604  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17605  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17606  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17607  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17608  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17609  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17610  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17611  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17612  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17614  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17615  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17616  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17617  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17618  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17619  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17620  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17621  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17622  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17623  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17624  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17625  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17626  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17627  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17628  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17629  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17630  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17631  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17632  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17633  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17634  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17635  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17636  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17637  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17638  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17639  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17640  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17641  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17642  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17643  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17644  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17645  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17646  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17647  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17648  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17649  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17650  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17651  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17652  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17653  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17654  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17655  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17656  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17657  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17658  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17659  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17660  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17661  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17662  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17663  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17664  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17665  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17666  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17667  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17668  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17669  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17670  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17671  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17672  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17673  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17674  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17675  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17676  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17677  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17678  { 14036 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17679  { 14036 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17680  { 14036 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17681  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17682  { 14045 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17683  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17684  { 14045 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17685  { 14045 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17686  { 14045 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17687  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17688  { 14045 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17689  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17690  { 14045 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17691  { 14045 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17692  { 14045 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17693  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17694  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17695  { 14045 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17696  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17697  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17698  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17699  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17700  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17701  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17702  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17703  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17704  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17705  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17706  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17707  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17708  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17709  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17710  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17711  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17712  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17713  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17714  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17715  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17716  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17717  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17718  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17719  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17720  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17721  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17722  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17723  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
17724  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
17725  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
17726  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
17727  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
17728  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17729  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17730  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17731  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17732  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17733  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17734  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17735  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17736  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17737  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17738  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17739  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17740  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17741  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17742  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17743  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17744  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17745  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17746  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17747  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17748  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17749  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17750  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17751  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17752  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17753  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17754  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17755  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17756  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17757  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17758  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17759  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17760  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17761  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17762  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17763  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17764  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17765  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17766  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17767  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17768  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17769  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17770  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17771  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17772  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17773  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17774  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17775  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17776  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17777  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17778  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17779  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17780  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17781  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17782  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17783  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17784  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17785  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17786  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17787  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17788  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17789  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17790  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17791  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17792  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17793  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17794  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17795  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17796  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17797  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17798  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17799  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17800  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17801  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17802  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17803  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17804  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17805  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17806  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17807  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17808  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17809  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17810  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17811  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17812  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17813  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17814  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17815  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17816  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17817  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17818  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17819  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17820  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17821  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17822  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17823  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17824  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17825  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17826  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17827  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17828  { 14113 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17829  { 14113 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17830  { 14113 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17831  { 14113 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17832  { 14113 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17833  { 14113 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17834  { 14113 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17835  { 14113 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17836  { 14113 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17837  { 14113 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17838  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17839  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17840  { 14113 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17841  { 14113 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17842  { 14113 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17843  { 14113 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17844  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17845  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17846  { 14113 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17847  { 14113 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17848  { 14113 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17849  { 14113 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17850  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17851  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17852  { 14113 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17853  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17854  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17855  { 14113 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17856  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17857  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17858  { 14113 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17859  { 14121 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17860  { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17861  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17862  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17863  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17864  { 14121 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17865  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17866  { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17867  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17868  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17869  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17870  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17871  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17872  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17873  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17874  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17875  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17876  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17877  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17878  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17879  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17880  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17881  { 14131 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17882  { 14131 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17883  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17884  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17885  { 14131 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17886  { 14131 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17887  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17888  { 14131 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17889  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17890  { 14131 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17891  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17892  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17893  { 14131 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17894  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17895  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17896  { 14131 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17897  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17898  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17899  { 14131 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17900  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17901  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17902  { 14131 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17903  { 14140 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17904  { 14140 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17905  { 14140 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17906  { 14140 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17907  { 14140 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17908  { 14140 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17909  { 14140 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17910  { 14140 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17911  { 14140 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17912  { 14140 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17913  { 14140 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17914  { 14140 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17915  { 14140 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17916  { 14140 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17917  { 14140 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17918  { 14140 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17919  { 14140 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17920  { 14140 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17921  { 14140 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17922  { 14140 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17923  { 14140 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17924  { 14140 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17925  { 14148 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17926  { 14148 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17927  { 14148 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17928  { 14148 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17929  { 14148 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17930  { 14148 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17931  { 14148 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17932  { 14148 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17933  { 14148 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17934  { 14148 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17935  { 14148 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17936  { 14148 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17937  { 14148 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17938  { 14148 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17939  { 14148 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17940  { 14148 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17941  { 14148 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17942  { 14148 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17943  { 14148 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17944  { 14148 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17945  { 14148 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17946  { 14148 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17947  { 14148 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17948  { 14148 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17949  { 14148 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17950  { 14148 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17951  { 14148 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17952  { 14148 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17953  { 14148 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17954  { 14148 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17955  { 14148 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17956  { 14156 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17957  { 14156 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17958  { 14156 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17959  { 14156 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17960  { 14156 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17961  { 14156 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17962  { 14156 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17963  { 14156 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17964  { 14156 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17965  { 14156 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17966  { 14156 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17967  { 14156 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17968  { 14156 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17969  { 14156 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17970  { 14156 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17971  { 14156 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17972  { 14156 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17973  { 14156 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17974  { 14156 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17975  { 14156 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17976  { 14156 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17977  { 14156 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17978  { 14156 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17979  { 14156 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17980  { 14156 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17981  { 14156 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17982  { 14156 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17983  { 14164 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17984  { 14164 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17985  { 14164 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17986  { 14164 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17987  { 14164 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17988  { 14164 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17989  { 14164 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17990  { 14164 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17991  { 14164 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17992  { 14164 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17993  { 14164 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17994  { 14164 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17995  { 14164 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17996  { 14164 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17997  { 14164 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17998  { 14164 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17999  { 14164 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18000  { 14164 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18001  { 14164 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18002  { 14164 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18003  { 14164 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18004  { 14164 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18005  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18006  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18007  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18008  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18009  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18010  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18011  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18012  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18013  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18014  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18015  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18016  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18017  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18018  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18019  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18020  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18021  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18022  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18023  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18024  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18025  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18026  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18027  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18028  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18029  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18031  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18032  { 14187 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18033  { 14187 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18034  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18035  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18036  { 14187 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18037  { 14187 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18038  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18039  { 14187 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18040  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18041  { 14187 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18042  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18043  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18044  { 14187 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18045  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18046  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18047  { 14187 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18048  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18049  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18050  { 14187 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18051  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18052  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18053  { 14187 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18054  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18055  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18056  { 14187 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18057  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18058  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18059  { 14187 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18060  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18061  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18062  { 14187 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18063  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18064  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18065  { 14196 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18066  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18067  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18068  { 14196 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18069  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18070  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18071  { 14196 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18072  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18073  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18074  { 14196 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18075  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18076  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18077  { 14196 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18078  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18079  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18080  { 14196 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18081  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18082  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18083  { 14205 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18084  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18085  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18086  { 14205 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18087  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18088  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18089  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18090  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18091  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18092  { 14205 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18093  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18094  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18095  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18096  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18097  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18098  { 14205 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18099  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18100  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18101  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18102  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18103  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18104  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18105  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18106  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18107  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18108  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18109  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18110  { 14214 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18111  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18112  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18113  { 14214 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18114  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18115  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18116  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18117  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18118  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18119  { 14214 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18120  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18121  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18122  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18123  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18124  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18125  { 14214 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18126  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18127  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18128  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18129  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18130  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18131  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18132  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18133  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18134  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18135  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18136  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18137  { 14223 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18138  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18139  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18140  { 14223 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18141  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18142  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18143  { 14223 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18144  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18145  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18146  { 14223 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18147  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18148  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18149  { 14223 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18150  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18151  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18152  { 14223 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18153  { 14232 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18154  { 14232 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18155  { 14232 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18156  { 14232 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18157  { 14237 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18158  { 14237 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18159  { 14237 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18160  { 14237 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18161  { 14237 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18162  { 14237 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18163  { 14237 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18164  { 14237 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18165  { 14237 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18166  { 14237 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18167  { 14237 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18168  { 14237 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18169  { 14237 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18170  { 14237 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18171  { 14237 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18172  { 14237 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18173  { 14237 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18174  { 14237 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18175  { 14237 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18176  { 14237 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18177  { 14237 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18178  { 14237 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18179  { 14237 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18180  { 14237 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18181  { 14237 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18182  { 14237 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18183  { 14237 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18184  { 14243 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18185  { 14243 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18186  { 14243 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18187  { 14243 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18188  { 14243 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18189  { 14243 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18190  { 14243 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18191  { 14243 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18192  { 14243 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18193  { 14243 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18194  { 14243 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18195  { 14243 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18196  { 14243 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18197  { 14243 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18198  { 14243 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18199  { 14243 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18200  { 14243 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18201  { 14243 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18202  { 14243 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18203  { 14243 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18204  { 14243 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18205  { 14243 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18206  { 14243 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18207  { 14243 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18208  { 14243 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209  { 14243 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18210  { 14243 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18211  { 14249 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18212  { 14249 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18213  { 14249 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18214  { 14256 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18215  { 14256 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18216  { 14256 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18217  { 14256 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18218  { 14256 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18219  { 14256 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18220  { 14256 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18221  { 14256 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18222  { 14256 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18223  { 14256 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18224  { 14256 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18225  { 14256 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18226  { 14256 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18227  { 14256 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228  { 14256 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18229  { 14256 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18230  { 14256 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18231  { 14256 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18232  { 14256 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18233  { 14256 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234  { 14256 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18235  { 14256 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18236  { 14256 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18237  { 14256 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18238  { 14256 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18239  { 14256 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18240  { 14256 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18241  { 14263 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18242  { 14263 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18243  { 14263 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18244  { 14263 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18245  { 14263 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18246  { 14263 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18247  { 14263 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18248  { 14263 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18249  { 14263 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18250  { 14263 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18251  { 14263 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18252  { 14263 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18253  { 14263 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18254  { 14263 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255  { 14263 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18256  { 14263 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18257  { 14263 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18258  { 14263 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18259  { 14263 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18260  { 14263 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261  { 14263 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18262  { 14263 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18263  { 14263 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18264  { 14263 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18265  { 14263 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18266  { 14263 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18267  { 14263 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18268  { 14270 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18269  { 14270 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18270  { 14270 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18271  { 14270 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18272  { 14270 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18273  { 14270 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18274  { 14270 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18275  { 14270 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18276  { 14270 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18277  { 14270 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18278  { 14270 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18279  { 14270 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18280  { 14270 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18281  { 14270 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18282  { 14270 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283  { 14270 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18284  { 14270 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18285  { 14270 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18286  { 14270 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18287  { 14270 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18288  { 14270 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18289  { 14270 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18290  { 14270 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18291  { 14270 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18292  { 14270 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18293  { 14270 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18294  { 14270 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18295  { 14278 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18296  { 14278 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18297  { 14278 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18298  { 14278 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18299  { 14278 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18300  { 14278 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18301  { 14278 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18302  { 14278 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18303  { 14278 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18304  { 14278 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18305  { 14278 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18306  { 14278 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18307  { 14278 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18308  { 14278 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18309  { 14278 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18310  { 14278 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18311  { 14278 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18312  { 14278 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18313  { 14278 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18314  { 14278 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18315  { 14278 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18316  { 14278 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18317  { 14278 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18318  { 14278 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18319  { 14278 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18320  { 14278 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18321  { 14278 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18322  { 14286 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18323  { 14286 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18324  { 14286 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18325  { 14286 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18326  { 14286 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18327  { 14286 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18328  { 14286 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18329  { 14286 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18330  { 14286 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18331  { 14286 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18332  { 14286 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18333  { 14286 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18334  { 14286 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18335  { 14286 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18336  { 14286 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18337  { 14286 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18338  { 14286 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18339  { 14286 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18340  { 14286 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18341  { 14286 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18342  { 14286 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18343  { 14286 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18344  { 14286 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18345  { 14286 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18346  { 14286 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18347  { 14286 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18348  { 14286 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18349  { 14293 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18350  { 14293 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18351  { 14293 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18352  { 14293 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18353  { 14293 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18354  { 14293 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18355  { 14293 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18356  { 14293 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18357  { 14293 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18358  { 14293 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18359  { 14293 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18360  { 14293 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18361  { 14293 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18362  { 14293 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18363  { 14293 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18364  { 14293 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18365  { 14293 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18366  { 14293 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18367  { 14293 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18368  { 14293 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18369  { 14293 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18370  { 14293 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18371  { 14293 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18372  { 14293 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18373  { 14293 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18374  { 14293 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18375  { 14293 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18376  { 14300 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18377  { 14300 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18378  { 14300 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18379  { 14300 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18380  { 14300 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18381  { 14300 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18382  { 14300 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18383  { 14300 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18384  { 14300 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18385  { 14300 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18386  { 14300 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18387  { 14300 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18388  { 14300 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18389  { 14300 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18390  { 14300 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18391  { 14300 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18392  { 14300 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18393  { 14300 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18394  { 14300 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18395  { 14300 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18396  { 14300 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18397  { 14300 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18398  { 14300 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18399  { 14300 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18400  { 14300 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18401  { 14300 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18402  { 14300 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18403  { 14308 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18404  { 14308 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18405  { 14308 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18406  { 14308 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18407  { 14308 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18408  { 14308 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18409  { 14308 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18410  { 14308 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18411  { 14308 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18412  { 14308 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18413  { 14308 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18414  { 14308 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18415  { 14308 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18416  { 14308 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18417  { 14308 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18418  { 14308 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18419  { 14308 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18420  { 14308 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18421  { 14308 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18422  { 14308 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18423  { 14308 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18424  { 14308 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18425  { 14308 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18426  { 14308 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18427  { 14308 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18428  { 14308 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18429  { 14308 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18430  { 14316 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18431  { 14316 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18432  { 14316 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18433  { 14316 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18434  { 14316 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18435  { 14323 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18436  { 14323 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18437  { 14323 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18438  { 14323 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18439  { 14323 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18440  { 14330 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18441  { 14330 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18442  { 14330 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18443  { 14330 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18444  { 14330 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18445  { 14337 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18446  { 14337 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18447  { 14337 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18448  { 14337 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18449  { 14337 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18450  { 14344 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18451  { 14344 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18452  { 14344 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18453  { 14344 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18454  { 14344 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18455  { 14344 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18456  { 14344 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18457  { 14344 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18458  { 14344 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18459  { 14344 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18460  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18461  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18462  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18463  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18464  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18465  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18466  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18467  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18468  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18469  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18470  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18471  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18472  { 14400 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18473  { 14400 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18474  { 14400 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18475  { 14407 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18476  { 14407 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18477  { 14407 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18478  { 14414 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18479  { 14414 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18480  { 14414 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18481  { 14421 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18482  { 14421 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18483  { 14421 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18484  { 14428 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18485  { 14428 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18486  { 14428 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18487  { 14435 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18488  { 14435 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18489  { 14435 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18490  { 14442 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18491  { 14442 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18492  { 14442 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18493  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18494  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18495  { 14442 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18496  { 14442 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18497  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18498  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18499  { 14442 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18500  { 14442 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18501  { 14442 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18502  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18503  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18504  { 14442 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18505  { 14442 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18506  { 14442 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18507  { 14442 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18508  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18509  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18510  { 14442 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18511  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18512  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18513  { 14442 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18514  { 14442 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18515  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18516  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18517  { 14450 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18518  { 14450 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18519  { 14450 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18520  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18521  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18522  { 14450 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18523  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18524  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18525  { 14450 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18526  { 14450 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18527  { 14450 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18528  { 14450 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18529  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18530  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18531  { 14450 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18532  { 14450 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18533  { 14450 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18534  { 14450 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18535  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18536  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18537  { 14450 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18538  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18539  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18540  { 14450 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18541  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18542  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18543  { 14450 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18544  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18545  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18546  { 14458 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18547  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18548  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18549  { 14458 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18550  { 14458 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18551  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18552  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18553  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18554  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18555  { 14458 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18556  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18557  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18558  { 14458 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18559  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18560  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18561  { 14458 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18562  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18563  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18564  { 14458 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18565  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18566  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18567  { 14458 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18568  { 14458 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18569  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18570  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18571  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18572  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18573  { 14467 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18574  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18575  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18576  { 14467 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18577  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18578  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18579  { 14467 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18580  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18581  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18582  { 14467 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18583  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18584  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18585  { 14467 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18586  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18587  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18588  { 14467 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18589  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18590  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18591  { 14467 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18592  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18593  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18594  { 14467 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18595  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18596  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18597  { 14467 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18598  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18599  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18600  { 14476 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18601  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18602  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18603  { 14476 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18604  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18605  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18606  { 14476 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18607  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18608  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18609  { 14476 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18610  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18611  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18612  { 14476 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18613  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18614  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18615  { 14476 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18616  { 14485 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18617  { 14485 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18618  { 14485 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18619  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18620  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18621  { 14485 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18622  { 14485 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18623  { 14485 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18624  { 14485 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18625  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18626  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18627  { 14485 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18628  { 14485 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18629  { 14485 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18630  { 14485 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18631  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18632  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18633  { 14485 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18634  { 14493 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18635  { 14493 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18636  { 14493 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18637  { 14500 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18638  { 14500 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18639  { 14500 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18640  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18641  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18642  { 14507 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18643  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18644  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18645  { 14507 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18646  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18647  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18648  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18649  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18650  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18651  { 14507 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18652  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18653  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18654  { 14507 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18655  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18656  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18657  { 14507 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18658  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18659  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18660  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18661  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18662  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18663  { 14507 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18664  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18665  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18666  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18667  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18668  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18669  { 14515 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18670  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18671  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18672  { 14515 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18673  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18674  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18675  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18676  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18677  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18678  { 14515 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18679  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18680  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18681  { 14515 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18682  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18683  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18684  { 14515 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18685  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18686  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18687  { 14515 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18688  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18689  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18690  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18691  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18692  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18693  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18694  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18695  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18696  { 14523 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18697  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18698  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18699  { 14523 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18700  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18701  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18702  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18703  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18704  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18705  { 14523 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18706  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18707  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18708  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18709  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18710  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18711  { 14523 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18712  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18713  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18714  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18715  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18716  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18717  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18718  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18719  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18720  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18721  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18722  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18723  { 14532 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18724  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18725  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18726  { 14532 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18727  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18728  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18729  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18730  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18731  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18732  { 14532 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18733  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18734  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18735  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18736  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18737  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18738  { 14532 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18739  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18740  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18741  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18742  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18743  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18744  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18745  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18746  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18747  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18748  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18749  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18750  { 14541 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18751  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18752  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18753  { 14541 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18754  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18755  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18756  { 14541 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18757  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18758  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18759  { 14541 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18760  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18761  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18762  { 14541 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18763  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18764  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18765  { 14541 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18766  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18767  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18768  { 14550 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18769  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18770  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18771  { 14550 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18772  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18773  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18774  { 14550 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18775  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18776  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18777  { 14550 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18778  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18779  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18780  { 14550 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18781  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18782  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18783  { 14550 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18784  { 14558 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18785  { 14558 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18786  { 14558 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18787  { 14558 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18788  { 14558 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18789  { 14558 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18790  { 14558 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18791  { 14558 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18792  { 14558 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18793  { 14558 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18794  { 14558 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18795  { 14558 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18796  { 14558 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18797  { 14558 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18798  { 14558 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18799  { 14558 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18800  { 14558 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18801  { 14558 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18802  { 14558 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18803  { 14558 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18804  { 14558 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18805  { 14558 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18806  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
18807  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
18808  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
18809  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
18810  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
18811  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
18812  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18813  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18814  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18815  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18816  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18817  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18818  { 14579 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18819  { 14579 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18820  { 14579 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18821  { 14579 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18822  { 14579 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18823  { 14579 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18824  { 14579 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18825  { 14579 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18826  { 14579 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18827  { 14579 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18828  { 14579 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18829  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18830  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18831  { 14579 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18832  { 14579 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18833  { 14579 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18834  { 14579 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18835  { 14579 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18836  { 14579 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18837  { 14579 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18838  { 14579 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18839  { 14579 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18840  { 14579 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18841  { 14579 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18842  { 14579 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18843  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18844  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18845  { 14579 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18846  { 14579 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18847  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18848  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18849  { 14587 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18850  { 14587 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18851  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18852  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18853  { 14587 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18854  { 14587 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18855  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18856  { 14587 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18857  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18858  { 14587 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18859  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18860  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18861  { 14587 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18862  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18863  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18864  { 14587 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18865  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18866  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18867  { 14587 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18868  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18869  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18870  { 14587 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18871  { 14596 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18872  { 14596 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18873  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18874  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18875  { 14596 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18876  { 14596 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18877  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18878  { 14596 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18879  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18880  { 14596 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18881  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18882  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18883  { 14596 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18884  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18885  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18886  { 14596 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18887  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18888  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18889  { 14596 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18890  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18891  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18892  { 14596 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18893  { 14605 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18894  { 14605 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18895  { 14605 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18896  { 14605 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18897  { 14613 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18898  { 14613 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18899  { 14613 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18900  { 14613 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18901  { 14621 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18902  { 14621 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18903  { 14621 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18904  { 14621 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18905  { 14629 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18906  { 14629 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
18907  { 14629 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18908  { 14629 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
18909  { 14629 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
18910  { 14629 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18911  { 14629 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18912  { 14629 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18913  { 14629 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18914  { 14629 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18915  { 14629 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18916  { 14629 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18917  { 14629 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18918  { 14629 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18919  { 14629 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
18920  { 14629 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18921  { 14629 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
18922  { 14629 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
18923  { 14629 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18924  { 14629 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18925  { 14629 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18926  { 14629 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18927  { 14629 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18928  { 14629 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18929  { 14629 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18930  { 14629 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18931  { 14629 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18932  { 14629 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18933  { 14629 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18934  { 14629 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18935  { 14629 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18936  { 14629 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18937  { 14629 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18938  { 14629 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18939  { 14629 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18940  { 14629 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18941  { 14629 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18942  { 14629 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18943  { 14629 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18944  { 14629 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18945  { 14629 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18946  { 14629 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18947  { 14629 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18948  { 14629 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18949  { 14629 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18950  { 14629 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18951  { 14629 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18952  { 14629 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18953  { 14629 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18954  { 14629 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18955  { 14629 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18956  { 14636 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18957  { 14636 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18958  { 14636 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18959  { 14636 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18960  { 14636 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18961  { 14636 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18962  { 14636 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18963  { 14636 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18964  { 14644 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18965  { 14644 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
18966  { 14644 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18967  { 14644 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
18968  { 14644 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
18969  { 14644 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18970  { 14644 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18971  { 14644 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18972  { 14644 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18973  { 14644 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18974  { 14644 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18975  { 14644 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18976  { 14644 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18977  { 14644 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18978  { 14644 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
18979  { 14644 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18980  { 14644 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
18981  { 14644 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
18982  { 14644 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18983  { 14644 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18984  { 14644 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18985  { 14644 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18986  { 14644 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18987  { 14644 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18988  { 14644 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18989  { 14644 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18990  { 14644 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18991  { 14644 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18992  { 14644 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18993  { 14644 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18994  { 14644 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18995  { 14644 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18996  { 14644 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18997  { 14644 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18998  { 14644 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18999  { 14644 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19000  { 14644 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19001  { 14644 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19002  { 14644 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19003  { 14644 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004  { 14644 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19005  { 14644 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19006  { 14644 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19007  { 14644 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19008  { 14644 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19009  { 14644 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19010  { 14644 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19011  { 14644 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19012  { 14644 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19013  { 14644 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19014  { 14644 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19015  { 14651 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19016  { 14651 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19017  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19018  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19019  { 14651 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19020  { 14651 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19021  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19022  { 14651 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19023  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19024  { 14651 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19025  { 14651 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19026  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19027  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19028  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19029  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19030  { 14651 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19031  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19032  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19033  { 14651 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19034  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19035  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19036  { 14651 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19037  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19038  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19039  { 14651 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19040  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19041  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042  { 14651 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19043  { 14651 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19044  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19045  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19046  { 14659 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19047  { 14659 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19048  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19049  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19050  { 14659 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19051  { 14659 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19052  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19053  { 14659 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19054  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19055  { 14659 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19056  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19057  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19058  { 14659 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19059  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19060  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19061  { 14659 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19062  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19063  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19064  { 14659 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19065  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19066  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19067  { 14659 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19068  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19069  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19070  { 14659 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19071  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19072  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19073  { 14659 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19074  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19075  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19076  { 14659 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19077  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19078  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19079  { 14667 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19080  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19081  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19082  { 14667 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19083  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19084  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19085  { 14667 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19086  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19087  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19088  { 14667 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19089  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19090  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19091  { 14667 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19092  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19093  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19094  { 14667 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19095  { 14675 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19096  { 14675 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19097  { 14675 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19098  { 14675 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19099  { 14675 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19100  { 14675 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19101  { 14675 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19102  { 14675 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19103  { 14675 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19104  { 14675 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19105  { 14675 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19106  { 14675 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19107  { 14675 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19108  { 14675 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19109  { 14675 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19110  { 14675 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19111  { 14675 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19112  { 14675 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19113  { 14675 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19114  { 14675 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19115  { 14675 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19116  { 14675 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19117  { 14675 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19118  { 14675 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19119  { 14675 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19120  { 14675 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19121  { 14675 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19122  { 14675 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19123  { 14675 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19124  { 14675 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19125  { 14675 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19126  { 14675 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19127  { 14675 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19128  { 14675 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19129  { 14675 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19130  { 14675 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19131  { 14675 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19132  { 14675 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19133  { 14675 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19134  { 14675 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19135  { 14675 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19136  { 14675 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19137  { 14682 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19138  { 14682 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19139  { 14682 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19140  { 14682 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19141  { 14682 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19142  { 14682 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19143  { 14682 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19144  { 14682 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19145  { 14682 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19146  { 14682 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19147  { 14682 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19148  { 14682 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19149  { 14682 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19150  { 14682 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19151  { 14682 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19152  { 14682 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19153  { 14682 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19154  { 14682 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19155  { 14682 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19156  { 14682 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19157  { 14682 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19158  { 14682 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19159  { 14682 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19160  { 14682 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19161  { 14682 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19162  { 14682 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19163  { 14682 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19164  { 14682 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19165  { 14682 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19166  { 14682 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19167  { 14682 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19168  { 14682 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19169  { 14682 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19170  { 14682 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19171  { 14682 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19172  { 14682 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19173  { 14682 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19174  { 14682 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19175  { 14682 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19176  { 14682 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19177  { 14682 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19178  { 14682 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19179  { 14682 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19180  { 14682 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19181  { 14682 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19182  { 14682 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19183  { 14682 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19184  { 14682 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19185  { 14682 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19186  { 14682 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19187  { 14682 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19188  { 14689 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19189  { 14689 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19190  { 14689 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19191  { 14689 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19192  { 14689 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19193  { 14689 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19194  { 14689 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19195  { 14689 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19196  { 14689 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19197  { 14689 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19198  { 14689 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19199  { 14689 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19200  { 14689 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19201  { 14689 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19202  { 14689 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19203  { 14689 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19204  { 14689 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19205  { 14689 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19206  { 14689 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19207  { 14689 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19208  { 14689 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19209  { 14689 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19210  { 14689 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19211  { 14689 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19212  { 14689 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19213  { 14689 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19214  { 14689 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19215  { 14689 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19216  { 14689 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19217  { 14689 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19218  { 14689 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19219  { 14689 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19220  { 14689 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19221  { 14689 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19222  { 14689 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19223  { 14689 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19224  { 14689 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19225  { 14689 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19226  { 14689 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19227  { 14689 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19228  { 14689 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19229  { 14689 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19230  { 14689 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19231  { 14689 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19232  { 14689 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19233  { 14696 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19234  { 14696 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19235  { 14696 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19236  { 14696 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19237  { 14696 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19238  { 14696 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19239  { 14696 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19240  { 14696 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19241  { 14696 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19242  { 14696 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19243  { 14696 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19244  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19245  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19246  { 14696 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19247  { 14696 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19248  { 14696 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19249  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19250  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19251  { 14696 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19252  { 14696 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19253  { 14696 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19254  { 14696 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19255  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19256  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19257  { 14696 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19258  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19259  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19260  { 14696 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19261  { 14696 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19262  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19263  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19264  { 14704 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19265  { 14704 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19266  { 14704 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19267  { 14704 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19268  { 14704 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19269  { 14704 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19270  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19271  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19272  { 14704 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19273  { 14704 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19274  { 14704 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19275  { 14704 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19276  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19277  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19278  { 14704 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19279  { 14704 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19280  { 14704 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19281  { 14704 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19282  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19283  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19284  { 14704 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19285  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19286  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19287  { 14704 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19288  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19289  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19290  { 14704 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19291  { 14712 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19292  { 14712 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19293  { 14712 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19294  { 14712 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19295  { 14712 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19296  { 14712 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19297  { 14712 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19298  { 14712 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19299  { 14712 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19300  { 14712 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19301  { 14712 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19302  { 14712 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19303  { 14712 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19304  { 14712 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19305  { 14712 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19306  { 14712 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19307  { 14712 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19308  { 14712 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19309  { 14720 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19310  { 14720 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19311  { 14720 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19312  { 14720 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19313  { 14720 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19314  { 14720 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19315  { 14720 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19316  { 14720 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19317  { 14720 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19318  { 14720 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19319  { 14720 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19320  { 14720 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19321  { 14720 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19322  { 14720 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19323  { 14720 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19324  { 14720 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19325  { 14720 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19326  { 14720 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19327  { 14720 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19328  { 14720 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19329  { 14720 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19330  { 14720 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19331  { 14720 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19332  { 14720 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19333  { 14720 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19334  { 14720 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19335  { 14720 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19336  { 14720 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19337  { 14720 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19338  { 14720 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19339  { 14720 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19340  { 14720 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19341  { 14720 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19342  { 14720 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19343  { 14720 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19344  { 14720 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19345  { 14720 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19346  { 14720 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19347  { 14720 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19348  { 14720 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19349  { 14720 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19350  { 14720 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19351  { 14727 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19352  { 14727 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19353  { 14727 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19354  { 14727 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19355  { 14727 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19356  { 14727 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19357  { 14727 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19358  { 14727 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19359  { 14727 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19360  { 14727 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19361  { 14727 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19362  { 14727 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19363  { 14727 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19364  { 14727 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19365  { 14727 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19366  { 14727 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19367  { 14727 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19368  { 14727 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19369  { 14727 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19370  { 14727 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19371  { 14727 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19372  { 14727 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19373  { 14727 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19374  { 14727 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19375  { 14727 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19376  { 14727 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19377  { 14727 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19378  { 14727 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19379  { 14727 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19380  { 14727 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19381  { 14727 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19382  { 14727 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19383  { 14727 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19384  { 14727 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19385  { 14727 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19386  { 14727 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19387  { 14727 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19388  { 14727 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19389  { 14727 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19390  { 14727 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19391  { 14727 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19392  { 14727 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19393  { 14727 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19394  { 14727 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19395  { 14727 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19396  { 14727 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19397  { 14727 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19398  { 14727 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19399  { 14727 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19400  { 14727 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19401  { 14727 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19402  { 14734 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19403  { 14734 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19404  { 14734 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19405  { 14734 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19406  { 14734 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19407  { 14734 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19408  { 14734 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19409  { 14734 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19410  { 14742 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19411  { 14742 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19412  { 14742 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19413  { 14742 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19414  { 14742 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19415  { 14742 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19416  { 14742 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19417  { 14742 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19418  { 14742 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19419  { 14742 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19420  { 14742 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19421  { 14742 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19422  { 14742 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19423  { 14742 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19424  { 14742 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19425  { 14742 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19426  { 14742 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19427  { 14742 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19428  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19429  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19430  { 14742 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19431  { 14742 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19432  { 14742 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433  { 14742 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19434  { 14742 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19435  { 14742 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19436  { 14742 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19437  { 14742 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19438  { 14742 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19439  { 14742 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19440  { 14742 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19441  { 14742 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19442  { 14742 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19443  { 14742 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19444  { 14742 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19445  { 14742 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19446  { 14742 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19447  { 14742 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19448  { 14742 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19449  { 14742 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19450  { 14742 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19451  { 14742 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19452  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19453  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19454  { 14742 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19455  { 14742 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19456  { 14742 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19457  { 14742 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19458  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19459  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19460  { 14742 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19461  { 14749 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19462  { 14749 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19463  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19464  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19465  { 14749 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19466  { 14749 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19467  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19468  { 14749 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19469  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19470  { 14749 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19471  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19472  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19473  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19474  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19475  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19476  { 14749 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19477  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19478  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19479  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19480  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19481  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19482  { 14749 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19483  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19484  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19485  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19486  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19487  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19488  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19489  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19490  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19491  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19492  { 14757 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19493  { 14757 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19494  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19495  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19496  { 14757 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19497  { 14757 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19498  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19499  { 14757 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19500  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19501  { 14757 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19502  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19503  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19504  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19505  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19506  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19507  { 14757 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19508  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19509  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19510  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19511  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19512  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19513  { 14757 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19514  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19515  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19516  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19517  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19518  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19519  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19520  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19521  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19522  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19523  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19524  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19525  { 14765 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19526  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19527  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19528  { 14765 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19529  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19530  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19531  { 14765 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19532  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19533  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19534  { 14765 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19535  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19536  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19537  { 14765 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19538  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19539  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19540  { 14765 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19541  { 14773 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19542  { 14773 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19543  { 14773 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19544  { 14773 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19545  { 14773 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19546  { 14773 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19547  { 14773 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19548  { 14773 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19549  { 14773 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19550  { 14773 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19551  { 14773 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19552  { 14773 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19553  { 14773 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19554  { 14773 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19555  { 14773 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19556  { 14773 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19557  { 14773 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19558  { 14773 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19559  { 14773 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19560  { 14773 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19561  { 14773 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19562  { 14773 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19563  { 14773 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19564  { 14773 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19565  { 14773 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19566  { 14773 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19567  { 14773 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19568  { 14773 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19569  { 14773 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19570  { 14773 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19571  { 14773 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19572  { 14773 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19573  { 14773 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19574  { 14773 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19575  { 14773 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19576  { 14773 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19577  { 14773 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19578  { 14773 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19579  { 14773 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19580  { 14773 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19581  { 14773 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19582  { 14773 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19583  { 14780 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19584  { 14780 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19585  { 14780 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19586  { 14780 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19587  { 14780 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19588  { 14780 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19589  { 14780 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19590  { 14780 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19591  { 14780 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19592  { 14780 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19593  { 14780 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19594  { 14780 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19595  { 14780 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19596  { 14780 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19597  { 14780 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19598  { 14780 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19599  { 14780 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19600  { 14780 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19601  { 14780 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19602  { 14780 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19603  { 14780 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19604  { 14780 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19605  { 14787 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19606  { 14787 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19607  { 14787 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19608  { 14787 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19609  { 14787 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19610  { 14787 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19611  { 14787 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19612  { 14787 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19613  { 14787 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19614  { 14787 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19615  { 14787 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19616  { 14787 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19617  { 14787 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19618  { 14787 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19619  { 14787 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19620  { 14787 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19621  { 14787 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19622  { 14787 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19623  { 14787 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19624  { 14787 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19625  { 14787 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19626  { 14787 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19627  { 14787 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19628  { 14787 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19629  { 14787 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19630  { 14787 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19631  { 14787 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19632  { 14787 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19633  { 14787 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19634  { 14787 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19635  { 14787 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19636  { 14794 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19637  { 14794 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19638  { 14794 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19639  { 14794 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19640  { 14794 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19641  { 14794 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19642  { 14794 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19643  { 14794 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19644  { 14794 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19645  { 14794 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19646  { 14794 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19647  { 14794 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19648  { 14794 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19649  { 14794 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19650  { 14794 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19651  { 14794 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19652  { 14794 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19653  { 14794 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19654  { 14794 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19655  { 14794 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19656  { 14794 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19657  { 14794 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19658  { 14794 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19659  { 14794 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19660  { 14794 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19661  { 14794 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19662  { 14794 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19663  { 14794 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19664  { 14794 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19665  { 14794 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19666  { 14794 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19667  { 14801 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19668  { 14801 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19669  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19670  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19671  { 14801 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19672  { 14801 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19673  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19674  { 14801 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19675  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19676  { 14801 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19677  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19678  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19679  { 14801 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19680  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19681  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19682  { 14801 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19683  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19684  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19685  { 14801 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19686  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19687  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19688  { 14801 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19689  { 14809 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19690  { 14809 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19691  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19692  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19693  { 14809 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19694  { 14809 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19695  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19696  { 14809 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19697  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19698  { 14809 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19699  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19700  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19701  { 14809 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19702  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19703  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19704  { 14809 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19705  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19706  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19707  { 14809 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19708  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19709  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19710  { 14809 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19711  { 14817 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19712  { 14817 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19713  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19714  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19715  { 14817 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19716  { 14817 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19717  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19718  { 14817 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19719  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19720  { 14817 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19721  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19722  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19723  { 14817 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19724  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19725  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19726  { 14817 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19727  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19728  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19729  { 14817 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19730  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19731  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19732  { 14817 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19733  { 14826 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19734  { 14826 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19735  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19736  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19737  { 14826 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19738  { 14826 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19739  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19740  { 14826 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19741  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19742  { 14826 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19743  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19744  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19745  { 14826 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19746  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19747  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19748  { 14826 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19749  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19750  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19751  { 14826 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19752  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19753  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19754  { 14826 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19755  { 14835 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19756  { 14835 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19757  { 14835 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19758  { 14835 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19759  { 14835 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19760  { 14835 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19761  { 14835 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19762  { 14835 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19763  { 14835 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19764  { 14835 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19765  { 14835 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19766  { 14835 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19767  { 14835 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19768  { 14835 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19769  { 14835 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19770  { 14835 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19771  { 14835 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19772  { 14835 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19773  { 14835 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19774  { 14835 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19775  { 14835 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19776  { 14835 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19777  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19778  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19779  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19780  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19781  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19782  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19783  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19784  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19785  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19786  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19787  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19788  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19789  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19790  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19791  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19792  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19793  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19794  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19795  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19796  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19797  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19798  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19799  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19800  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19801  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19802  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19803  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19804  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19805  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19806  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19807  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19808  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19809  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19810  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19811  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19812  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19813  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19814  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19815  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19816  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19817  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19818  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19819  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19820  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19821  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19822  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19823  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19824  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19825  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19826  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19827  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19828  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19829  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19830  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19831  { 14864 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
19832  { 14864 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
19833  { 14864 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
19834  { 14864 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
19835  { 14871 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19836  { 14871 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19837  { 14871 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19838  { 14871 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19839  { 14871 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19840  { 14871 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19841  { 14871 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19842  { 14871 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19843  { 14871 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19844  { 14871 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19845  { 14871 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19846  { 14871 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19847  { 14880 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19848  { 14880 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19849  { 14880 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19850  { 14880 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19851  { 14880 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19852  { 14880 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19853  { 14880 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
19854  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
19855  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
19856  { 14880 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19857  { 14880 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19858  { 14880 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19859  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19860  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19861  { 14880 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19862  { 14880 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19863  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19864  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19865  { 14889 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19866  { 14889 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19867  { 14889 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19868  { 14889 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19869  { 14889 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19870  { 14889 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19871  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
19872  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
19873  { 14889 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
19874  { 14889 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19875  { 14889 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19876  { 14889 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19877  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19878  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19879  { 14889 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19880  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19881  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19882  { 14889 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19883  { 14898 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19884  { 14898 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19885  { 14898 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19886  { 14898 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19887  { 14898 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19888  { 14898 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19889  { 14898 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19890  { 14898 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19891  { 14898 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19892  { 14898 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19893  { 14898 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19894  { 14898 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19895  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19896  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19897  { 14907 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19898  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19899  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19900  { 14907 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19901  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19902  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19903  { 14907 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19904  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19905  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19906  { 14907 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19907  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19908  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19909  { 14917 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19910  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19911  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19912  { 14917 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19913  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
19914  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
19915  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
19916  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19917  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19918  { 14917 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19919  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19920  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19921  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19922  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19924  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19925  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19926  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19927  { 14927 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19928  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19929  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19930  { 14927 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19931  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
19932  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
19933  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
19934  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19935  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19936  { 14927 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19937  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19938  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19939  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19940  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19941  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19942  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19943  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19944  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19945  { 14937 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19946  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19947  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19948  { 14937 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19949  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19950  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19951  { 14937 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19952  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19953  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19954  { 14937 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19955  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19956  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19957  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19958  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19959  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19960  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19961  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19962  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19963  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19964  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19965  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19966  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19967  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19968  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19969  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19970  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19971  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19972  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19973  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19974  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19975  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19976  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19977  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19978  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19979  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19980  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19981  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19982  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19983  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19984  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19985  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19986  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19987  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19988  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19989  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19990  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19991  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19992  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19993  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19994  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19995  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19996  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19997  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19998  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19999  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20000  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20001  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20002  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20003  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20004  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20005  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20006  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20007  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20008  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20009  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20010  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20011  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20012  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20013  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20014  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20015  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20016  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20017  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20018  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20019  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20020  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20021  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20022  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20023  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20024  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20025  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20026  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20027  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20028  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20029  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20030  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20031  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20032  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20033  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20034  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20035  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20036  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20037  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20038  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20039  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20040  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20041  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20042  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20043  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20044  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20045  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20046  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20047  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20048  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20049  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20050  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20051  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20052  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20053  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20054  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20055  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20056  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20057  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20058  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20059  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20060  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20061  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20062  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20063  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20064  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20065  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20066  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20067  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20068  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20069  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20070  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20071  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20072  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20073  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20074  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20075  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20076  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20077  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20078  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20079  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20080  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20081  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20082  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20083  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20084  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20085  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20086  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20087  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20088  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20089  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20090  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20091  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20092  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20093  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20094  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20095  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20096  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20097  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20098  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20099  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20100  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20101  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20102  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20103  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20104  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20105  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20106  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20107  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20108  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20109  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20110  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20111  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20112  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20113  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20114  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20115  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20116  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20117  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20118  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20119  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20120  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20121  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20122  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20123  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20124  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20125  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20126  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20127  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20128  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20129  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20130  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20131  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20132  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20133  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20134  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20135  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20136  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20137  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20138  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20139  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20140  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20141  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20142  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20143  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20144  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20145  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20146  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20147  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20148  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20149  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20150  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20151  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20152  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20153  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20154  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20155  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20156  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20157  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20158  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20159  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20160  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20161  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20162  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20163  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20164  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20165  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20166  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20167  { 15037 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20168  { 15037 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20169  { 15037 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20170  { 15037 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20171  { 15043 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20172  { 15043 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20173  { 15043 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20174  { 15043 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20175  { 15043 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20176  { 15043 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20177  { 15043 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20178  { 15043 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20179  { 15043 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20180  { 15043 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20181  { 15043 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20182  { 15043 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20183  { 15043 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20184  { 15043 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20185  { 15043 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20186  { 15043 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20187  { 15043 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20188  { 15043 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20189  { 15043 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20190  { 15043 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20191  { 15043 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20192  { 15043 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20193  { 15043 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20194  { 15043 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20195  { 15043 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20196  { 15043 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20197  { 15043 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20198  { 15050 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20199  { 15050 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20200  { 15050 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20201  { 15050 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20202  { 15050 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20203  { 15050 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20204  { 15050 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20205  { 15050 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20206  { 15050 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20207  { 15050 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20208  { 15050 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20209  { 15050 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20210  { 15050 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20211  { 15050 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20212  { 15050 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20213  { 15050 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20214  { 15050 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20215  { 15050 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20216  { 15050 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20217  { 15050 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20218  { 15050 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20219  { 15050 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20220  { 15050 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20221  { 15050 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20222  { 15050 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20223  { 15050 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20224  { 15050 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20225  { 15057 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20226  { 15057 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20227  { 15057 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20228  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20229  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20230  { 15057 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20231  { 15057 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20232  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20233  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20234  { 15057 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20235  { 15057 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20236  { 15057 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20237  { 15057 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20238  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20239  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20240  { 15057 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20241  { 15057 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20242  { 15057 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20243  { 15057 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20244  { 15057 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20245  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20246  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20247  { 15057 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20248  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20249  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20250  { 15057 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20251  { 15057 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20252  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20253  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20254  { 15057 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20255  { 15066 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20256  { 15066 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20257  { 15066 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20258  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20259  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20260  { 15066 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20261  { 15066 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20262  { 15066 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20263  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20264  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20265  { 15066 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20266  { 15066 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20267  { 15066 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20268  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20269  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20270  { 15066 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20271  { 15066 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20272  { 15066 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20273  { 15066 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20274  { 15066 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20275  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20276  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20277  { 15066 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20278  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20279  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20280  { 15066 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20281  { 15066 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20282  { 15066 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20283  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20284  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20285  { 15075 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20286  { 15075 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20287  { 15075 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20288  { 15075 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20289  { 15075 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20290  { 15075 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20291  { 15075 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20292  { 15075 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20293  { 15075 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20294  { 15084 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20295  { 15084 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20296  { 15084 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20297  { 15084 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20298  { 15084 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20299  { 15084 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20300  { 15084 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20301  { 15084 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20302  { 15084 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20303  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20304  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20305  { 15093 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20306  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20307  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20308  { 15093 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20309  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20310  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20311  { 15093 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20312  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20313  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20314  { 15093 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20315  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20316  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20317  { 15093 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20318  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20319  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20320  { 15093 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20321  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20322  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20323  { 15093 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20324  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20325  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20326  { 15093 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20327  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20328  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20329  { 15093 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20330  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20331  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20332  { 15102 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20333  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20334  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20335  { 15102 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20336  { 15102 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20337  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20338  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20339  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20340  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20341  { 15102 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20342  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20343  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20344  { 15102 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20345  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20346  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20347  { 15102 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20348  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20349  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20350  { 15102 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20351  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20352  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20353  { 15102 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20354  { 15102 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20355  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20356  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20357  { 15111 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20358  { 15111 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20359  { 15111 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20360  { 15111 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20361  { 15111 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20362  { 15111 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20363  { 15120 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20364  { 15120 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20365  { 15120 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20366  { 15120 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20367  { 15120 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20368  { 15120 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20369  { 15129 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20370  { 15129 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20371  { 15129 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20372  { 15129 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20373  { 15129 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20374  { 15129 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20375  { 15129 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20376  { 15129 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20377  { 15129 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20378  { 15129 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20379  { 15129 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20380  { 15129 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20381  { 15138 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20382  { 15138 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20383  { 15138 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20384  { 15138 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20385  { 15138 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20386  { 15138 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20387  { 15138 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20388  { 15138 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20389  { 15138 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20390  { 15138 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20391  { 15138 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20392  { 15138 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20393  { 15147 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20394  { 15147 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20395  { 15147 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20396  { 15147 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20397  { 15147 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20398  { 15147 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20399  { 15147 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20400  { 15147 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20401  { 15147 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20402  { 15156 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20403  { 15156 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20404  { 15156 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20405  { 15156 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20406  { 15156 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20407  { 15156 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20408  { 15156 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20409  { 15156 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20410  { 15156 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20411  { 15165 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20412  { 15165 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20413  { 15165 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20414  { 15165 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20415  { 15172 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20416  { 15172 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20417  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20418  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20419  { 15179 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20420  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20421  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20422  { 15179 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20423  { 15179 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20424  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20425  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20426  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20427  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20428  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20429  { 15179 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20430  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20431  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20432  { 15179 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20433  { 15179 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20434  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20435  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20436  { 15179 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20437  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20438  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20439  { 15179 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20440  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20441  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20442  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20443  { 15179 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20444  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20445  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20446  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20447  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20448  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20449  { 15189 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20450  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20451  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20452  { 15189 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20453  { 15189 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20454  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20455  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20456  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20457  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20458  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20459  { 15189 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20460  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20461  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20462  { 15189 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20463  { 15189 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20464  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20465  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20466  { 15189 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20467  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20468  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20469  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20470  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20471  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20472  { 15189 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20473  { 15189 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20474  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20475  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20476  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20477  { 15199 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20478  { 15199 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20479  { 15199 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20480  { 15199 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20481  { 15199 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20482  { 15199 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20483  { 15199 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20484  { 15199 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20485  { 15199 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20486  { 15209 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20487  { 15209 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20488  { 15209 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20489  { 15209 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20490  { 15209 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20491  { 15209 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20492  { 15209 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20493  { 15209 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20494  { 15209 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20495  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20496  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20497  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20498  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20499  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20500  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20501  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20502  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20503  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20504  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20505  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20506  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20507  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20508  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20509  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20510  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20511  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20512  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20513  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20514  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20515  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20516  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20517  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20518  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20519  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20520  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20521  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20522  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20523  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20524  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20525  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20526  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20527  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20528  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20529  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20530  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20531  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20532  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20533  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20534  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20535  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20536  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20537  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20538  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20539  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20540  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20541  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20542  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20543  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20544  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20545  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20546  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20547  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20548  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20549  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20550  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20551  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20552  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20553  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20554  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20555  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20556  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20557  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20558  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20559  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20560  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20561  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20562  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20563  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20564  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20565  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20566  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20567  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20568  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20569  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20570  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20571  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20572  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20573  { 15267 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20574  { 15267 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20575  { 15267 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20576  { 15267 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20577  { 15276 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20578  { 15276 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20579  { 15276 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20580  { 15276 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20581  { 15285 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20582  { 15285 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
20583  { 15294 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20584  { 15294 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20585  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20586  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20587  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20588  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20589  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20590  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20591  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20592  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20593  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20594  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20595  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20596  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20597  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20598  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20599  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20600  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20601  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20602  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20603  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20604  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20605  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20606  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20607  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20608  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20609  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20610  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20611  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20612  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20613  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20614  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20615  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20616  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20617  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20618  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20619  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20620  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20621  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20622  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20623  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20624  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20625  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20626  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20627  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20628  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20629  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20630  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20631  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20632  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20633  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20634  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20635  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20636  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20637  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20638  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20639  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20640  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20641  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20642  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20643  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20644  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20645  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20646  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20647  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20648  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20649  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20650  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20651  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20652  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20653  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20654  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20655  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20656  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20657  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20659  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20660  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20661  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20662  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20663  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20664  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20665  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20666  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20667  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20668  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20669  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20670  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20671  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20672  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20673  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20674  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20675  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20676  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20677  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20678  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20679  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20680  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20681  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20682  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20683  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20684  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20685  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20686  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20687  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20688  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20689  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20690  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20691  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20692  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20693  { 15391 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20694  { 15391 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20695  { 15391 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20696  { 15391 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20697  { 15400 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20698  { 15400 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20699  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20700  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20701  { 15409 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20702  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20703  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20704  { 15409 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20705  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20706  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20707  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20708  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20709  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20710  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20711  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20712  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20713  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20714  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20715  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20716  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20717  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20718  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20719  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20720  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20721  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20722  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20723  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20724  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20725  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20726  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20727  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20729  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20730  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20731  { 15419 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20732  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20733  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20734  { 15419 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20735  { 15419 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20736  { 15419 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20737  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20738  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20739  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20740  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20741  { 15419 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20742  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20743  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20744  { 15419 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20745  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20746  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20747  { 15419 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20748  { 15419 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20749  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20750  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20751  { 15419 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20752  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20753  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20754  { 15419 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20755  { 15419 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20756  { 15419 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20757  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20758  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20759  { 15429 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20760  { 15429 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20761  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20762  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20763  { 15429 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20764  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20765  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20766  { 15429 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20767  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20768  { 15439 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20769  { 15439 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20770  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20771  { 15439 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20772  { 15439 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20773  { 15439 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20774  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20775  { 15439 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20776  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20777  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20778  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20779  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20780  { 15461 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20781  { 15461 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20782  { 15461 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20783  { 15473 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20784  { 15488 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20785  { 15503 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20786  { 15518 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20787  { 15533 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20788  { 15548 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20789  { 15563 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20790  { 15578 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20791  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20792  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20793  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20794  { 15605 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20795  { 15605 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20796  { 15605 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20797  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20798  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20799  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20800  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20801  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20802  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20803  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20804  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20805  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20806  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20807  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20808  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20809  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20810  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20811  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20812  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20813  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20814  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20815  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20816  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20817  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20818  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20819  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20820  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20821  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20822  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20823  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20824  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20825  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20826  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20827  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20828  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20829  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20830  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20831  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20832  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20833  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20834  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20835  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20836  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20837  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20838  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20839  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20840  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20841  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20842  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20843  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20844  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20845  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20846  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20847  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20848  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20849  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20850  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20851  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20852  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20853  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20854  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20855  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20856  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20857  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20858  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20859  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20860  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20861  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20862  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20863  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20864  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20865  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20866  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20867  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20868  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20869  { 15661 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20870  { 15661 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
20871  { 15661 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20872  { 15661 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20873  { 15661 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20874  { 15661 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20875  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20876  { 15661 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20877  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20878  { 15661 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20879  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20880  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20881  { 15661 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20882  { 15661 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20883  { 15661 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20884  { 15661 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20885  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20886  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20887  { 15661 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20888  { 15661 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20889  { 15661 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20890  { 15661 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20891  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20892  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20893  { 15661 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20894  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20895  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20896  { 15661 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20897  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20898  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20899  { 15661 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20900  { 15669 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20901  { 15669 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
20902  { 15669 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20903  { 15669 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20904  { 15669 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20905  { 15669 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20906  { 15669 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20907  { 15669 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20908  { 15669 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20909  { 15669 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20910  { 15669 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20911  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20912  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20913  { 15669 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20914  { 15669 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20915  { 15669 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20916  { 15669 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20917  { 15669 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20918  { 15669 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20919  { 15669 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20920  { 15669 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921  { 15669 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20922  { 15669 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20923  { 15669 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20924  { 15669 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20925  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20926  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20927  { 15669 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20928  { 15669 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20929  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20930  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20931  { 15677 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20932  { 15677 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20933  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20934  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20935  { 15677 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20936  { 15677 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20937  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20938  { 15677 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20939  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20940  { 15677 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20941  { 15677 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
20942  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20943  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20944  { 15677 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20945  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20946  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20947  { 15677 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20948  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20949  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20950  { 15677 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20951  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20952  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20953  { 15677 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20954  { 15677 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20955  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20956  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20957  { 15677 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20958  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20959  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20960  { 15677 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20961  { 15677 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20962  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20963  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20964  { 15677 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20965  { 15685 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20966  { 15685 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20967  { 15685 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20968  { 15685 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20969  { 15685 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20970  { 15685 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20971  { 15685 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20972  { 15685 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20973  { 15685 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20974  { 15685 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20975  { 15685 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
20976  { 15685 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20977  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20978  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20979  { 15685 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20980  { 15685 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20981  { 15685 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20982  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20983  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20984  { 15685 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20985  { 15685 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20986  { 15685 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20987  { 15685 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20988  { 15685 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20989  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20990  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20991  { 15685 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20992  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20993  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20994  { 15685 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20995  { 15685 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20996  { 15685 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20997  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20998  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20999  { 15693 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21000  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21001  { 15693 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21002  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21003  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21004  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21005  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21006  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21007  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21008  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21009  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21010  { 15701 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21011  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21012  { 15701 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21013  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21014  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21015  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21016  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21017  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21018  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21019  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21020  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21021  { 15709 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
21022  { 15718 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21023  { 15718 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21024  { 15718 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21025  { 15718 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21026  { 15718 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21027  { 15718 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21028  { 15718 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21029  { 15718 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21030  { 15718 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21031  { 15718 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21032  { 15718 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21033  { 15718 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21034  { 15718 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21035  { 15718 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21036  { 15718 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21037  { 15718 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21038  { 15718 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21039  { 15718 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21040  { 15718 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21041  { 15718 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21042  { 15718 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21043  { 15718 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21044  { 15718 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21045  { 15718 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21046  { 15718 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21047  { 15718 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21048  { 15718 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21049  { 15718 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21050  { 15718 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21051  { 15718 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21052  { 15718 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21053  { 15718 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21054  { 15718 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21055  { 15718 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21056  { 15725 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21057  { 15725 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21058  { 15725 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21059  { 15725 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21060  { 15725 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21061  { 15725 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21062  { 15725 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21063  { 15725 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21064  { 15725 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21065  { 15725 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21066  { 15725 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21067  { 15725 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21068  { 15725 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21069  { 15725 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21070  { 15725 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21071  { 15725 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21072  { 15725 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21073  { 15725 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21074  { 15725 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21075  { 15725 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21076  { 15725 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21077  { 15725 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21078  { 15725 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21079  { 15725 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21080  { 15725 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21081  { 15725 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21082  { 15725 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21083  { 15725 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21084  { 15725 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21085  { 15725 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21086  { 15725 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21087  { 15725 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21088  { 15725 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21089  { 15725 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21090  { 15732 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21091  { 15732 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21092  { 15732 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21093  { 15732 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21094  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21095  { 15732 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21096  { 15732 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21097  { 15732 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21098  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21099  { 15732 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21100  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21101  { 15739 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21102  { 15739 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21103  { 15739 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21104  { 15739 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21105  { 15739 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21106  { 15739 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21107  { 15739 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21108  { 15739 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21109  { 15739 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21110  { 15739 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21111  { 15739 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21112  { 15746 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21113  { 15746 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21114  { 15746 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21115  { 15746 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21116  { 15754 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21117  { 15754 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21118  { 15754 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21119  { 15754 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21120  { 15762 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21121  { 15762 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21122  { 15762 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
21123  { 15762 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
21124  { 15762 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21125  { 15771 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21126  { 15771 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21127  { 15771 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
21128  { 15771 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
21129  { 15771 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21130  { 15780 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21131  { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21132  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21133  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21134  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21135  { 15780 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21136  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21137  { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21138  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21139  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21140  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21141  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21142  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21143  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21144  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21145  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21146  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21147  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21148  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21149  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21150  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21151  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21152  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21153  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21154  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21155  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21156  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21157  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21158  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21159  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21160  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21161  { 15790 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21162  { 15790 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21163  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21164  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21165  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21166  { 15790 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21167  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21168  { 15790 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21169  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21170  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21171  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21172  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21173  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21174  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21175  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21176  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21177  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21178  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21179  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21180  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21181  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21182  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21183  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21184  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21185  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21186  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21187  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21188  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21189  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21190  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21191  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21192  { 15800 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21193  { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21194  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21195  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21196  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21197  { 15800 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21198  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21199  { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21200  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21201  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21202  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21203  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21204  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21205  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21206  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21207  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21208  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21209  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21210  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21211  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21212  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21213  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21214  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21215  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21216  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21217  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21218  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21219  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21220  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21221  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21222  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21223  { 15810 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21224  { 15810 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21225  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21226  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21227  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21228  { 15810 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21229  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21230  { 15810 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21231  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21232  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21233  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21234  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21235  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21236  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21237  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21238  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21239  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21240  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21241  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21242  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21243  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21244  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21245  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21246  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21247  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21248  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21249  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21250  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21251  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21252  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21253  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21254  { 15820 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21255  { 15820 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21256  { 15820 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21257  { 15820 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21258  { 15820 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21259  { 15820 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21260  { 15820 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21261  { 15820 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21262  { 15820 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21263  { 15820 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21264  { 15820 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21265  { 15820 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21266  { 15820 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21267  { 15820 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21268  { 15820 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21269  { 15820 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21270  { 15820 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21271  { 15820 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21272  { 15820 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21273  { 15820 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21274  { 15820 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21275  { 15820 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21276  { 15820 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21277  { 15820 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21278  { 15820 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21279  { 15820 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21280  { 15820 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21281  { 15820 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21282  { 15820 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21283  { 15820 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21284  { 15820 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21285  { 15827 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21286  { 15827 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21287  { 15827 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21288  { 15827 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21289  { 15827 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21290  { 15827 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21291  { 15827 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21292  { 15827 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21293  { 15827 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21294  { 15827 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21295  { 15827 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21296  { 15827 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21297  { 15827 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21298  { 15827 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21299  { 15827 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21300  { 15827 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21301  { 15827 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21302  { 15827 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21303  { 15827 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21304  { 15827 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21305  { 15827 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21306  { 15827 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21307  { 15827 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21308  { 15827 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21309  { 15827 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21310  { 15827 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21311  { 15827 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21312  { 15827 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21313  { 15827 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21314  { 15827 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21315  { 15827 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21316  { 15834 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, {  }, },
21317  { 15843 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, {  }, },
21318  { 15854 /* wait */, X86::WAIT, Convert_NoOperands, 0, {  }, },
21319  { 15859 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, {  }, },
21320  { 15866 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, 0, {  }, },
21321  { 15884 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21322  { 15894 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21323  { 15913 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21324  { 15923 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21325  { 15933 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, {  }, },
21326  { 15939 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, {  }, },
21327  { 15946 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21328  { 15952 /* wrssq */, X86::WRSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21329  { 15958 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21330  { 15965 /* wrussq */, X86::WRUSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21331  { 15972 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
21332  { 15979 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, {  }, },
21333  { 15993 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR8, MCK_GR8 }, },
21334  { 15993 /* xaddb */, X86::XADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21335  { 15999 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR32, MCK_GR32 }, },
21336  { 15999 /* xaddl */, X86::XADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21337  { 16005 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR64, MCK_GR64 }, },
21338  { 16005 /* xaddq */, X86::XADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21339  { 16011 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR16, MCK_GR16 }, },
21340  { 16011 /* xaddw */, X86::XADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21341  { 16017 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
21342  { 16017 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
21343  { 16029 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR8, MCK_GR8 }, },
21344  { 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21345  { 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21346  { 16035 /* xchgl */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, Feature_In64BitMode, { MCK_EAX, MCK_EAX }, },
21347  { 16035 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_EAX, MCK_GR32 }, },
21348  { 16035 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_EAX }, },
21349  { 16035 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR32, MCK_GR32 }, },
21350  { 16035 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21351  { 16035 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21352  { 16041 /* xchgq */, X86::NOOP, Convert_NoOperands, 0, { MCK_RAX, MCK_RAX }, },
21353  { 16041 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_RAX, MCK_GR64 }, },
21354  { 16041 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_RAX }, },
21355  { 16041 /* xchgq */, X86::XCHG64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR64, MCK_GR64 }, },
21356  { 16041 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21357  { 16041 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21358  { 16047 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_AX, MCK_GR16 }, },
21359  { 16047 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_AX }, },
21360  { 16047 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR16, MCK_GR16 }, },
21361  { 16047 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21362  { 16047 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21363  { 16053 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, {  }, },
21364  { 16063 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, {  }, },
21365  { 16073 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, {  }, },
21366  { 16083 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, {  }, },
21367  { 16093 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, {  }, },
21368  { 16103 /* xend */, X86::XEND, Convert_NoOperands, 0, {  }, },
21369  { 16108 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, {  }, },
21370  { 16115 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, {  }, },
21371  { 16125 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
21372  { 16125 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
21373  { 16125 /* xorb */, X86::XOR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
21374  { 16125 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
21375  { 16125 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
21376  { 16125 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21377  { 16130 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
21378  { 16130 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21379  { 16130 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
21380  { 16130 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
21381  { 16130 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
21382  { 16130 /* xorl */, X86::XOR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
21383  { 16130 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
21384  { 16130 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
21385  { 16130 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21386  { 16135 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21387  { 16135 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21388  { 16141 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21389  { 16141 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21390  { 16147 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
21391  { 16147 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21392  { 16147 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
21393  { 16147 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
21394  { 16147 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
21395  { 16147 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
21396  { 16147 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
21397  { 16147 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
21398  { 16147 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21399  { 16152 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
21400  { 16152 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
21401  { 16152 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
21402  { 16152 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
21403  { 16152 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
21404  { 16152 /* xorw */, X86::XOR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
21405  { 16152 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
21406  { 16152 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
21407  { 16152 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21408  { 16157 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, {  }, },
21409  { 16166 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
21410  { 16173 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21411  { 16182 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
21412  { 16190 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21413  { 16200 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
21414  { 16206 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21415  { 16214 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
21416  { 16221 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21417  { 16230 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
21418  { 16239 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21419  { 16250 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
21420  { 16257 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21421  { 16266 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, {  }, },
21422  { 16273 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, {  }, },
21423  { 16279 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, {  }, },
21424  { 16287 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
21425  { 16294 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
21426  { 16304 /* xtest */, X86::XTEST, Convert_NoOperands, 0, {  }, },
21427};
21428
21429static const MatchEntry MatchTable1[] = {
21430  { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
21431  { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
21432  { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21433  { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
21434  { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21435  { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
21436  { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21437  { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21438  { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21439  { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21440  { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21441  { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21442  { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21443  { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21444  { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21445  { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21446  { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21447  { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21448  { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21449  { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21450  { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21451  { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21452  { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21453  { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21454  { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21455  { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21456  { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21457  { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21458  { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21459  { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21460  { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21461  { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21462  { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21463  { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21464  { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21465  { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21466  { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21467  { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21468  { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21469  { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21470  { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21471  { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21472  { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21473  { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21474  { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21475  { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21476  { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21477  { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21478  { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21479  { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21480  { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21481  { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21482  { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21483  { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21484  { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21485  { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21486  { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21487  { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21488  { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21489  { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21490  { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21491  { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21492  { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21493  { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21494  { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21495  { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21496  { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21497  { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21498  { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21499  { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21500  { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21501  { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21502  { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21503  { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21504  { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21505  { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21506  { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21507  { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21508  { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21509  { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21510  { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21511  { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21512  { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21513  { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21514  { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21515  { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21516  { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21517  { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21518  { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21519  { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21520  { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21521  { 123 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21522  { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21523  { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21524  { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21525  { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21526  { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21527  { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21528  { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21529  { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21530  { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21531  { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21532  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21533  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21534  { 199 /* and */, X86::AND8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21535  { 199 /* and */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21536  { 199 /* and */, X86::AND16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21537  { 199 /* and */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21538  { 199 /* and */, X86::AND32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21539  { 199 /* and */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21540  { 199 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21541  { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21542  { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21543  { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21544  { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21545  { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21546  { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21547  { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21548  { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21549  { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21550  { 199 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21551  { 199 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21552  { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21553  { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21554  { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21555  { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21556  { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21557  { 199 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21558  { 199 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21559  { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21560  { 199 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21561  { 199 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21562  { 199 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21563  { 199 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21564  { 199 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21565  { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21566  { 199 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21567  { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21568  { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
21569  { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21570  { 213 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
21571  { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21572  { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21573  { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21574  { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21575  { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21576  { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21577  { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21578  { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21579  { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
21580  { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
21581  { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21582  { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
21583  { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
21584  { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
21585  { 271 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21586  { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
21587  { 271 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
21588  { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
21589  { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21590  { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21591  { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21592  { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21593  { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21594  { 317 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21595  { 317 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21596  { 317 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21597  { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21598  { 322 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21599  { 322 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21600  { 322 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21601  { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21602  { 354 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21603  { 354 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21604  { 354 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21605  { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21606  { 377 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21607  { 377 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21608  { 377 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21609  { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21610  { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21611  { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21612  { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21613  { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21614  { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21615  { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21616  { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21617  { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21618  { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21619  { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21620  { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21621  { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21622  { 428 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21623  { 428 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21624  { 428 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21625  { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21626  { 454 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21627  { 454 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21628  { 454 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21629  { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21630  { 459 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21631  { 459 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21632  { 459 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21633  { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21634  { 491 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21635  { 491 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21636  { 491 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21637  { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21638  { 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21639  { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21640  { 514 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21641  { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21642  { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21643  { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21644  { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21645  { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21646  { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21647  { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21648  { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21649  { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21650  { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21651  { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21652  { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21653  { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem5_1, 0, { MCK_BNDR, MCK_Mem }, },
21654  { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21655  { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21656  { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
21657  { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
21658  { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_0__Mem645_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21659  { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_0__Reg1_1, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
21660  { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
21661  { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_0__Reg1_1, 0, { MCK_Mem, MCK_BNDR }, },
21662  { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
21663  { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
21664  { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21665  { 582 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21666  { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21667  { 582 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21668  { 582 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21669  { 582 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21670  { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21671  { 601 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21672  { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21673  { 601 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21674  { 601 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21675  { 601 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21676  { 620 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
21677  { 620 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
21678  { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21679  { 640 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21680  { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21681  { 640 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21682  { 640 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21683  { 640 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21684  { 640 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21685  { 640 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21686  { 640 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21687  { 640 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21688  { 640 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21689  { 640 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21690  { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21691  { 643 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21692  { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21693  { 643 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21694  { 643 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21695  { 643 /* btc */, X86::BTC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21696  { 643 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21697  { 643 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21698  { 643 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21699  { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21700  { 643 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21701  { 643 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21702  { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21703  { 670 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21704  { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21705  { 670 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21706  { 670 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21707  { 670 /* btr */, X86::BTR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21708  { 670 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21709  { 670 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21710  { 670 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21711  { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21712  { 670 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21713  { 670 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21714  { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21715  { 689 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21716  { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21717  { 689 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21718  { 689 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21719  { 689 /* bts */, X86::BTS64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21720  { 689 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21721  { 689 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21722  { 689 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21723  { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21724  { 689 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21725  { 689 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21726  { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21727  { 712 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
21728  { 712 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21729  { 712 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
21730  { 729 /* call */, X86::CALL16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
21731  { 729 /* call */, X86::CALL32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
21732  { 729 /* call */, X86::CALL64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21733  { 729 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
21734  { 729 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
21735  { 729 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
21736  { 729 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
21737  { 729 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
21738  { 729 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
21739  { 729 /* call */, X86::FARCALL32m, Convert__Mem5_0, 0, { MCK_Mem }, },
21740  { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
21741  { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
21742  { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
21743  { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
21744  { 757 /* cbw */, X86::CBW, Convert_NoOperands, 0, {  }, },
21745  { 761 /* cdq */, X86::CDQ, Convert_NoOperands, 0, {  }, },
21746  { 765 /* cdqe */, X86::CDQE, Convert_NoOperands, 0, {  }, },
21747  { 770 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
21748  { 775 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
21749  { 779 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
21750  { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21751  { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21752  { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21753  { 811 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
21754  { 816 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
21755  { 820 /* clr */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR16 }, },
21756  { 820 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR32 }, },
21757  { 820 /* clr */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR64 }, },
21758  { 820 /* clr */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR8 }, },
21759  { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
21760  { 863 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
21761  { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21762  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
21763  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
21764  { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
21765  { 880 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
21766  { 884 /* cmova */, X86::CMOVA16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21767  { 884 /* cmova */, X86::CMOVA16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21768  { 884 /* cmova */, X86::CMOVA32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21769  { 884 /* cmova */, X86::CMOVA32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21770  { 884 /* cmova */, X86::CMOVA64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21771  { 884 /* cmova */, X86::CMOVA64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21772  { 890 /* cmovae */, X86::CMOVAE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21773  { 890 /* cmovae */, X86::CMOVAE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21774  { 890 /* cmovae */, X86::CMOVAE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21775  { 890 /* cmovae */, X86::CMOVAE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21776  { 890 /* cmovae */, X86::CMOVAE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21777  { 890 /* cmovae */, X86::CMOVAE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21778  { 942 /* cmovb */, X86::CMOVB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21779  { 942 /* cmovb */, X86::CMOVB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21780  { 942 /* cmovb */, X86::CMOVB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21781  { 942 /* cmovb */, X86::CMOVB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21782  { 942 /* cmovb */, X86::CMOVB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21783  { 942 /* cmovb */, X86::CMOVB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21784  { 948 /* cmovbe */, X86::CMOVBE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21785  { 948 /* cmovbe */, X86::CMOVBE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21786  { 948 /* cmovbe */, X86::CMOVBE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21787  { 948 /* cmovbe */, X86::CMOVBE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21788  { 948 /* cmovbe */, X86::CMOVBE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21789  { 948 /* cmovbe */, X86::CMOVBE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21790  { 1000 /* cmove */, X86::CMOVE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21791  { 1000 /* cmove */, X86::CMOVE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21792  { 1000 /* cmove */, X86::CMOVE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21793  { 1000 /* cmove */, X86::CMOVE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21794  { 1000 /* cmove */, X86::CMOVE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21795  { 1000 /* cmove */, X86::CMOVE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21796  { 1027 /* cmovg */, X86::CMOVG16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21797  { 1027 /* cmovg */, X86::CMOVG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21798  { 1027 /* cmovg */, X86::CMOVG32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21799  { 1027 /* cmovg */, X86::CMOVG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21800  { 1027 /* cmovg */, X86::CMOVG64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21801  { 1027 /* cmovg */, X86::CMOVG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21802  { 1033 /* cmovge */, X86::CMOVGE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21803  { 1033 /* cmovge */, X86::CMOVGE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21804  { 1033 /* cmovge */, X86::CMOVGE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21805  { 1033 /* cmovge */, X86::CMOVGE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21806  { 1033 /* cmovge */, X86::CMOVGE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21807  { 1033 /* cmovge */, X86::CMOVGE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21808  { 1085 /* cmovl */, X86::CMOVL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21809  { 1085 /* cmovl */, X86::CMOVL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21810  { 1085 /* cmovl */, X86::CMOVL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21811  { 1085 /* cmovl */, X86::CMOVL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21812  { 1085 /* cmovl */, X86::CMOVL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21813  { 1085 /* cmovl */, X86::CMOVL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21814  { 1091 /* cmovle */, X86::CMOVLE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21815  { 1091 /* cmovle */, X86::CMOVLE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21816  { 1091 /* cmovle */, X86::CMOVLE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21817  { 1091 /* cmovle */, X86::CMOVLE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21818  { 1091 /* cmovle */, X86::CMOVLE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21819  { 1091 /* cmovle */, X86::CMOVLE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21820  { 1143 /* cmovne */, X86::CMOVNE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21821  { 1143 /* cmovne */, X86::CMOVNE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21822  { 1143 /* cmovne */, X86::CMOVNE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21823  { 1143 /* cmovne */, X86::CMOVNE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21824  { 1143 /* cmovne */, X86::CMOVNE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21825  { 1143 /* cmovne */, X86::CMOVNE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21826  { 1174 /* cmovno */, X86::CMOVNO16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21827  { 1174 /* cmovno */, X86::CMOVNO16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21828  { 1174 /* cmovno */, X86::CMOVNO32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21829  { 1174 /* cmovno */, X86::CMOVNO32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21830  { 1174 /* cmovno */, X86::CMOVNO64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21831  { 1174 /* cmovno */, X86::CMOVNO64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21832  { 1205 /* cmovnp */, X86::CMOVNP16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21833  { 1205 /* cmovnp */, X86::CMOVNP16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21834  { 1205 /* cmovnp */, X86::CMOVNP32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21835  { 1205 /* cmovnp */, X86::CMOVNP32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21836  { 1205 /* cmovnp */, X86::CMOVNP64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21837  { 1205 /* cmovnp */, X86::CMOVNP64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21838  { 1236 /* cmovns */, X86::CMOVNS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21839  { 1236 /* cmovns */, X86::CMOVNS16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21840  { 1236 /* cmovns */, X86::CMOVNS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21841  { 1236 /* cmovns */, X86::CMOVNS32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21842  { 1236 /* cmovns */, X86::CMOVNS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21843  { 1236 /* cmovns */, X86::CMOVNS64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21844  { 1267 /* cmovo */, X86::CMOVO16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21845  { 1267 /* cmovo */, X86::CMOVO16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21846  { 1267 /* cmovo */, X86::CMOVO32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21847  { 1267 /* cmovo */, X86::CMOVO32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21848  { 1267 /* cmovo */, X86::CMOVO64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21849  { 1267 /* cmovo */, X86::CMOVO64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21850  { 1294 /* cmovp */, X86::CMOVP16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21851  { 1294 /* cmovp */, X86::CMOVP16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21852  { 1294 /* cmovp */, X86::CMOVP32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21853  { 1294 /* cmovp */, X86::CMOVP32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21854  { 1294 /* cmovp */, X86::CMOVP64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21855  { 1294 /* cmovp */, X86::CMOVP64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21856  { 1321 /* cmovs */, X86::CMOVS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21857  { 1321 /* cmovs */, X86::CMOVS16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21858  { 1321 /* cmovs */, X86::CMOVS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21859  { 1321 /* cmovs */, X86::CMOVS32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21860  { 1321 /* cmovs */, X86::CMOVS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21861  { 1321 /* cmovs */, X86::CMOVS64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21862  { 1348 /* cmp */, X86::CMP8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21863  { 1348 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21864  { 1348 /* cmp */, X86::CMP16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21865  { 1348 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21866  { 1348 /* cmp */, X86::CMP32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21867  { 1348 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21868  { 1348 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21869  { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21870  { 1348 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21871  { 1348 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21872  { 1348 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21873  { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21874  { 1348 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21875  { 1348 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21876  { 1348 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21877  { 1348 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21878  { 1348 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21879  { 1348 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21880  { 1348 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21881  { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21882  { 1348 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21883  { 1348 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21884  { 1348 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21885  { 1348 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21886  { 1348 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21887  { 1348 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21888  { 1348 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21889  { 1348 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21890  { 1348 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21891  { 1348 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21892  { 1348 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21893  { 1348 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21894  { 1348 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21895  { 1348 /* cmp */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
21896  { 1348 /* cmp */, X86::CMPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_Mem128 }, },
21897  { 1348 /* cmp */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
21898  { 1348 /* cmp */, X86::CMPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_Mem128 }, },
21899  { 1348 /* cmp */, X86::CMPSDrr, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
21900  { 1348 /* cmp */, X86::CMPSDrm, Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_Mem64 }, },
21901  { 1348 /* cmp */, X86::CMPSSrr, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
21902  { 1348 /* cmp */, X86::CMPSSrm, Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_Mem32 }, },
21903  { 1362 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21904  { 1362 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21905  { 1368 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21906  { 1368 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21907  { 1379 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
21908  { 1379 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
21909  { 1379 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
21910  { 1379 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
21911  { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
21912  { 1390 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
21913  { 1390 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21914  { 1390 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
21915  { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
21916  { 1408 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21917  { 1408 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
21918  { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
21919  { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21920  { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21921  { 1425 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21922  { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21923  { 1425 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21924  { 1425 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21925  { 1425 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21926  { 1425 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21927  { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
21928  { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
21929  { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21930  { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21931  { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21932  { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21933  { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
21934  { 1510 /* cqo */, X86::CQO, Convert_NoOperands, 0, {  }, },
21935  { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
21936  { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21937  { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
21938  { 1519 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
21939  { 1519 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21940  { 1519 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
21941  { 1519 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21942  { 1519 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
21943  { 1519 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21944  { 1519 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
21945  { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
21946  { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21947  { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21948  { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21949  { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21950  { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21951  { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21952  { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
21953  { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
21954  { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21955  { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21956  { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
21957  { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21958  { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
21959  { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21960  { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21961  { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21962  { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21963  { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21964  { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
21965  { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
21966  { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
21967  { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
21968  { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
21969  { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21970  { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21971  { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21972  { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
21973  { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
21974  { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21975  { 1684 /* cvtsi2sd */, X86::CVTSI642SDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21976  { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
21977  { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
21978  { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21979  { 1713 /* cvtsi2ss */, X86::CVTSI642SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21980  { 1742 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21981  { 1742 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21982  { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
21983  { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21984  { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
21985  { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
21986  { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21987  { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21988  { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
21989  { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
21990  { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21991  { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21992  { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
21993  { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
21994  { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
21995  { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
21996  { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
21997  { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21998  { 1852 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
21999  { 1852 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22000  { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22001  { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22002  { 1884 /* cwd */, X86::CWD, Convert_NoOperands, 0, {  }, },
22003  { 1888 /* cwde */, X86::CWDE, Convert_NoOperands, 0, {  }, },
22004  { 1903 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
22005  { 1907 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
22006  { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, {  }, },
22007  { 1918 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
22008  { 1918 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22009  { 1918 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
22010  { 1918 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22011  { 1918 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22012  { 1918 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22013  { 1918 /* dec */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22014  { 1918 /* dec */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22015  { 1918 /* dec */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22016  { 1918 /* dec */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22017  { 1942 /* div */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22018  { 1942 /* div */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22019  { 1942 /* div */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22020  { 1942 /* div */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22021  { 1942 /* div */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22022  { 1942 /* div */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22023  { 1942 /* div */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22024  { 1942 /* div */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22025  { 1942 /* div */, X86::DIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22026  { 1942 /* div */, X86::DIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22027  { 1942 /* div */, X86::DIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22028  { 1942 /* div */, X86::DIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22029  { 1942 /* div */, X86::DIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22030  { 1942 /* div */, X86::DIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22031  { 1942 /* div */, X86::DIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22032  { 1942 /* div */, X86::DIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22033  { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22034  { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22035  { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22036  { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22037  { 1973 /* divsd */, X86::DIVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22038  { 1973 /* divsd */, X86::DIVSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22039  { 1979 /* divss */, X86::DIVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22040  { 1979 /* divss */, X86::DIVSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22041  { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22042  { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22043  { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22044  { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22045  { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
22046  { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
22047  { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
22048  { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
22049  { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, 0, {  }, },
22050  { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, 0, {  }, },
22051  { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, 0, {  }, },
22052  { 2042 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
22053  { 2048 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
22054  { 2051 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
22055  { 2051 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22056  { 2061 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22057  { 2061 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22058  { 2067 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
22059  { 2073 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
22060  { 2078 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
22061  { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22062  { 2078 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22063  { 2078 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22064  { 2078 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22065  { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22066  { 2078 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22067  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
22068  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22069  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22070  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22071  { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22072  { 2101 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22073  { 2106 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22074  { 2112 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
22075  { 2117 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22076  { 2124 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22077  { 2132 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22078  { 2139 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22079  { 2147 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22080  { 2156 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22081  { 2164 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22082  { 2172 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22083  { 2179 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
22084  { 2179 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22085  { 2179 /* fcom */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22086  { 2179 /* fcom */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22087  { 2184 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
22088  { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22089  { 2184 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22090  { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22091  { 2196 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
22092  { 2196 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22093  { 2196 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22094  { 2196 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22095  { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
22096  { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22097  { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22098  { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22099  { 2216 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
22100  { 2236 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
22101  { 2241 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
22102  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22103  { 2249 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22104  { 2249 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22105  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22106  { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22107  { 2249 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22108  { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
22109  { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22110  { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22111  { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22112  { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22113  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22114  { 2266 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22115  { 2266 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22116  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22117  { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22118  { 2266 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22119  { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
22120  { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22121  { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22122  { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22123  { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22124  { 2299 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
22125  { 2305 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
22126  { 2311 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
22127  { 2318 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22128  { 2318 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22129  { 2338 /* ficom */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22130  { 2338 /* ficom */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22131  { 2351 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22132  { 2351 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22133  { 2381 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22134  { 2381 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22135  { 2394 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22136  { 2394 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22137  { 2424 /* fild */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22138  { 2424 /* fild */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22139  { 2424 /* fild */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22140  { 2448 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22141  { 2448 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22142  { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
22143  { 2476 /* fist */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22144  { 2476 /* fist */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22145  { 2487 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22146  { 2487 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22147  { 2487 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22148  { 2521 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22149  { 2521 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22150  { 2521 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22151  { 2553 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22152  { 2553 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22153  { 2566 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22154  { 2566 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22155  { 2596 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22156  { 2596 /* fld */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22157  { 2596 /* fld */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22158  { 2596 /* fld */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22159  { 2600 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
22160  { 2605 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22161  { 2611 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22162  { 2623 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
22163  { 2630 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
22164  { 2637 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
22165  { 2644 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
22166  { 2651 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
22167  { 2667 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
22168  { 2672 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
22169  { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22170  { 2672 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22171  { 2672 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22172  { 2672 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22173  { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22174  { 2672 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22175  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
22176  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22177  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22178  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22179  { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22180  { 2695 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
22181  { 2702 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
22182  { 2709 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
22183  { 2714 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22184  { 2721 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22185  { 2728 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22186  { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
22187  { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
22188  { 2736 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22189  { 2743 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
22190  { 2750 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
22191  { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
22192  { 2763 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
22193  { 2769 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
22194  { 2777 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22195  { 2784 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
22196  { 2787 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
22197  { 2794 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
22198  { 2799 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
22199  { 2807 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
22200  { 2813 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22201  { 2813 /* fst */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22202  { 2813 /* fst */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22203  { 2822 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
22204  { 2822 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22205  { 2822 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22206  { 2822 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22207  { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22208  { 2850 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22209  { 2850 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22210  { 2850 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22211  { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22212  { 2850 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22213  { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
22214  { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22215  { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22216  { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22217  { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22218  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22219  { 2867 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22220  { 2867 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22221  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22222  { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22223  { 2867 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22224  { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
22225  { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22226  { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22227  { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22228  { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22229  { 2900 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
22230  { 2905 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
22231  { 2905 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
22232  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
22233  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22234  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22235  { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22236  { 2918 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
22237  { 2918 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
22238  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
22239  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22240  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22241  { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22242  { 2933 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
22243  { 2941 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
22244  { 2946 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
22245  { 2946 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
22246  { 2951 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
22247  { 2959 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22248  { 2969 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
22249  { 2976 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22250  { 2985 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
22251  { 2993 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
22252  { 2999 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
22253  { 3007 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
22254  { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22255  { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22256  { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22257  { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22258  { 3045 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22259  { 3045 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22260  { 3055 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
22261  { 3058 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22262  { 3058 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22263  { 3065 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22264  { 3065 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22265  { 3072 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
22266  { 3076 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22267  { 3076 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22268  { 3083 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22269  { 3083 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22270  { 3090 /* idiv */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22271  { 3090 /* idiv */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22272  { 3090 /* idiv */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22273  { 3090 /* idiv */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22274  { 3090 /* idiv */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22275  { 3090 /* idiv */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22276  { 3090 /* idiv */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22277  { 3090 /* idiv */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22278  { 3090 /* idiv */, X86::IDIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22279  { 3090 /* idiv */, X86::IDIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22280  { 3090 /* idiv */, X86::IDIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22281  { 3090 /* idiv */, X86::IDIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22282  { 3090 /* idiv */, X86::IDIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22283  { 3090 /* idiv */, X86::IDIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22284  { 3090 /* idiv */, X86::IDIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22285  { 3090 /* idiv */, X86::IDIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22286  { 3119 /* imul */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22287  { 3119 /* imul */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22288  { 3119 /* imul */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22289  { 3119 /* imul */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22290  { 3119 /* imul */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22291  { 3119 /* imul */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22292  { 3119 /* imul */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22293  { 3119 /* imul */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22294  { 3119 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22295  { 3119 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22296  { 3119 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22297  { 3119 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22298  { 3119 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22299  { 3119 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22300  { 3119 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22301  { 3119 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22302  { 3119 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22303  { 3119 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22304  { 3119 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22305  { 3119 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22306  { 3119 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
22307  { 3119 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR16, MCK_GR16, MCK_Imm }, },
22308  { 3119 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
22309  { 3119 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, 0, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
22310  { 3119 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
22311  { 3119 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22312  { 3119 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
22313  { 3119 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22314  { 3119 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, },
22315  { 3119 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
22316  { 3119 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, },
22317  { 3119 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
22318  { 3148 /* in */, X86::IN8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
22319  { 3148 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
22320  { 3148 /* in */, X86::IN16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
22321  { 3148 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
22322  { 3148 /* in */, X86::IN32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
22323  { 3148 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
22324  { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
22325  { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22326  { 3155 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
22327  { 3155 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22328  { 3155 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
22329  { 3155 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22330  { 3155 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22331  { 3155 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22332  { 3155 /* inc */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22333  { 3155 /* inc */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22334  { 3155 /* inc */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22335  { 3155 /* inc */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22336  { 3174 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
22337  { 3182 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
22338  { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
22339  { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22340  { 3199 /* ins */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22341  { 3199 /* ins */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22342  { 3199 /* ins */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22343  { 3203 /* insb */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22344  { 3208 /* insd */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22345  { 3213 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22346  { 3213 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
22347  { 3222 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22348  { 3222 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22349  { 3235 /* insw */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22350  { 3240 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22351  { 3244 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
22352  { 3249 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, {  }, },
22353  { 3254 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
22354  { 3259 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22355  { 3259 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22356  { 3266 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22357  { 3273 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
22358  { 3273 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
22359  { 3281 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22360  { 3281 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22361  { 3289 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22362  { 3289 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22363  { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
22364  { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22365  { 3301 /* iret */, X86::IRET16, Convert_NoOperands, 0, {  }, },
22366  { 3306 /* iretd */, X86::IRET32, Convert_NoOperands, 0, {  }, },
22367  { 3318 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
22368  { 3330 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22369  { 3333 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22370  { 3337 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22371  { 3340 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22372  { 3344 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
22373  { 3349 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22374  { 3352 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22375  { 3358 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22376  { 3361 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22377  { 3365 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22378  { 3368 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22379  { 3372 /* jmp */, X86::JMP16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
22380  { 3372 /* jmp */, X86::JMP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
22381  { 3372 /* jmp */, X86::JMP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22382  { 3372 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22383  { 3372 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
22384  { 3372 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
22385  { 3372 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22386  { 3372 /* jmp */, X86::FARJMP32m, Convert__Mem5_0, 0, { MCK_Mem }, },
22387  { 3372 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22388  { 3372 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22389  { 3376 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22390  { 3386 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22391  { 3391 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22392  { 3395 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22393  { 3399 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22394  { 3403 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22395  { 3407 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22396  { 3410 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22397  { 3413 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
22398  { 3419 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22399  { 3422 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22400  { 3428 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22401  { 3434 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22402  { 3440 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22403  { 3446 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22404  { 3452 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22405  { 3458 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22406  { 3465 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22407  { 3472 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22408  { 3479 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22409  { 3486 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22410  { 3492 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22411  { 3498 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22412  { 3498 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22413  { 3498 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, 0, { MCK_VK1, MCK_Mem8 }, },
22414  { 3498 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22415  { 3498 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_VK1 }, },
22416  { 3504 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22417  { 3504 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22418  { 3504 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, 0, { MCK_VK1, MCK_Mem32 }, },
22419  { 3504 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22420  { 3504 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VK1 }, },
22421  { 3510 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22422  { 3510 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR64 }, },
22423  { 3510 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, 0, { MCK_VK1, MCK_Mem64 }, },
22424  { 3510 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VK1 }, },
22425  { 3510 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VK1 }, },
22426  { 3516 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22427  { 3516 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22428  { 3516 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, 0, { MCK_VK1, MCK_Mem16 }, },
22429  { 3516 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22430  { 3516 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_VK1 }, },
22431  { 3522 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22432  { 3528 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22433  { 3534 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22434  { 3540 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22435  { 3546 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22436  { 3551 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22437  { 3556 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22438  { 3561 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22439  { 3570 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22440  { 3579 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22441  { 3588 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22442  { 3597 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22443  { 3602 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22444  { 3611 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22445  { 3620 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22446  { 3629 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22447  { 3638 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22448  { 3647 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22449  { 3656 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22450  { 3665 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22451  { 3674 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22452  { 3681 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22453  { 3688 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22454  { 3695 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22455  { 3702 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22456  { 3711 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22457  { 3720 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22458  { 3729 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22459  { 3736 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22460  { 3743 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22461  { 3750 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22462  { 3757 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22463  { 3763 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22464  { 3769 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22465  { 3775 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22466  { 3781 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
22467  { 3786 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22468  { 3786 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22469  { 3786 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22470  { 3786 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22471  { 3786 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22472  { 3786 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22473  { 3805 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22474  { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22475  { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, 0, { MCK_Mem }, },
22476  { 3805 /* lcall */, X86::FARCALL64, Convert__Mem5_0, 0, { MCK_Mem }, },
22477  { 3805 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22478  { 3805 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22479  { 3832 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22480  { 3838 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22481  { 3846 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22482  { 3846 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22483  { 3860 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22484  { 3860 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22485  { 3860 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_GR32, MCK_Mem }, },
22486  { 3860 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22487  { 3874 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
22488  { 3874 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
22489  { 3885 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22490  { 3885 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22491  { 3899 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
22492  { 3906 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22493  { 3906 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22494  { 3906 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22495  { 3925 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22496  { 3930 /* lgdtd */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22497  { 3948 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22498  { 3954 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22499  { 3954 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22500  { 3954 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22501  { 3973 /* lidt */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22502  { 3978 /* lidtd */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22503  { 3996 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22504  { 4002 /* ljmp */, X86::FARJMP64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22505  { 4002 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22506  { 4002 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22507  { 4002 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22508  { 4002 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22509  { 4025 /* lldt */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22510  { 4025 /* lldt */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22511  { 4036 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
22512  { 4036 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
22513  { 4043 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22514  { 4043 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22515  { 4054 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
22516  { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22517  { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22518  { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22519  { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22520  { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22521  { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22522  { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22523  { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
22524  { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22525  { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22526  { 4070 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22527  { 4070 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22528  { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22529  { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
22530  { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22531  { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22532  { 4094 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22533  { 4099 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22534  { 4105 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22535  { 4130 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22536  { 4130 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22537  { 4130 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22538  { 4130 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22539  { 4130 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22540  { 4130 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22541  { 4149 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22542  { 4149 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22543  { 4149 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22544  { 4168 /* ltr */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
22545  { 4168 /* ltr */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22546  { 4177 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22547  { 4177 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22548  { 4177 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22549  { 4177 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22550  { 4184 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22551  { 4184 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22552  { 4184 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22553  { 4184 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22554  { 4191 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22555  { 4191 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22556  { 4191 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22557  { 4191 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22558  { 4191 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22559  { 4191 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22560  { 4218 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
22561  { 4218 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
22562  { 4229 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
22563  { 4229 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
22564  { 4238 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22565  { 4238 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22566  { 4244 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22567  { 4244 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22568  { 4250 /* maxsd */, X86::MAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22569  { 4250 /* maxsd */, X86::MAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22570  { 4256 /* maxss */, X86::MAXSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22571  { 4256 /* maxss */, X86::MAXSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22572  { 4262 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
22573  { 4269 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22574  { 4269 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22575  { 4275 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22576  { 4275 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22577  { 4281 /* minsd */, X86::MINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22578  { 4281 /* minsd */, X86::MINSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22579  { 4287 /* minss */, X86::MINSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22580  { 4287 /* minss */, X86::MINSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22581  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
22582  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22583  { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22584  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
22585  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22586  { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22587  { 4310 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
22588  { 4318 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
22589  { 4318 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
22590  { 4318 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
22591  { 4318 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
22592  { 4318 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
22593  { 4318 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
22594  { 4318 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
22595  { 4318 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
22596  { 4318 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
22597  { 4318 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
22598  { 4318 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
22599  { 4318 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
22600  { 4318 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
22601  { 4318 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
22602  { 4318 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
22603  { 4318 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
22604  { 4318 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22605  { 4318 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22606  { 4318 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22607  { 4318 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
22608  { 4318 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
22609  { 4318 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
22610  { 4318 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22611  { 4318 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22612  { 4318 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22613  { 4318 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
22614  { 4318 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
22615  { 4318 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
22616  { 4318 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22617  { 4318 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22618  { 4318 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22619  { 4318 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22620  { 4318 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22621  { 4318 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22622  { 4318 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22623  { 4318 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
22624  { 4318 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
22625  { 4318 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
22626  { 4318 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
22627  { 4318 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
22628  { 4318 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
22629  { 4318 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
22630  { 4318 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
22631  { 4318 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22632  { 4318 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22633  { 4318 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22634  { 4318 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22635  { 4318 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22636  { 4318 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22637  { 4318 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22638  { 4318 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22639  { 4322 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22640  { 4322 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22641  { 4322 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22642  { 4322 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22643  { 4328 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
22644  { 4328 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
22645  { 4328 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
22646  { 4328 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
22647  { 4328 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22648  { 4328 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
22649  { 4328 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
22650  { 4328 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
22651  { 4328 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
22652  { 4367 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22653  { 4367 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22654  { 4367 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22655  { 4374 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22656  { 4383 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22657  { 4383 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22658  { 4383 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22659  { 4390 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22660  { 4411 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22661  { 4411 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22662  { 4411 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22663  { 4411 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22664  { 4411 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22665  { 4411 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22666  { 4438 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR32 }, },
22667  { 4438 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
22668  { 4438 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
22669  { 4438 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22670  { 4438 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22671  { 4438 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22672  { 4438 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VR64 }, },
22673  { 4438 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22674  { 4438 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
22675  { 4438 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22676  { 4438 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR64 }, },
22677  { 4438 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22678  { 4443 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22679  { 4443 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22680  { 4451 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_0__Mem5125_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
22681  { 4451 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_0__Mem5125_1, 0, { MCK_GR32, MCK_Mem512 }, },
22682  { 4451 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_0__Mem5125_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem512 }, },
22683  { 4461 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22684  { 4461 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
22685  { 4469 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22686  { 4477 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22687  { 4477 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22688  { 4477 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22689  { 4484 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22690  { 4493 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22691  { 4493 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22692  { 4493 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22693  { 4500 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22694  { 4509 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22695  { 4517 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22696  { 4517 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22697  { 4524 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22698  { 4524 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22699  { 4543 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22700  { 4551 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22701  { 4551 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22702  { 4558 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22703  { 4558 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22704  { 4565 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22705  { 4574 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22706  { 4583 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22707  { 4591 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22708  { 4600 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22709  { 4600 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22710  { 4623 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22711  { 4631 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22712  { 4639 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
22713  { 4646 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22714  { 4654 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22715  { 4662 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22716  { 4662 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
22717  { 4662 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22718  { 4662 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22719  { 4662 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22720  { 4662 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22721  { 4662 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
22722  { 4662 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22723  { 4662 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
22724  { 4662 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22725  { 4667 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22726  { 4667 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22727  { 4674 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22728  { 4682 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
22729  { 4682 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
22730  { 4682 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
22731  { 4682 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
22732  { 4687 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
22733  { 4714 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22734  { 4714 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22735  { 4714 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
22736  { 4714 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22737  { 4720 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22738  { 4728 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22739  { 4728 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22740  { 4743 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22741  { 4743 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22742  { 4759 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
22743  { 4765 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22744  { 4765 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22745  { 4765 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22746  { 4771 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22747  { 4779 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
22748  { 4799 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22749  { 4799 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22750  { 4799 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22751  { 4799 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22752  { 4799 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22753  { 4799 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22754  { 4799 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22755  { 4799 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22756  { 4799 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22757  { 4799 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22758  { 4805 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR32 }, },
22759  { 4805 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem32 }, },
22760  { 4812 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22761  { 4812 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22762  { 4812 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22763  { 4819 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22764  { 4828 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22765  { 4828 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22766  { 4828 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22767  { 4835 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22768  { 4891 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22769  { 4891 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22770  { 4891 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22771  { 4891 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22772  { 4891 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22773  { 4891 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22774  { 4891 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22775  { 4891 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22776  { 4891 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22777  { 4891 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22778  { 4897 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22779  { 4897 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22780  { 4905 /* mul */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22781  { 4905 /* mul */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22782  { 4905 /* mul */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22783  { 4905 /* mul */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22784  { 4905 /* mul */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22785  { 4905 /* mul */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22786  { 4905 /* mul */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22787  { 4905 /* mul */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22788  { 4919 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22789  { 4919 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22790  { 4925 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22791  { 4925 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22792  { 4936 /* mulsd */, X86::MULSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22793  { 4936 /* mulsd */, X86::MULSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22794  { 4942 /* mulss */, X86::MULSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22795  { 4942 /* mulss */, X86::MULSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22796  { 4953 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22797  { 4953 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
22798  { 4953 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22799  { 4953 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
22800  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
22801  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
22802  { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RCX, MCK_RAX }, },
22803  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, {  }, },
22804  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, },
22805  { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, },
22806  { 4983 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22807  { 4983 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22808  { 4983 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22809  { 4983 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22810  { 4983 /* neg */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22811  { 4983 /* neg */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22812  { 4983 /* neg */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22813  { 4983 /* neg */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22814  { 5007 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
22815  { 5007 /* nop */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
22816  { 5007 /* nop */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
22817  { 5007 /* nop */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22818  { 5007 /* nop */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22819  { 5007 /* nop */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22820  { 5007 /* nop */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22821  { 5026 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22822  { 5026 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22823  { 5026 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22824  { 5026 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22825  { 5026 /* not */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22826  { 5026 /* not */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22827  { 5026 /* not */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22828  { 5026 /* not */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22829  { 5050 /* or */, X86::OR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
22830  { 5050 /* or */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
22831  { 5050 /* or */, X86::OR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
22832  { 5050 /* or */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
22833  { 5050 /* or */, X86::OR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
22834  { 5050 /* or */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
22835  { 5050 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
22836  { 5050 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22837  { 5050 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22838  { 5050 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22839  { 5050 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22840  { 5050 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22841  { 5050 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22842  { 5050 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22843  { 5050 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22844  { 5050 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22845  { 5050 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22846  { 5050 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22847  { 5050 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22848  { 5050 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22849  { 5050 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22850  { 5050 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22851  { 5050 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22852  { 5050 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22853  { 5050 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22854  { 5050 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22855  { 5050 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22856  { 5050 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22857  { 5050 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22858  { 5050 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22859  { 5050 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22860  { 5050 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22861  { 5050 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22862  { 5061 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22863  { 5061 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22864  { 5066 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22865  { 5066 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22866  { 5079 /* out */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
22867  { 5079 /* out */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
22868  { 5079 /* out */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
22869  { 5079 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
22870  { 5079 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
22871  { 5079 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
22872  { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
22873  { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22874  { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
22875  { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22876  { 5093 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
22877  { 5093 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
22878  { 5093 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
22879  { 5098 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
22880  { 5104 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
22881  { 5116 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
22882  { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
22883  { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22884  { 5127 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22885  { 5127 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22886  { 5127 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22887  { 5127 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22888  { 5133 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22889  { 5133 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22890  { 5133 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22891  { 5133 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22892  { 5139 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22893  { 5139 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22894  { 5139 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22895  { 5139 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22896  { 5145 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22897  { 5145 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22898  { 5145 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22899  { 5145 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22900  { 5154 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22901  { 5154 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22902  { 5154 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22903  { 5154 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22904  { 5163 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22905  { 5163 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22906  { 5172 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22907  { 5172 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22908  { 5172 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22909  { 5172 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22910  { 5181 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22911  { 5181 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22912  { 5181 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22913  { 5181 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22914  { 5187 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22915  { 5187 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22916  { 5187 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22917  { 5187 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22918  { 5193 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22919  { 5193 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22920  { 5193 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22921  { 5193 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22922  { 5199 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22923  { 5199 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22924  { 5199 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22925  { 5199 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22926  { 5206 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22927  { 5206 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22928  { 5206 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22929  { 5206 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22930  { 5213 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22931  { 5213 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22932  { 5213 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22933  { 5213 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22934  { 5221 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22935  { 5221 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22936  { 5221 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22937  { 5221 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22938  { 5229 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22939  { 5229 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22940  { 5229 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22941  { 5229 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22942  { 5235 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
22943  { 5235 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
22944  { 5235 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22945  { 5235 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22946  { 5243 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22947  { 5243 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22948  { 5243 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22949  { 5243 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22950  { 5248 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22951  { 5248 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22952  { 5248 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22953  { 5248 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22954  { 5254 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
22955  { 5260 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22956  { 5260 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22957  { 5260 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22958  { 5260 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22959  { 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22960  { 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22961  { 5274 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22962  { 5274 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22963  { 5274 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22964  { 5274 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22965  { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22966  { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22967  { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22968  { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
22969  { 5289 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22970  { 5289 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22971  { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
22972  { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17, 0, { MCK_FR32, MCK_Mem128 }, },
22973  { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
22974  { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1, 0, { MCK_FR32, MCK_Mem128 }, },
22975  { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
22976  { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16, 0, { MCK_FR32, MCK_Mem128 }, },
22977  { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
22978  { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0, 0, { MCK_FR32, MCK_Mem128 }, },
22979  { 5349 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22980  { 5349 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22981  { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22982  { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22983  { 5359 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22984  { 5359 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22985  { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22986  { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22987  { 5367 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22988  { 5367 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22989  { 5375 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22990  { 5375 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22991  { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22992  { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22993  { 5383 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22994  { 5383 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22995  { 5391 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22996  { 5391 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22997  { 5401 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22998  { 5401 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22999  { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23000  { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23001  { 5411 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23002  { 5411 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23003  { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23004  { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23005  { 5419 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23006  { 5419 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23007  { 5427 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23008  { 5427 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23009  { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23010  { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23011  { 5435 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23012  { 5435 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23013  { 5443 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23014  { 5443 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23015  { 5453 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23016  { 5453 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23017  { 5463 /* pconfig */, X86::PCONFIG, Convert_NoOperands, 0, {  }, },
23018  { 5471 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23019  { 5471 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23020  { 5471 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23021  { 5471 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23022  { 5488 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23023  { 5488 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23024  { 5488 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23025  { 5488 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23026  { 5505 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23027  { 5505 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
23028  { 5512 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23029  { 5512 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23030  { 5519 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23031  { 5519 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23032  { 5526 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23033  { 5526 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23034  { 5526 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
23035  { 5533 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23036  { 5533 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23037  { 5539 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23038  { 5539 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23039  { 5545 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23040  { 5545 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23041  { 5551 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23042  { 5551 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23043  { 5557 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23044  { 5557 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23045  { 5565 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23046  { 5565 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23047  { 5573 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23048  { 5573 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23049  { 5581 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23050  { 5581 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23051  { 5587 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23052  { 5587 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23053  { 5593 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23054  { 5593 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23055  { 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23056  { 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23057  { 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23058  { 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23059  { 5614 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23060  { 5614 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23061  { 5620 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23062  { 5620 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23063  { 5629 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23064  { 5629 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23065  { 5638 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23066  { 5638 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23067  { 5647 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23068  { 5647 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23069  { 5655 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23070  { 5655 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23071  { 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23072  { 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23073  { 5668 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23074  { 5668 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23075  { 5668 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23076  { 5668 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23077  { 5675 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23078  { 5675 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23079  { 5675 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23080  { 5675 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23081  { 5683 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23082  { 5683 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23083  { 5683 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23084  { 5683 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23085  { 5690 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23086  { 5690 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23087  { 5701 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23088  { 5701 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23089  { 5701 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23090  { 5701 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23091  { 5708 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23092  { 5708 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23093  { 5708 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23094  { 5708 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23095  { 5716 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23096  { 5716 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23097  { 5716 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23098  { 5716 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23099  { 5723 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23100  { 5723 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23101  { 5729 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23102  { 5729 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23103  { 5735 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23104  { 5735 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
23105  { 5742 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23106  { 5742 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23107  { 5749 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
23108  { 5749 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23109  { 5756 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23110  { 5756 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23111  { 5756 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23112  { 5756 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23113  { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23114  { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23115  { 5763 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23116  { 5763 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23117  { 5773 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23118  { 5773 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23119  { 5773 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23120  { 5773 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23121  { 5781 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23122  { 5781 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23123  { 5788 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23124  { 5788 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23125  { 5795 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23126  { 5795 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23127  { 5795 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23128  { 5795 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23129  { 5802 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23130  { 5802 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23131  { 5802 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23132  { 5802 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23133  { 5809 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23134  { 5809 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23135  { 5816 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23136  { 5816 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23137  { 5823 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23138  { 5823 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23139  { 5830 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23140  { 5830 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23141  { 5837 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23142  { 5837 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23143  { 5837 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23144  { 5837 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23145  { 5844 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23146  { 5844 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23147  { 5844 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23148  { 5844 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23149  { 5851 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23150  { 5851 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23151  { 5858 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23152  { 5858 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23153  { 5865 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR64 }, },
23154  { 5865 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
23155  { 5874 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23156  { 5874 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23157  { 5883 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23158  { 5883 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23159  { 5892 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23160  { 5892 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23161  { 5901 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23162  { 5901 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23163  { 5910 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23164  { 5910 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23165  { 5919 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23166  { 5919 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23167  { 5928 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23168  { 5928 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23169  { 5937 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23170  { 5937 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23171  { 5946 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23172  { 5946 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23173  { 5955 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23174  { 5955 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23175  { 5964 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23176  { 5964 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23177  { 5973 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23178  { 5973 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23179  { 5982 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23180  { 5982 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23181  { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23182  { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23183  { 5989 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23184  { 5989 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23185  { 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23186  { 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23187  { 6006 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23188  { 6006 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23189  { 6006 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23190  { 6006 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23191  { 6014 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23192  { 6014 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23193  { 6014 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23194  { 6014 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23195  { 6021 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23196  { 6021 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23197  { 6028 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23198  { 6028 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23199  { 6028 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23200  { 6028 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23201  { 6035 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23202  { 6035 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23203  { 6035 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23204  { 6035 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23205  { 6043 /* pop */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23206  { 6043 /* pop */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23207  { 6043 /* pop */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23208  { 6043 /* pop */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23209  { 6043 /* pop */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23210  { 6043 /* pop */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23211  { 6043 /* pop */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
23212  { 6043 /* pop */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23213  { 6043 /* pop */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23214  { 6043 /* pop */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
23215  { 6043 /* pop */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23216  { 6043 /* pop */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23217  { 6043 /* pop */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23218  { 6043 /* pop */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23219  { 6043 /* pop */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23220  { 6043 /* pop */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23221  { 6043 /* pop */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23222  { 6043 /* pop */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23223  { 6047 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23224  { 6053 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23225  { 6059 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23226  { 6059 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23227  { 6059 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23228  { 6059 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23229  { 6059 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23230  { 6059 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23231  { 6090 /* popf */, X86::POPF16, Convert_NoOperands, 0, {  }, },
23232  { 6095 /* popfd */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23233  { 6107 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
23234  { 6134 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23235  { 6134 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23236  { 6134 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23237  { 6134 /* por */, X86::PORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23238  { 6138 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23239  { 6147 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23240  { 6159 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23241  { 6170 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23242  { 6181 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23243  { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23244  { 6202 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23245  { 6214 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23246  { 6214 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23247  { 6214 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23248  { 6214 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23249  { 6221 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23250  { 6221 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23251  { 6221 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23252  { 6221 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23253  { 6228 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23254  { 6228 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23255  { 6235 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23256  { 6235 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23257  { 6243 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23258  { 6243 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23259  { 6251 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23260  { 6251 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23261  { 6258 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23262  { 6258 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23263  { 6258 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23264  { 6258 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23265  { 6265 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23266  { 6265 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23267  { 6265 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23268  { 6265 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23269  { 6272 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23270  { 6272 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23271  { 6272 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23272  { 6272 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23273  { 6279 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23274  { 6279 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23275  { 6279 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23276  { 6279 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23277  { 6279 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23278  { 6279 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23279  { 6285 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23280  { 6292 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23281  { 6292 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23282  { 6292 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23283  { 6292 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23284  { 6292 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23285  { 6292 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23286  { 6298 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23287  { 6298 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23288  { 6298 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23289  { 6298 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23290  { 6298 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23291  { 6298 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23292  { 6304 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23293  { 6304 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23294  { 6304 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23295  { 6304 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23296  { 6304 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23297  { 6304 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23298  { 6310 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23299  { 6310 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23300  { 6310 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23301  { 6310 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23302  { 6310 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23303  { 6310 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23304  { 6316 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23305  { 6316 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23306  { 6316 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23307  { 6316 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23308  { 6316 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23309  { 6316 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23310  { 6322 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23311  { 6329 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23312  { 6329 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23313  { 6329 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23314  { 6329 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23315  { 6329 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23316  { 6329 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23317  { 6335 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23318  { 6335 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23319  { 6335 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23320  { 6335 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23321  { 6335 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23322  { 6335 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23323  { 6341 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23324  { 6341 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23325  { 6341 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23326  { 6341 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23327  { 6347 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23328  { 6347 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23329  { 6347 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23330  { 6347 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23331  { 6353 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23332  { 6353 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23333  { 6353 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23334  { 6353 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23335  { 6359 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23336  { 6359 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23337  { 6359 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23338  { 6359 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23339  { 6366 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23340  { 6366 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23341  { 6366 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23342  { 6366 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23343  { 6373 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23344  { 6373 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23345  { 6373 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23346  { 6373 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23347  { 6381 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23348  { 6381 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23349  { 6381 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23350  { 6381 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23351  { 6389 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23352  { 6389 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23353  { 6389 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23354  { 6389 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23355  { 6395 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23356  { 6395 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23357  { 6402 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23358  { 6402 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23359  { 6408 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
23360  { 6408 /* ptwrite */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23361  { 6408 /* ptwrite */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23362  { 6408 /* ptwrite */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23363  { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23364  { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23365  { 6434 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23366  { 6434 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23367  { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23368  { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23369  { 6444 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23370  { 6444 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23371  { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23372  { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23373  { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23374  { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23375  { 6465 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23376  { 6465 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23377  { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23378  { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23379  { 6475 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23380  { 6475 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23381  { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23382  { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23383  { 6485 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23384  { 6485 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23385  { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23386  { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23387  { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23388  { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23389  { 6506 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23390  { 6506 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23391  { 6516 /* push */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23392  { 6516 /* push */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23393  { 6516 /* push */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23394  { 6516 /* push */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23395  { 6516 /* push */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23396  { 6516 /* push */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23397  { 6516 /* push */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23398  { 6516 /* push */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23399  { 6516 /* push */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
23400  { 6516 /* push */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23401  { 6516 /* push */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23402  { 6516 /* push */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
23403  { 6516 /* push */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23404  { 6516 /* push */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23405  { 6516 /* push */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23406  { 6516 /* push */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23407  { 6516 /* push */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23408  { 6516 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
23409  { 6516 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
23410  { 6516 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
23411  { 6516 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
23412  { 6516 /* push */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23413  { 6516 /* push */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
23414  { 6516 /* push */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23415  { 6516 /* push */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23416  { 6516 /* push */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23417  { 6521 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23418  { 6528 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23419  { 6535 /* pushf */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
23420  { 6541 /* pushfd */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23421  { 6555 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
23422  { 6587 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23423  { 6587 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23424  { 6587 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23425  { 6587 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23426  { 6592 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23427  { 6592 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23428  { 6592 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23429  { 6592 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23430  { 6592 /* rcl */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23431  { 6592 /* rcl */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23432  { 6592 /* rcl */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23433  { 6592 /* rcl */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23434  { 6592 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23435  { 6592 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23436  { 6592 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23437  { 6592 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23438  { 6592 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23439  { 6592 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23440  { 6592 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23441  { 6592 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23442  { 6592 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23443  { 6592 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23444  { 6592 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23445  { 6592 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23446  { 6592 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23447  { 6592 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23448  { 6592 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23449  { 6592 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23450  { 6616 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23451  { 6616 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23452  { 6622 /* rcpss */, X86::RCPSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23453  { 6622 /* rcpss */, X86::RCPSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23454  { 6628 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23455  { 6628 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23456  { 6628 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23457  { 6628 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23458  { 6628 /* rcr */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23459  { 6628 /* rcr */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23460  { 6628 /* rcr */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23461  { 6628 /* rcr */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23462  { 6628 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23463  { 6628 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23464  { 6628 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23465  { 6628 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23466  { 6628 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23467  { 6628 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23468  { 6628 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23469  { 6628 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23470  { 6628 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23471  { 6628 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23472  { 6628 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23473  { 6628 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23474  { 6628 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23475  { 6628 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23476  { 6628 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23477  { 6628 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23478  { 6652 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23479  { 6652 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23480  { 6681 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23481  { 6681 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23482  { 6710 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
23483  { 6716 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23484  { 6716 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23485  { 6722 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
23486  { 6729 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
23487  { 6735 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23488  { 6735 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23489  { 6735 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23490  { 6766 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23491  { 6766 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23492  { 6766 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23493  { 6797 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23494  { 6804 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23495  { 6811 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
23496  { 6817 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
23497  { 6824 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
23498  { 6828 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
23499  { 6834 /* ret */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23500  { 6834 /* ret */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
23501  { 6834 /* ret */, X86::RETW, Convert_NoOperands, 0, {  }, },
23502  { 6834 /* ret */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23503  { 6834 /* ret */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23504  { 6834 /* ret */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23505  { 6838 /* retf */, X86::LRETL, Convert_NoOperands, 0, {  }, },
23506  { 6838 /* retf */, X86::LRETW, Convert_NoOperands, 0, {  }, },
23507  { 6838 /* retf */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
23508  { 6838 /* retf */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23509  { 6843 /* retfq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
23510  { 6843 /* retfq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23511  { 6864 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
23512  { 6870 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23513  { 6870 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23514  { 6870 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23515  { 6870 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23516  { 6870 /* rol */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23517  { 6870 /* rol */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23518  { 6870 /* rol */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23519  { 6870 /* rol */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23520  { 6870 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23521  { 6870 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23522  { 6870 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23523  { 6870 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23524  { 6870 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23525  { 6870 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23526  { 6870 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23527  { 6870 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23528  { 6870 /* rol */, X86::ROL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23529  { 6870 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23530  { 6870 /* rol */, X86::ROL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23531  { 6870 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23532  { 6870 /* rol */, X86::ROL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23533  { 6870 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23534  { 6870 /* rol */, X86::ROL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23535  { 6870 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23536  { 6894 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23537  { 6894 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23538  { 6894 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23539  { 6894 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23540  { 6894 /* ror */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23541  { 6894 /* ror */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23542  { 6894 /* ror */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23543  { 6894 /* ror */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23544  { 6894 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23545  { 6894 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23546  { 6894 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23547  { 6894 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23548  { 6894 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23549  { 6894 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23550  { 6894 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23551  { 6894 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23552  { 6894 /* ror */, X86::ROR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23553  { 6894 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23554  { 6894 /* ror */, X86::ROR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23555  { 6894 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23556  { 6894 /* ror */, X86::ROR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23557  { 6894 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23558  { 6894 /* ror */, X86::ROR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23559  { 6894 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23560  { 6918 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23561  { 6918 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23562  { 6918 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23563  { 6918 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23564  { 6935 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23565  { 6935 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23566  { 6943 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23567  { 6943 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23568  { 6951 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23569  { 6951 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23570  { 6959 /* roundss */, X86::ROUNDSSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23571  { 6959 /* roundss */, X86::ROUNDSSm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23572  { 6967 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
23573  { 6971 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23574  { 6971 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23575  { 6979 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23576  { 6979 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23577  { 6987 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23578  { 6996 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
23579  { 7001 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, {  }, },
23580  { 7006 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23581  { 7006 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23582  { 7006 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23583  { 7006 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23584  { 7006 /* sar */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23585  { 7006 /* sar */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23586  { 7006 /* sar */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23587  { 7006 /* sar */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23588  { 7006 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23589  { 7006 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23590  { 7006 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23591  { 7006 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23592  { 7006 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23593  { 7006 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23594  { 7006 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23595  { 7006 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23596  { 7006 /* sar */, X86::SAR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23597  { 7006 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23598  { 7006 /* sar */, X86::SAR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23599  { 7006 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23600  { 7006 /* sar */, X86::SAR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23601  { 7006 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23602  { 7006 /* sar */, X86::SAR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23603  { 7006 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23604  { 7030 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23605  { 7030 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23606  { 7030 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23607  { 7030 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23608  { 7047 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, {  }, },
23609  { 7059 /* sbb */, X86::SBB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23610  { 7059 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23611  { 7059 /* sbb */, X86::SBB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23612  { 7059 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23613  { 7059 /* sbb */, X86::SBB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23614  { 7059 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23615  { 7059 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23616  { 7059 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23617  { 7059 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23618  { 7059 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23619  { 7059 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23620  { 7059 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23621  { 7059 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23622  { 7059 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23623  { 7059 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23624  { 7059 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23625  { 7059 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23626  { 7059 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23627  { 7059 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23628  { 7059 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23629  { 7059 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23630  { 7059 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23631  { 7059 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23632  { 7059 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23633  { 7059 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23634  { 7059 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23635  { 7059 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23636  { 7059 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23637  { 7059 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23638  { 7059 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23639  { 7059 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23640  { 7059 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23641  { 7059 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23642  { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23643  { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23644  { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23645  { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23646  { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23647  { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23648  { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23649  { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
23650  { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23651  { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23652  { 7094 /* scasd */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23653  { 7094 /* scasd */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23654  { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23655  { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
23656  { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23657  { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23658  { 7118 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23659  { 7118 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23660  { 7123 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23661  { 7123 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23662  { 7129 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23663  { 7129 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23664  { 7134 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23665  { 7134 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23666  { 7140 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23667  { 7140 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23668  { 7145 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23669  { 7145 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23670  { 7150 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23671  { 7150 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23672  { 7156 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23673  { 7156 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23674  { 7161 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23675  { 7161 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23676  { 7167 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23677  { 7167 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23678  { 7173 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23679  { 7173 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23680  { 7179 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23681  { 7179 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23682  { 7185 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23683  { 7185 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23684  { 7191 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23685  { 7191 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23686  { 7196 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23687  { 7196 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23688  { 7201 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23689  { 7201 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23690  { 7206 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, {  }, },
23691  { 7215 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, {  }, },
23692  { 7222 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
23693  { 7227 /* sgdtd */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23694  { 7245 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23695  { 7251 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23696  { 7251 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23697  { 7260 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23698  { 7260 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23699  { 7269 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23700  { 7269 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23701  { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23702  { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23703  { 7289 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23704  { 7289 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23705  { 7300 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23706  { 7300 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23707  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23708  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23709  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
23710  { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23711  { 7323 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23712  { 7323 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23713  { 7323 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23714  { 7323 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23715  { 7323 /* shl */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23716  { 7323 /* shl */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23717  { 7323 /* shl */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23718  { 7323 /* shl */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23719  { 7323 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23720  { 7323 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23721  { 7323 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23722  { 7323 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23723  { 7323 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23724  { 7323 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23725  { 7323 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23726  { 7323 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23727  { 7323 /* shl */, X86::SHL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23728  { 7323 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23729  { 7323 /* shl */, X86::SHL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23730  { 7323 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23731  { 7323 /* shl */, X86::SHL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23732  { 7323 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23733  { 7323 /* shl */, X86::SHL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23734  { 7323 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23735  { 7332 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23736  { 7332 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23737  { 7332 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23738  { 7332 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23739  { 7332 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23740  { 7332 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23741  { 7332 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
23742  { 7332 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23743  { 7332 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
23744  { 7332 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23745  { 7332 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
23746  { 7332 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23747  { 7332 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
23748  { 7332 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23749  { 7332 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
23750  { 7332 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23751  { 7332 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
23752  { 7332 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23753  { 7370 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23754  { 7370 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23755  { 7370 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23756  { 7370 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23757  { 7387 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23758  { 7387 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23759  { 7387 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23760  { 7387 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23761  { 7387 /* shr */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23762  { 7387 /* shr */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23763  { 7387 /* shr */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23764  { 7387 /* shr */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23765  { 7387 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23766  { 7387 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23767  { 7387 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23768  { 7387 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23769  { 7387 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23770  { 7387 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23771  { 7387 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23772  { 7387 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23773  { 7387 /* shr */, X86::SHR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23774  { 7387 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23775  { 7387 /* shr */, X86::SHR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23776  { 7387 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23777  { 7387 /* shr */, X86::SHR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23778  { 7387 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23779  { 7387 /* shr */, X86::SHR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23780  { 7387 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23781  { 7396 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23782  { 7396 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23783  { 7396 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23784  { 7396 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23785  { 7396 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23786  { 7396 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23787  { 7396 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
23788  { 7396 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23789  { 7396 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
23790  { 7396 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23791  { 7396 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
23792  { 7396 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23793  { 7396 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
23794  { 7396 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23795  { 7396 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
23796  { 7396 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23797  { 7396 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
23798  { 7396 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23799  { 7434 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23800  { 7434 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23801  { 7434 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23802  { 7434 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23803  { 7451 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23804  { 7451 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23805  { 7458 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23806  { 7458 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23807  { 7465 /* sidt */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
23808  { 7470 /* sidtd */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23809  { 7488 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23810  { 7494 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
23811  { 7501 /* sldt */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23812  { 7501 /* sldt */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23813  { 7501 /* sldt */, X86::SLDT64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23814  { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23815  { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23816  { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
23817  { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
23818  { 7531 /* smsw */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23819  { 7531 /* smsw */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23820  { 7531 /* smsw */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23821  { 7531 /* smsw */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23822  { 7554 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23823  { 7554 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23824  { 7561 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23825  { 7561 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23826  { 7568 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23827  { 7568 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23828  { 7575 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23829  { 7575 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23830  { 7582 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, {  }, },
23831  { 7585 /* stac */, X86::STAC, Convert_NoOperands, 0, {  }, },
23832  { 7590 /* stc */, X86::STC, Convert_NoOperands, 0, {  }, },
23833  { 7594 /* std */, X86::STD, Convert_NoOperands, 0, {  }, },
23834  { 7598 /* stgi */, X86::STGI, Convert_NoOperands, 0, {  }, },
23835  { 7603 /* sti */, X86::STI, Convert_NoOperands, 0, {  }, },
23836  { 7607 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23837  { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23838  { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23839  { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23840  { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23841  { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
23842  { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
23843  { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
23844  { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
23845  { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23846  { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
23847  { 7626 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23848  { 7626 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
23849  { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23850  { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
23851  { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23852  { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
23853  { 7650 /* str */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23854  { 7650 /* str */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23855  { 7650 /* str */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23856  { 7650 /* str */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23857  { 7669 /* sub */, X86::SUB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23858  { 7669 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23859  { 7669 /* sub */, X86::SUB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23860  { 7669 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23861  { 7669 /* sub */, X86::SUB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23862  { 7669 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23863  { 7669 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23864  { 7669 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23865  { 7669 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23866  { 7669 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23867  { 7669 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23868  { 7669 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23869  { 7669 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23870  { 7669 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23871  { 7669 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23872  { 7669 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23873  { 7669 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23874  { 7669 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23875  { 7669 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23876  { 7669 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23877  { 7669 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23878  { 7669 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23879  { 7669 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23880  { 7669 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23881  { 7669 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23882  { 7669 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23883  { 7669 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23884  { 7669 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23885  { 7669 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23886  { 7669 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23887  { 7669 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23888  { 7669 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23889  { 7669 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23890  { 7683 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23891  { 7683 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23892  { 7689 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23893  { 7689 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23894  { 7700 /* subsd */, X86::SUBSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23895  { 7700 /* subsd */, X86::SUBSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23896  { 7706 /* subss */, X86::SUBSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23897  { 7706 /* subss */, X86::SUBSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23898  { 7717 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, {  }, },
23899  { 7724 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, {  }, },
23900  { 7732 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, {  }, },
23901  { 7741 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, 0, {  }, },
23902  { 7758 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, {  }, },
23903  { 7767 /* sysret */, X86::SYSRET, Convert_NoOperands, 0, {  }, },
23904  { 7782 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
23905  { 7790 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23906  { 7790 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23907  { 7790 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23908  { 7790 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23909  { 7813 /* test */, X86::TEST8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23910  { 7813 /* test */, X86::TEST16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23911  { 7813 /* test */, X86::TEST32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23912  { 7813 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23913  { 7813 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23914  { 7813 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23915  { 7813 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
23916  { 7813 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23917  { 7813 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23918  { 7813 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
23919  { 7813 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23920  { 7813 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_GR64, MCK_ImmSExti64i32 }, },
23921  { 7813 /* test */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
23922  { 7813 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23923  { 7813 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23924  { 7813 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
23925  { 7813 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23926  { 7813 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23927  { 7813 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23928  { 7813 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23929  { 7813 /* test */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23930  { 7813 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23931  { 7813 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23932  { 7813 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23933  { 7842 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
23934  { 7849 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23935  { 7849 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23936  { 7849 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23937  { 7849 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23938  { 7849 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23939  { 7849 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23940  { 7876 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23941  { 7876 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23942  { 7876 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23943  { 7876 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23944  { 7896 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23945  { 7896 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23946  { 7904 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23947  { 7904 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23948  { 7912 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, {  }, },
23949  { 7916 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, {  }, },
23950  { 7921 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
23951  { 7921 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, 0, { MCK_GR32 }, },
23952  { 7921 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23953  { 7930 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
23954  { 7937 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23955  { 7937 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23956  { 7946 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23957  { 7946 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23958  { 7955 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23959  { 7955 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23960  { 7964 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23961  { 7964 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23962  { 7973 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
23963  { 7973 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
23964  { 7973 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
23965  { 7983 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
23966  { 7983 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
23967  { 7983 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
23968  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
23969  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
23970  { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
23971  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
23972  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
23973  { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
23974  { 8015 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
23975  { 8015 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
23976  { 8015 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
23977  { 8015 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
23978  { 8015 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
23979  { 8015 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
23980  { 8015 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
23981  { 8015 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
23982  { 8015 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
23983  { 8015 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
23984  { 8015 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
23985  { 8015 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
23986  { 8015 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
23987  { 8015 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
23988  { 8015 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
23989  { 8015 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
23990  { 8015 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
23991  { 8015 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
23992  { 8015 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
23993  { 8015 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
23994  { 8015 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
23995  { 8015 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
23996  { 8015 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
23997  { 8015 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
23998  { 8015 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
23999  { 8015 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24000  { 8015 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24001  { 8015 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24002  { 8015 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24003  { 8015 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24004  { 8015 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24005  { 8015 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24006  { 8015 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24007  { 8015 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24008  { 8022 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24009  { 8022 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24010  { 8022 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24011  { 8022 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24012  { 8022 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24013  { 8022 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24014  { 8022 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24015  { 8022 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24016  { 8022 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24017  { 8022 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24018  { 8022 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24019  { 8022 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24020  { 8022 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24021  { 8022 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24022  { 8022 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24023  { 8022 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24024  { 8022 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24025  { 8022 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24026  { 8022 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24027  { 8022 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24028  { 8022 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24029  { 8022 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24030  { 8022 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24031  { 8022 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24032  { 8022 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24033  { 8022 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24034  { 8022 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24035  { 8022 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24036  { 8022 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24037  { 8022 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24038  { 8022 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24039  { 8022 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24040  { 8022 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24041  { 8022 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24042  { 8029 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24043  { 8029 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24044  { 8029 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24045  { 8029 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
24046  { 8029 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24047  { 8029 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24048  { 8029 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24049  { 8029 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24050  { 8029 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
24051  { 8029 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24052  { 8029 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24053  { 8036 /* vaddss */, X86::VADDSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24054  { 8036 /* vaddss */, X86::VADDSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24055  { 8036 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24056  { 8036 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
24057  { 8036 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24058  { 8036 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24059  { 8036 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24060  { 8036 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24061  { 8036 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
24062  { 8036 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24063  { 8036 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24064  { 8043 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24065  { 8043 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24066  { 8043 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24067  { 8043 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24068  { 8053 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24069  { 8053 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24070  { 8053 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24071  { 8053 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24072  { 8063 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24073  { 8063 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24074  { 8063 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24075  { 8063 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24076  { 8063 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24077  { 8063 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24078  { 8063 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24079  { 8063 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24080  { 8063 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24081  { 8063 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24082  { 8071 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24083  { 8071 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24084  { 8071 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24085  { 8071 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24086  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24087  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24088  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24089  { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24090  { 8071 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24091  { 8071 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24092  { 8083 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24093  { 8083 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24094  { 8083 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24095  { 8083 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24096  { 8083 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24097  { 8083 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24098  { 8083 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24099  { 8083 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24100  { 8083 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24101  { 8083 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24102  { 8091 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24103  { 8091 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24104  { 8091 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24105  { 8091 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24106  { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24107  { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24108  { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24109  { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24110  { 8091 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24111  { 8091 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24112  { 8103 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24113  { 8103 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24114  { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24115  { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24116  { 8128 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24117  { 8128 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24118  { 8128 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24119  { 8128 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24120  { 8128 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24121  { 8128 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24122  { 8128 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24123  { 8128 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24124  { 8128 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24125  { 8128 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24126  { 8128 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24127  { 8128 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24128  { 8128 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24129  { 8128 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24130  { 8128 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24131  { 8128 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24132  { 8128 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24133  { 8128 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24134  { 8128 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24135  { 8128 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24136  { 8128 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24137  { 8128 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24138  { 8128 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24139  { 8128 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24140  { 8128 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24141  { 8128 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24142  { 8128 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24143  { 8136 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24144  { 8136 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24145  { 8136 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24146  { 8136 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24147  { 8136 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24148  { 8136 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24149  { 8136 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24150  { 8136 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24151  { 8136 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24152  { 8136 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24153  { 8136 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24154  { 8136 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24155  { 8136 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24156  { 8136 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24157  { 8136 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24158  { 8136 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24159  { 8136 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24160  { 8136 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24161  { 8136 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24162  { 8136 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24163  { 8136 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24164  { 8136 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24165  { 8136 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24166  { 8136 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24167  { 8136 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24168  { 8136 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24169  { 8136 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24170  { 8144 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24171  { 8144 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24172  { 8144 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24173  { 8144 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24174  { 8144 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24175  { 8144 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24176  { 8144 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24177  { 8144 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24178  { 8144 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24179  { 8144 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24180  { 8144 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24181  { 8144 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24182  { 8144 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24183  { 8144 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24184  { 8144 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24185  { 8144 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24186  { 8144 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24187  { 8144 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24188  { 8144 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24189  { 8144 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24190  { 8144 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24191  { 8144 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24192  { 8144 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24193  { 8144 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24194  { 8144 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24195  { 8144 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24196  { 8144 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24197  { 8144 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24198  { 8144 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24199  { 8144 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24200  { 8144 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24201  { 8152 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24202  { 8152 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24203  { 8152 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24204  { 8152 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24205  { 8152 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24206  { 8152 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24207  { 8152 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24208  { 8152 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24209  { 8152 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24210  { 8152 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24211  { 8152 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24212  { 8152 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24213  { 8152 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24214  { 8152 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24215  { 8152 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24216  { 8152 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24217  { 8152 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24218  { 8152 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24219  { 8152 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24220  { 8152 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24221  { 8152 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24222  { 8152 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24223  { 8152 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24224  { 8152 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24225  { 8152 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24226  { 8152 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24227  { 8152 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24228  { 8152 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24229  { 8152 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24230  { 8152 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24231  { 8152 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24232  { 8160 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24233  { 8160 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24234  { 8160 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24235  { 8160 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24236  { 8160 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24237  { 8160 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24238  { 8160 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24239  { 8160 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24240  { 8160 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24241  { 8160 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24242  { 8160 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24243  { 8160 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24244  { 8160 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24245  { 8160 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24246  { 8160 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24247  { 8160 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24248  { 8160 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24249  { 8160 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24250  { 8160 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24251  { 8160 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24252  { 8160 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24253  { 8160 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24254  { 8160 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24255  { 8160 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24256  { 8160 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24257  { 8160 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24258  { 8160 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24259  { 8160 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24260  { 8160 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24261  { 8160 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24262  { 8160 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24263  { 8167 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24264  { 8167 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24265  { 8167 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24266  { 8167 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24267  { 8167 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24268  { 8167 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24269  { 8167 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24270  { 8167 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24271  { 8167 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24272  { 8167 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24273  { 8167 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24274  { 8167 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24275  { 8167 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24276  { 8167 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24277  { 8167 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24278  { 8167 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24279  { 8167 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24280  { 8167 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24281  { 8167 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24282  { 8167 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24283  { 8167 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24284  { 8167 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24285  { 8167 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24286  { 8167 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24287  { 8167 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24288  { 8167 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24289  { 8167 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24290  { 8167 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24291  { 8167 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24292  { 8167 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24293  { 8167 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24294  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24295  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24296  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24297  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24298  { 8174 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24299  { 8174 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24300  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24301  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24302  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24303  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24304  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24305  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24306  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24307  { 8174 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24308  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24309  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24310  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24311  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24312  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24313  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24314  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24315  { 8174 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24316  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24317  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24318  { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24319  { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24320  { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24321  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24322  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24323  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24324  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24325  { 8184 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24326  { 8184 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24327  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24328  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24329  { 8184 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24330  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24331  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24332  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24333  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24334  { 8184 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24335  { 8184 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24336  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24337  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24338  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24339  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24340  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24341  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24342  { 8184 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24343  { 8184 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24344  { 8184 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24345  { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24346  { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24347  { 8184 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24348  { 8194 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24349  { 8194 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24350  { 8194 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24351  { 8194 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24352  { 8203 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24353  { 8203 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24354  { 8203 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24355  { 8203 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24356  { 8212 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24357  { 8212 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24358  { 8212 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24359  { 8212 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24360  { 8222 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24361  { 8222 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24362  { 8222 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24363  { 8222 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24364  { 8232 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24365  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24366  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24367  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24368  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24369  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24370  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24371  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24372  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24373  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24374  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24375  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24376  { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24377  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24378  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24379  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24380  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24381  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24382  { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24383  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24384  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24385  { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24386  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24387  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24388  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24389  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24390  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24391  { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24392  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24393  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24394  { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24395  { 8327 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24396  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24397  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24398  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24399  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24400  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24401  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24402  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24403  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24404  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24405  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24406  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24407  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24408  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24409  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24410  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24411  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24412  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24413  { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24414  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24415  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24416  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24417  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24418  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24419  { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24420  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24421  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24422  { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24423  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24424  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24425  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24426  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24427  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24428  { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24429  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24430  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24431  { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24432  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24433  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
24434  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24435  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24436  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24437  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24438  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24439  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24440  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24441  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24442  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24443  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24444  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24445  { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24446  { 8435 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24447  { 8435 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24448  { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24449  { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
24450  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24451  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
24452  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24453  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
24454  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24455  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32 }, },
24456  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24457  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24458  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24459  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24460  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24461  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24462  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24463  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24464  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24465  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24466  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24467  { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24468  { 8448 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24469  { 8448 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24470  { 8448 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24471  { 8448 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24472  { 8448 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24473  { 8448 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24474  { 8448 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24475  { 8448 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24476  { 8448 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24477  { 8448 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24478  { 8448 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24479  { 8448 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24480  { 8448 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24481  { 8448 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24482  { 8448 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24483  { 8448 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24484  { 8448 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24485  { 8448 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24486  { 8448 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24487  { 8448 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24488  { 8448 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24489  { 8448 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_Mem64 }, },
24490  { 8448 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24491  { 8448 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24492  { 8448 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24493  { 8448 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_Mem32 }, },
24494  { 8448 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24495  { 8448 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24496  { 8448 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24497  { 8448 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24498  { 8448 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24499  { 8448 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24500  { 8448 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24501  { 8448 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24502  { 8448 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24503  { 8448 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24504  { 8448 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24505  { 8448 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24506  { 8448 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24507  { 8448 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24508  { 8448 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24509  { 8448 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24510  { 8448 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24511  { 8448 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24512  { 8448 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24513  { 8448 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24514  { 8448 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24515  { 8448 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24516  { 8448 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24517  { 8448 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24518  { 8448 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24519  { 8448 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24520  { 8448 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24521  { 8448 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24522  { 8448 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24523  { 8448 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24524  { 8448 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24525  { 8448 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24526  { 8448 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24527  { 8448 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24528  { 8448 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24529  { 8448 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24530  { 8448 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24531  { 8448 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24532  { 8453 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24533  { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24534  { 8453 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24535  { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24536  { 8453 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24537  { 8453 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24538  { 8453 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24539  { 8453 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24540  { 8453 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24541  { 8453 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24542  { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24543  { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24544  { 8453 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24545  { 8453 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24546  { 8453 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24547  { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24548  { 8453 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24549  { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24550  { 8453 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24551  { 8453 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24552  { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24553  { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24554  { 8453 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24555  { 8453 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24556  { 8460 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24557  { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24558  { 8460 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24559  { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24560  { 8460 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24561  { 8460 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24562  { 8460 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24563  { 8460 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24564  { 8460 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24565  { 8460 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24566  { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24567  { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24568  { 8460 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24569  { 8460 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24570  { 8460 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24571  { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24572  { 8460 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24573  { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24574  { 8460 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24575  { 8460 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24576  { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24577  { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24578  { 8460 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24579  { 8460 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24580  { 8467 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24581  { 8467 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24582  { 8467 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24583  { 8467 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24584  { 8467 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24585  { 8467 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24586  { 8467 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24587  { 8467 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24588  { 8474 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24589  { 8474 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24590  { 8474 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24591  { 8474 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24592  { 8474 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24593  { 8474 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24594  { 8474 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24595  { 8474 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24596  { 8481 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24597  { 8481 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24598  { 8481 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24599  { 8481 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24600  { 8481 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24601  { 8489 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24602  { 8489 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24603  { 8489 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24604  { 8489 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
24605  { 8489 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24606  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24607  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24608  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24609  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
24610  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
24611  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
24612  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24613  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24614  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24615  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24616  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24617  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24618  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24619  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24620  { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24621  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24622  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24623  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24624  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
24625  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
24626  { 8509 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
24627  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24628  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24629  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24630  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24631  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24632  { 8509 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24633  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24634  { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24635  { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24636  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24637  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24638  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24639  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24640  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24641  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24642  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24643  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24644  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
24645  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24646  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
24647  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
24648  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
24649  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24650  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24651  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24652  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24653  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24654  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24655  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24656  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24657  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24658  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24659  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24660  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24661  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24662  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24663  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24664  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24665  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24666  { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24667  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24668  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24669  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
24670  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
24671  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24672  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24673  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24674  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
24675  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24676  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
24677  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24678  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24679  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24680  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24681  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24682  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24683  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24684  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24685  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24686  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24687  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24688  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24689  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24690  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24691  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24692  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24693  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24694  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24695  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24696  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24697  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24698  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24699  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24700  { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24701  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24702  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24703  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24704  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24705  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24706  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24707  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24708  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24709  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
24710  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
24711  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24712  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24713  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24714  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24715  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24716  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24717  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24718  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24719  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24720  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24721  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24722  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24723  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24724  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24725  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24726  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24727  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24728  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24729  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24730  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24731  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24732  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24733  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24734  { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24735  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24736  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24737  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24738  { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24739  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24740  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24741  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24742  { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24743  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24744  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24745  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24746  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24747  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24748  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24749  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24750  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24751  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
24752  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
24753  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24754  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24755  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24756  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24757  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24758  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24759  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24760  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24761  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24762  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24763  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24764  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24765  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24766  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24767  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24768  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24769  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24770  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24771  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24772  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24773  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24774  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24775  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24776  { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24777  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24778  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24779  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24780  { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24781  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24782  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24783  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24784  { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24785  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24786  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24787  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24788  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
24789  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24790  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
24791  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24792  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24793  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24794  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24795  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24796  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24797  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24798  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24799  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24800  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24801  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24802  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24803  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24804  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24805  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24806  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24807  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24808  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24809  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24810  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24811  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24812  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24813  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24814  { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24815  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24816  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24817  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24818  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24819  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
24820  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
24821  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24822  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24823  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24824  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24825  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24826  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24827  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24828  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24829  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24830  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24831  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24832  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24833  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24834  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24835  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24836  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24837  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24838  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24839  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24840  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24841  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24842  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24843  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24844  { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24845  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24846  { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24847  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24848  { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24849  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24850  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24851  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24852  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
24853  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24854  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
24855  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24856  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24857  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24858  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24859  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24860  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24861  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24862  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24863  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24864  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24865  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24866  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24867  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24868  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24869  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24870  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24871  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24872  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24873  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24874  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24875  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24876  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24877  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24878  { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24879  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24880  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24881  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24882  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24883  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24884  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24885  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24886  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24887  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
24888  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24889  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
24890  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24891  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24892  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24893  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24894  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24895  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24896  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24897  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24898  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24899  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24900  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24901  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24902  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
24903  { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
24904  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24905  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24906  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
24907  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
24908  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24909  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24910  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24911  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
24912  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24913  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
24914  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24915  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24916  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24917  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24918  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24919  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24920  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24921  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24922  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24923  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24924  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24925  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24926  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24927  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24928  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24929  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24930  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24931  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24932  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24933  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24934  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24935  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24936  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24937  { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24938  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24939  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24940  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24941  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24942  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24943  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24944  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24945  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24946  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
24947  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24948  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
24949  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
24950  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
24951  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
24952  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24953  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24954  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24955  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24956  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24957  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24958  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24959  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24960  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24961  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24962  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24963  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24964  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24965  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24966  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
24967  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24968  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24969  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24970  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
24971  { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24972  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24973  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
24974  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24975  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24976  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
24977  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
24978  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24979  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
24980  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24981  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24982  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24983  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24984  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24985  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
24986  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24987  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
24988  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24989  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24990  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24991  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
24992  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24993  { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24994  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24995  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24996  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24997  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24998  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
24999  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25000  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25001  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25002  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25003  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25004  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25005  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25006  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25007  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25008  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25009  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25010  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25011  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25012  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25013  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25014  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25015  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25016  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25017  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25018  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25019  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25020  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25021  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25022  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25023  { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25024  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25025  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25026  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25027  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25028  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25029  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25030  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25031  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25032  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25033  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25034  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25035  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25036  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25037  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25038  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25039  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25040  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25041  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25042  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25043  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25044  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25045  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25046  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25047  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25048  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25049  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25050  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25051  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25052  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25053  { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25054  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25055  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25056  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25057  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25058  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25059  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25060  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25061  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25062  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25063  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25064  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25065  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25066  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25067  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25068  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25069  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25070  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25071  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25072  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25073  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25074  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25075  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25076  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25077  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25078  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25079  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25080  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25081  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25082  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25083  { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25084  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25085  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25086  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25087  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25088  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25089  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25090  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25091  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25092  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25093  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25094  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25095  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25096  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25097  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25098  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25099  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25100  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25101  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25102  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25103  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25104  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25105  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25106  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25107  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25108  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25109  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25110  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25111  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25112  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25113  { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25114  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25115  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25116  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25117  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25118  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25119  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25120  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25121  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25122  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25123  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25124  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25125  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25126  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25127  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25128  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25129  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25130  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25131  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25132  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25133  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25134  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25135  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25136  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25137  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25138  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25139  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25140  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25141  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25142  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25143  { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25144  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25145  { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25146  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25147  { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25148  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25149  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25150  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25151  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25152  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25153  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25154  { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25155  { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25156  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25157  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25158  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25159  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25160  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25161  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25162  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25163  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25164  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25165  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25166  { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25167  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25168  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25169  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25170  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25171  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25172  { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25173  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25174  { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25175  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25176  { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25177  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25178  { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25179  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25180  { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25181  { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25182  { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25183  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25184  { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25185  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25186  { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25187  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25188  { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25189  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25190  { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25191  { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25192  { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25193  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25194  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25195  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25196  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25197  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25198  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25199  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25200  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25201  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25202  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25203  { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25204  { 8926 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25205  { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25206  { 8926 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25207  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25208  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25209  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25210  { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25211  { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25212  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25213  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25214  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25215  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25216  { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25217  { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25218  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25219  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25220  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25221  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25222  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25223  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25224  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25225  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25226  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25227  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25228  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25229  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25230  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25231  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25232  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25233  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25234  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25235  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25236  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25237  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25238  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25239  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25240  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25241  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25242  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25243  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25244  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25245  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25246  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25247  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25248  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25249  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25250  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25251  { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25252  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25253  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25254  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25255  { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25256  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25257  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25258  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25259  { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25260  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25261  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25262  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25263  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25264  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25265  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25266  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25267  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25268  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25269  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25270  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25271  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25272  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25273  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25274  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25275  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25276  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25277  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25278  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25279  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25280  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25281  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25282  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25283  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25284  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25285  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25286  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25287  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25288  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25289  { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25290  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25291  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25292  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25293  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25294  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25295  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25296  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25297  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25298  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25299  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25300  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25301  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25302  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25303  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25304  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25305  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25306  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25307  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25308  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25309  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25310  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25311  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25312  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25313  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25314  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25315  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25316  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25317  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25318  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25319  { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25320  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25321  { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25322  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25323  { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25324  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25325  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25326  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25327  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25328  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25329  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25330  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25331  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25332  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25333  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25334  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25335  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25336  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25337  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25338  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25339  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25340  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25341  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25342  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25343  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25344  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25345  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25346  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25347  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25348  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25349  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25350  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25351  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25352  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25353  { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25354  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25355  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25356  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
25357  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
25358  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25359  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25360  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25361  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25362  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25363  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25364  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25365  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25366  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25367  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25368  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25369  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25370  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25371  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25372  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25373  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25374  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25375  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25376  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25377  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25378  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25379  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25380  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25381  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25382  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25383  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25384  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25385  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25386  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25387  { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25388  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25389  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25390  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25391  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25392  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25393  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25394  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25395  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25396  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25397  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25398  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25399  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25400  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25401  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25402  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25403  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25404  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25405  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25406  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25407  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25408  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25409  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25410  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25411  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25412  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25413  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25414  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25415  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25416  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25417  { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25418  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25419  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25420  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25421  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25422  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25423  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25424  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25425  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25426  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25427  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25428  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25429  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25430  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25431  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25432  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25433  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25434  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25435  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25436  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25437  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25438  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25439  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25440  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25441  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25442  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25443  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25444  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25445  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25446  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25447  { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25448  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25449  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25450  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25451  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25452  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25453  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25454  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25455  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25456  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25457  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25458  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25459  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25460  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25461  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25462  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25463  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25464  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25465  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25466  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25467  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25468  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25469  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25470  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25471  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25472  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25473  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25474  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25475  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25476  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25477  { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25478  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25479  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25480  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25481  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25482  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25483  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25484  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25485  { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25486  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25487  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25488  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25489  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25490  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25491  { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25492  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25493  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25494  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25495  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25496  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25497  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25498  { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25499  { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25500  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25501  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25502  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25503  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25504  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25505  { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25506  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25507  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25508  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25509  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25510  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25511  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25512  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25513  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25514  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25515  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25516  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25517  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25518  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25519  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25520  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25521  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25522  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25523  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25524  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25525  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25526  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25527  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25528  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25529  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25530  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25531  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25532  { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25533  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25534  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25535  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25536  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25537  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25538  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25539  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25540  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25541  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25542  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25543  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25544  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25545  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25546  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25547  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25548  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25549  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25550  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25551  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25552  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25553  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25554  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25555  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25556  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25557  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25558  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25559  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25560  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25561  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25562  { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25563  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25564  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25565  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25566  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25567  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25568  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25569  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25570  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25571  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25572  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25573  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25574  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25575  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25576  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25577  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25578  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25579  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25580  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25581  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25582  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25583  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25584  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25585  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25586  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25587  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25588  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25589  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25590  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25591  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25592  { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25593  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25594  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25595  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25596  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25597  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25598  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25599  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25600  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25601  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25602  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25603  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25604  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25605  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25606  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25607  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25608  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25609  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25610  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25611  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25612  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25613  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25614  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25615  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25616  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25617  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25618  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25619  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25620  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25621  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25622  { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25623  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25624  { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25625  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25626  { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25627  { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25628  { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25629  { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25630  { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25631  { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25632  { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25633  { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25634  { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25635  { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25636  { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25637  { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25638  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25639  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25640  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25641  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25642  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25643  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25644  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25645  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25646  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25647  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25648  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25649  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25650  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25651  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25652  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25653  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25654  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25655  { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25656  { 9429 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25657  { 9429 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25658  { 9429 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25659  { 9429 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25660  { 9429 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25661  { 9429 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25662  { 9429 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25663  { 9429 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25664  { 9429 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25665  { 9429 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25666  { 9429 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25667  { 9429 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25668  { 9429 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25669  { 9429 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25670  { 9429 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25671  { 9429 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25672  { 9429 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25673  { 9429 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25674  { 9429 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25675  { 9429 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25676  { 9429 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25677  { 9429 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25678  { 9429 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25679  { 9429 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25680  { 9429 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25681  { 9429 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25682  { 9429 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25683  { 9429 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25684  { 9429 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25685  { 9429 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25686  { 9429 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25687  { 9429 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25688  { 9429 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25689  { 9429 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25690  { 9436 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25691  { 9436 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25692  { 9436 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25693  { 9436 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25694  { 9436 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25695  { 9436 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25696  { 9436 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25697  { 9436 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25698  { 9436 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25699  { 9436 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25700  { 9436 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25701  { 9436 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25702  { 9436 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25703  { 9436 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25704  { 9436 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25705  { 9436 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25706  { 9436 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25707  { 9436 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25708  { 9436 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25709  { 9436 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25710  { 9436 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25711  { 9436 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25712  { 9436 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25713  { 9436 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25714  { 9436 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25715  { 9436 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25716  { 9436 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25717  { 9436 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25718  { 9436 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25719  { 9436 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25720  { 9436 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25721  { 9436 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25722  { 9436 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25723  { 9436 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25724  { 9443 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25725  { 9443 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25726  { 9443 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25727  { 9443 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25728  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25729  { 9443 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25730  { 9443 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25731  { 9443 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25732  { 9443 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25733  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25734  { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25735  { 9450 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25736  { 9450 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25737  { 9450 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25738  { 9450 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25739  { 9450 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25740  { 9450 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25741  { 9450 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25742  { 9450 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25743  { 9450 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25744  { 9450 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25745  { 9450 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25746  { 9457 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25747  { 9457 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25748  { 9463 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25749  { 9463 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25750  { 9463 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25751  { 9463 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25752  { 9469 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
25753  { 9469 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
25754  { 9474 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
25755  { 9474 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
25756  { 9479 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25757  { 9479 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25758  { 9479 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25759  { 9479 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25760  { 9479 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25761  { 9479 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25762  { 9479 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25763  { 9479 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25764  { 9479 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25765  { 9479 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25766  { 9479 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25767  { 9479 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25768  { 9487 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25769  { 9487 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25770  { 9487 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25771  { 9487 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25772  { 9487 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25773  { 9487 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25774  { 9487 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25775  { 9487 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25776  { 9487 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25777  { 9487 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25778  { 9487 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25779  { 9487 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25780  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25781  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25782  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25783  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25784  { 9495 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25785  { 9495 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25786  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25787  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25788  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25789  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25790  { 9495 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25791  { 9495 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25792  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25793  { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25794  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25795  { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25796  { 9495 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25797  { 9495 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25798  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25799  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25800  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25801  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25802  { 9505 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25803  { 9505 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25804  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25805  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25806  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25807  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25808  { 9505 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25809  { 9505 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25810  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25811  { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25812  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25813  { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25814  { 9505 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25815  { 9505 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25816  { 9515 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25817  { 9515 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25818  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25819  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25820  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25821  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25822  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25823  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25824  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25825  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25826  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25827  { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25828  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25829  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25830  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25831  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25832  { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25833  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25834  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25835  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25836  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25837  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25838  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25839  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25840  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25841  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25842  { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25843  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25844  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25845  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25846  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25847  { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25848  { 9584 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25849  { 9584 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25850  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25851  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25852  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25853  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25854  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25855  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25856  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25857  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25858  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25859  { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25860  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25861  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25862  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25863  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25864  { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25865  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25866  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25867  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25868  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25869  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25870  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25871  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25872  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25873  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25874  { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25875  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25876  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25877  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25878  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25879  { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25880  { 9653 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25881  { 9653 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
25882  { 9653 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25883  { 9653 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25884  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25885  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25886  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25887  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25888  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25889  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25890  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25891  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25892  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25893  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25894  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25895  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25896  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25897  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25898  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25899  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25900  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25901  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25902  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25903  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25904  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25905  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25906  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25907  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25908  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25909  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25910  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25911  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25912  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25913  { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25914  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25915  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25916  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25917  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25918  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25919  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25920  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25921  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25922  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25923  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25924  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25925  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25926  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25927  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25928  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25929  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25930  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25931  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25932  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25933  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25934  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25935  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25936  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25937  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25938  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25939  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25940  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25941  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25942  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25943  { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25944  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25945  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25946  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25947  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25948  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25949  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25950  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25951  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25952  { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25953  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25954  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25955  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25956  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25957  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25958  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25959  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25960  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25961  { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25962  { 9712 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25963  { 9712 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25964  { 9712 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25965  { 9712 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25966  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25967  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25968  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25969  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25970  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25971  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25972  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25973  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25974  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25975  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25976  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25977  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25978  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25979  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25980  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25981  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25982  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25983  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25984  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25985  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25986  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25987  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25988  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25989  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25990  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25991  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25992  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25993  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25994  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25995  { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25996  { 9724 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25997  { 9724 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25998  { 9724 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25999  { 9724 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26000  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26001  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26002  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26003  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26004  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26005  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26006  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26007  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26008  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26009  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26010  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26011  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26012  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26013  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26014  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26015  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26016  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26017  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26018  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26019  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26020  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26021  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26022  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26023  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26024  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26025  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26026  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26027  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26028  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26029  { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26030  { 9736 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26031  { 9736 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26032  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26033  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26034  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26035  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26036  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26037  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26038  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26039  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26040  { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26041  { 9748 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26042  { 9748 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26043  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26044  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26045  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26046  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26047  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26048  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26049  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26050  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26051  { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26052  { 9760 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26053  { 9760 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26054  { 9760 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26055  { 9760 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26056  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26057  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26058  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26059  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26060  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26061  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26062  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26063  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26064  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26065  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26066  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26067  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26068  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26069  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26070  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26071  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26072  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26073  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26074  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26075  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26076  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26077  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26078  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26079  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26080  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26081  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26082  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26083  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26084  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26085  { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26086  { 9772 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26087  { 9772 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26088  { 9772 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26089  { 9772 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26090  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26091  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26092  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26093  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26094  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26095  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26096  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26097  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26098  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26099  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26100  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26101  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26102  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26103  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26104  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26105  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26106  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26107  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26108  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26109  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26110  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26111  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26112  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26113  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26114  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26115  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26116  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26117  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26118  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26119  { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26120  { 9784 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26121  { 9784 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26122  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26123  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26124  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26125  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26126  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26127  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26128  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26129  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26130  { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26131  { 9796 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26132  { 9796 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26133  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26134  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26135  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26136  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26137  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26138  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26139  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26140  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26141  { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26142  { 9808 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26143  { 9808 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26144  { 9808 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26145  { 9808 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26146  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26147  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26148  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26149  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26150  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26151  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26152  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26153  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26154  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26155  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26156  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26157  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26158  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26159  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26160  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26161  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26162  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26163  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26164  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26165  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26166  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26167  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26168  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26169  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26170  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26171  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26172  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26173  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26174  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26175  { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26176  { 9820 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26177  { 9820 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26178  { 9820 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26179  { 9820 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26180  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26181  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26182  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26183  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26184  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26185  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26186  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26187  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26188  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26189  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26190  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26191  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26192  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26193  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26194  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26195  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26196  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26197  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26198  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26199  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26200  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26201  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26202  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26203  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26204  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26205  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26206  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26207  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26208  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26209  { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26210  { 9832 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26211  { 9832 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26212  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26213  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26214  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26215  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26216  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26217  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26218  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26219  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26220  { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26221  { 9844 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26222  { 9844 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26223  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26224  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26225  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26226  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26227  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26228  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26229  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26230  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26231  { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26232  { 9856 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26233  { 9856 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26234  { 9856 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26235  { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26236  { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26237  { 9856 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26238  { 9865 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26239  { 9865 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26240  { 9865 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26241  { 9865 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26242  { 9865 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26243  { 9865 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26244  { 9874 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26245  { 9874 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26246  { 9874 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
26247  { 9883 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26248  { 9883 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26249  { 9883 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
26250  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26251  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26252  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26253  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26254  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26255  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26256  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26257  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26258  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26259  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26260  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26261  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26262  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26263  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26264  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26265  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26266  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26267  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26268  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26269  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26270  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26271  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26272  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26273  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26274  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26275  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26276  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26277  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26278  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26279  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26280  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26281  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26282  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26283  { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26284  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26285  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26286  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26287  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26288  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26289  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26290  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26291  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26292  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26293  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26294  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26295  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26296  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26297  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26298  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26299  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26300  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26301  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26302  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26303  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26304  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26305  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26306  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26307  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26308  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26309  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26310  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26311  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26312  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26313  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26314  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26315  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26316  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26317  { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26318  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26319  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26320  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26321  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26322  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26323  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26324  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26325  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26326  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26327  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26328  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26329  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26330  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26331  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26332  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26333  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26334  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26335  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26336  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26337  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26338  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26339  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26340  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26341  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26342  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26343  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26344  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26345  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26346  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26347  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26348  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26349  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26350  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26351  { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26352  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26353  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26354  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26355  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26356  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26357  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26358  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26359  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26360  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26361  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26362  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26363  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26364  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26365  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26366  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26367  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26368  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26369  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26370  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26371  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26372  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26373  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26374  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26375  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26376  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26377  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26378  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26379  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26380  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26381  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26382  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26383  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26384  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26385  { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26386  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26387  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26388  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26389  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26390  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26391  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26392  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26393  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26394  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26395  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26396  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26397  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26398  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26399  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26400  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26401  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26402  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26403  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26404  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26405  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26406  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26407  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26408  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26409  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26410  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26411  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26412  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26413  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26414  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26415  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26416  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26417  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26418  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26419  { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26420  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26421  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26422  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26423  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26424  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26425  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26426  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26427  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26428  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26429  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26430  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26431  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26432  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26433  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26434  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26435  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26436  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26437  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26438  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26439  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26440  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26441  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26442  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26443  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26444  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26445  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26446  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26447  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26448  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26449  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26450  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26451  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26452  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26453  { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26454  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26455  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26456  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26457  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26458  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26459  { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26460  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26461  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26462  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26463  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26464  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26465  { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26466  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26467  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26468  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26469  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26470  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26471  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26472  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26473  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26474  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26475  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26476  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26477  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26478  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26479  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26480  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26481  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26482  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26483  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26484  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26485  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26486  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26487  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26488  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26489  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26490  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26491  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26492  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26493  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26494  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26495  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26496  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26497  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26498  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26499  { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26500  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26501  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26502  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26503  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26504  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26505  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26506  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26507  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26508  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26509  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26510  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26511  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26512  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26513  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26514  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26515  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26516  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26517  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26518  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26519  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26520  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26521  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26522  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26523  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26524  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26525  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26526  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26527  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26528  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26529  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26530  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26531  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26532  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26533  { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26534  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26535  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26536  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26537  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26538  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26539  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26540  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26541  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26542  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26543  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26544  { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26545  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26546  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26547  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26548  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26549  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26550  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26551  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26552  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26553  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26554  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26555  { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26556  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26557  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26558  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26559  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26560  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26561  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26562  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26563  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26564  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26565  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26566  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26567  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26568  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26569  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26570  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26571  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26572  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26573  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26574  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26575  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26576  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26577  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26578  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26579  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26580  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26581  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26582  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26583  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26584  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26585  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26586  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26587  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26588  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26589  { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26590  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26591  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26592  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26593  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26594  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26595  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26596  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26597  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26598  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26599  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26600  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26601  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26602  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26603  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26604  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26605  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26606  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26607  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26608  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26609  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26610  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26611  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26612  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26613  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26614  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26615  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26616  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26617  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26618  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26619  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26620  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26621  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26622  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26623  { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26624  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26625  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26626  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26627  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26628  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26629  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26630  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26631  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26632  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26633  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26634  { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26635  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26636  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26637  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26638  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26639  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26640  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26641  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26642  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26643  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26644  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26645  { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26646  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26647  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26648  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26649  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26650  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26651  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26652  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26653  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26654  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26655  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26656  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26657  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26658  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26659  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26660  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26661  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26662  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26663  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26664  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26665  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26666  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26667  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26668  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26669  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26670  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26671  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26672  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26673  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26674  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26675  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26676  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26677  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26678  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26679  { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26680  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26681  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26682  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26683  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26684  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26685  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26686  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26687  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26688  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26689  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26690  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26691  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26692  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26693  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26694  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26695  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26696  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26697  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26698  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26699  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26700  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26701  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26702  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26703  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26704  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26705  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26706  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26707  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26708  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26709  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26710  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26711  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26712  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26713  { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26714  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26715  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26716  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26717  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26718  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26719  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26720  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26721  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26722  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26723  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26724  { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26725  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26726  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26727  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26728  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26729  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26730  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26731  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26732  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26733  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26734  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26735  { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26736  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26737  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26738  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26739  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26740  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26741  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26742  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26743  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26744  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26745  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26746  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26747  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26748  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26749  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26750  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26751  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26752  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26753  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26754  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26755  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26756  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26757  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26758  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26759  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26760  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26761  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26762  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26763  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26764  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26765  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26766  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26767  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26768  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26769  { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26770  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26771  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26772  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26773  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26774  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26775  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26776  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26777  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26778  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26779  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26780  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26781  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26782  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26783  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26784  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26785  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26786  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26787  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26788  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26789  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26790  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26791  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26792  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26793  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26794  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26795  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26796  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26797  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26798  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26799  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26800  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26801  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26802  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26803  { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26804  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26805  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26806  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26807  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26808  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26809  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26810  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26811  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26812  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26813  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26814  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26815  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26816  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26817  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26818  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26819  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26820  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26821  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26822  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26823  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26824  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26825  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26826  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26827  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26828  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26829  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26830  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26831  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26832  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26833  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26834  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26835  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26836  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26837  { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26838  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26839  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26840  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26841  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26842  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26843  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26844  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26845  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26846  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26847  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26848  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26849  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26850  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26851  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26852  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26853  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26854  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26855  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26856  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26857  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26858  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26859  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26860  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26861  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26862  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26863  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26864  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26865  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26866  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26867  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26868  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26869  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26870  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26871  { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26872  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26873  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26874  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26875  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26876  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26877  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26878  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26879  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26880  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26881  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26882  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26883  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26884  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26885  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26886  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26887  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26888  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26889  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26890  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26891  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26892  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26893  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26894  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26895  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26896  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26897  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26898  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26899  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26900  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26901  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26902  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26903  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26904  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26905  { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26906  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26907  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26908  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26909  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26910  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26911  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26912  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26913  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26914  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26915  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26916  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26917  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26918  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26919  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26920  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26921  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26922  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26923  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26924  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26925  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26926  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26927  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26928  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26929  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26930  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26931  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26932  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26933  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26934  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26935  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26936  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26937  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26938  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26939  { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26940  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26941  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26942  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26943  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26944  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26945  { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26946  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26947  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26948  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26949  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26950  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26951  { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26952  { 10264 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26953  { 10264 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26954  { 10264 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26955  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26956  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26957  { 10264 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26958  { 10273 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26959  { 10273 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26960  { 10273 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26961  { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26962  { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26963  { 10273 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26964  { 10282 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26965  { 10282 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26966  { 10282 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
26967  { 10291 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26968  { 10291 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26969  { 10291 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
26970  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26971  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26972  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26973  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26974  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26975  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26976  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26977  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26978  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26979  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26980  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26981  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26982  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26983  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26984  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26985  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26986  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26987  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26988  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26989  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26990  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26991  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26992  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26993  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26994  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26995  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26996  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26997  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26998  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26999  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27000  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27001  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27002  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27003  { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27004  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27005  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27006  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27007  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27008  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27009  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27010  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27011  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27012  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27013  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27014  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27015  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27016  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27017  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27018  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27019  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27020  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27021  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27022  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27023  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27024  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27025  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27026  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27027  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27028  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27029  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27030  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27031  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27032  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27033  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27034  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27035  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27036  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27037  { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27038  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27039  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27040  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27041  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27042  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27043  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27044  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27045  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27046  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27047  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27048  { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27049  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27050  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27051  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27052  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27053  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27054  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27055  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27056  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27057  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27058  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27059  { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27060  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27061  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27062  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27063  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27064  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27065  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27066  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27067  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27068  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27069  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27070  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27071  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27072  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27073  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27074  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27075  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27076  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27077  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27078  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27079  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27080  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27081  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27082  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27083  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27084  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27085  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27086  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27087  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27088  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27089  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27090  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27091  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27092  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27093  { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27094  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27095  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27096  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27097  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27098  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27099  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27100  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27101  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27102  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27103  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27104  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27105  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27106  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27107  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27108  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27109  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27110  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27111  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27112  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27113  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27114  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27115  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27116  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27117  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27118  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27119  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27120  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27121  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27122  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27123  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27124  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27125  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27126  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27127  { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27128  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27129  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27130  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27131  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27132  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27133  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27134  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27135  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27136  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27137  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27138  { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27139  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27140  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27141  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27142  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27143  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27144  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27145  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27146  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27147  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27148  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27149  { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27150  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27151  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27152  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27153  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27154  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27155  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27156  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27157  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27158  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27159  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27160  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27161  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27162  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27163  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27164  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27165  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27166  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27167  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27168  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27169  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27170  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27171  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27172  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27173  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27174  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27175  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27176  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27177  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27178  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27179  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27180  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27181  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27182  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27183  { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27184  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27185  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27186  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27187  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27188  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27189  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27190  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27191  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27192  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27193  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27194  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27195  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27196  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27197  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27198  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27199  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27200  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27201  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27202  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27203  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27204  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27205  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27206  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27207  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27208  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27209  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27210  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27211  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27212  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27213  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27214  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27215  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27216  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27217  { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27218  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27219  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27220  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27221  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27222  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27223  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27224  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27225  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27226  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27227  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27228  { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27229  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27230  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27231  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27232  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27233  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27234  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27235  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27236  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27237  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27238  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27239  { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27240  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27241  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27242  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27243  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27244  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27245  { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27246  { 10466 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27247  { 10466 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27248  { 10466 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27249  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27250  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27251  { 10466 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27252  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27253  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27254  { 10476 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27255  { 10486 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27256  { 10486 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27257  { 10486 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27258  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27259  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27260  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27261  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27262  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27263  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27264  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27265  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27266  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27267  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27268  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27269  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27270  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27271  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27272  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27273  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27274  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27275  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27276  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27277  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27278  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27279  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27280  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27281  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27282  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27283  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27284  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27285  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27286  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27287  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27288  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27289  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27290  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27291  { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27292  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27293  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27294  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27295  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27296  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27297  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27298  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27299  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27300  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27301  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27302  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27303  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27304  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27305  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27306  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27307  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27308  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27309  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27310  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27311  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27312  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27313  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27314  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27315  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27316  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27317  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27318  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27319  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27320  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27321  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27322  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27323  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27324  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27325  { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27326  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27327  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27328  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27329  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27330  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27331  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27332  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27333  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27334  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27335  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27336  { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27337  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27338  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27339  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27340  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27341  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27342  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27343  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27344  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27345  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27346  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27347  { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27348  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27349  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27350  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27351  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27352  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27353  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27354  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27355  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27356  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27357  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27358  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27359  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27360  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27361  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27362  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27363  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27364  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27365  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27366  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27367  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27368  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27369  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27370  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27371  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27372  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27373  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27374  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27375  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27376  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27377  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27378  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27379  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27380  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27381  { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27382  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27383  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27384  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27385  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27386  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27387  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27388  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27389  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27390  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27391  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27392  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27393  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27394  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27395  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27396  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27397  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27398  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27399  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27400  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27401  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27402  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27403  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27404  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27405  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27406  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27407  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27408  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27409  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27410  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27411  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27412  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27413  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27414  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27415  { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27416  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27417  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27418  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27419  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27420  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27421  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27422  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27423  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27424  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27425  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27426  { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27427  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27428  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27429  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27430  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27431  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27432  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27433  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27434  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27435  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27436  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27437  { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27438  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27439  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27440  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27441  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27442  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27443  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27444  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27445  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27446  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27447  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27448  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27449  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27450  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27451  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27452  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27453  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27454  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27455  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27456  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27457  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27458  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27459  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27460  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27461  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27462  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27463  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27464  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27465  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27466  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27467  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27468  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27469  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27470  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27471  { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27472  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27473  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27474  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27475  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27476  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27477  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27478  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27479  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27480  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27481  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27482  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27483  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27484  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27485  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27486  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27487  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27488  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27489  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27490  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27491  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27492  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27493  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27494  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27495  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27496  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27497  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27498  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27499  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27500  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27501  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27502  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27503  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27504  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27505  { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27506  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27507  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27508  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27509  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27510  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27511  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27512  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27513  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27514  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27515  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27516  { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27517  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27518  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27519  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27520  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27521  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27522  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27523  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27524  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27525  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27526  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27527  { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27528  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27529  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27530  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27531  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27532  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27533  { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27534  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27535  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27536  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27537  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27538  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27539  { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27540  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27541  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27542  { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27543  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27544  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27545  { 10682 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27546  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27547  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27548  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27549  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27550  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27551  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27552  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27553  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27554  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27555  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27556  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27557  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27558  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27559  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27560  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27561  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27562  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27563  { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27564  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27565  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27566  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27567  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27568  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27569  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27570  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27571  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27572  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27573  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27574  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27575  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27576  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27577  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27578  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27579  { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27580  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27581  { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27582  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27583  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27584  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27585  { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27586  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27587  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27588  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27589  { 10821 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27590  { 10832 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27591  { 10832 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27592  { 10832 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27593  { 10832 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27594  { 10840 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27595  { 10840 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27596  { 10840 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27597  { 10840 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27598  { 10848 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27599  { 10848 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
27600  { 10856 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27601  { 10856 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
27602  { 10864 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27603  { 10864 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
27604  { 10864 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27605  { 10864 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
27606  { 10864 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27607  { 10875 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27608  { 10875 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27609  { 10875 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27610  { 10875 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27611  { 10875 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27612  { 10886 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27613  { 10900 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27614  { 10914 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27615  { 10928 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27616  { 10942 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27617  { 10956 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27618  { 10970 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27619  { 10984 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27620  { 10998 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27621  { 10998 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27622  { 10998 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27623  { 10998 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27624  { 10998 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27625  { 11009 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
27626  { 11009 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
27627  { 11009 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
27628  { 11009 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
27629  { 11009 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27630  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
27631  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
27632  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
27633  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
27634  { 11020 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
27635  { 11020 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
27636  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27637  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27638  { 11020 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27639  { 11020 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27640  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27641  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27642  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27643  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27644  { 11020 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27645  { 11020 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27646  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27647  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27648  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27649  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27650  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27651  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27652  { 11020 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27653  { 11020 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27654  { 11020 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27655  { 11020 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27656  { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27657  { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27658  { 11020 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27659  { 11020 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27660  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
27661  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
27662  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
27663  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
27664  { 11030 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
27665  { 11030 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
27666  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27667  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27668  { 11030 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27669  { 11030 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27670  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27671  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27672  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27673  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27674  { 11030 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27675  { 11030 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27676  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27677  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27678  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27679  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27680  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27681  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27682  { 11030 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27683  { 11030 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27684  { 11030 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27685  { 11030 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27686  { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27687  { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27688  { 11030 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27689  { 11030 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27690  { 11040 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27691  { 11040 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27692  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27693  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27694  { 11040 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27695  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27696  { 11040 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27697  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27698  { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27699  { 11050 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27700  { 11050 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27701  { 11050 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27702  { 11050 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27703  { 11050 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27704  { 11050 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27705  { 11050 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27706  { 11050 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27707  { 11050 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27708  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27709  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27710  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27711  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27712  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27713  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27714  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27715  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27716  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27717  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27718  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27719  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27720  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27721  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27722  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27723  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27724  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27725  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27726  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27727  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27728  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27729  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27730  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27731  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27732  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27733  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27734  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27735  { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27736  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27737  { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27738  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27739  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27740  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27741  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27742  { 11071 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27743  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27744  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27745  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27746  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27747  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27748  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27749  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27750  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27751  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27752  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27753  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27754  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27755  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27756  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27757  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27758  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27759  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27760  { 11071 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27761  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27762  { 11071 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27763  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27764  { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27765  { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27766  { 11071 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27767  { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27768  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27769  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27770  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27771  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27772  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27773  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27774  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27775  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27776  { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27777  { 11093 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27778  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27779  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27780  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27781  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27782  { 11093 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27783  { 11093 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27784  { 11093 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27785  { 11093 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27786  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27787  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27788  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
27789  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27790  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27791  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27792  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27793  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27794  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27795  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27796  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27797  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27798  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27799  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27800  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27801  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27802  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27803  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27804  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27805  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27806  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27807  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27808  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27809  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27810  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27811  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27812  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27813  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27814  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27815  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27816  { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27817  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27818  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27819  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
27820  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27821  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27822  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27823  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27824  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27825  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27826  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27827  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27828  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27829  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27830  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27831  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27832  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27833  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27834  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27835  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27836  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27837  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27838  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27839  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27840  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27841  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27842  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27843  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27844  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27845  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27846  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27847  { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27848  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27849  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27850  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27851  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27852  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27853  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27854  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27855  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27856  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27857  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27858  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27859  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27860  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27861  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27862  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27863  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27864  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27865  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27866  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27867  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27868  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27869  { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27870  { 11148 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27871  { 11148 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27872  { 11148 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27873  { 11148 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27874  { 11156 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27875  { 11156 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27876  { 11156 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27877  { 11156 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27878  { 11164 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27879  { 11164 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27880  { 11164 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27881  { 11164 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27882  { 11172 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27883  { 11172 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27884  { 11172 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27885  { 11172 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27886  { 11180 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
27887  { 11180 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27888  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27889  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27890  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27891  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27892  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27893  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27894  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27895  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27896  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27897  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27898  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27899  { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27900  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27901  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27902  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27903  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27904  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27905  { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27906  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27907  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27908  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27909  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27910  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27911  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27912  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27913  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27914  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27915  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27916  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27917  { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27918  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27919  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27920  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27921  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27922  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27923  { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27924  { 11244 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
27925  { 11244 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27926  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27927  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27928  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27929  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27930  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27931  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27932  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27933  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27934  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27935  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27936  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27937  { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27938  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27939  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27940  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27941  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27942  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27943  { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27944  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27945  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27946  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27947  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27948  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27949  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27950  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27951  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27952  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27953  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27954  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27955  { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27956  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27957  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27958  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27959  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27960  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27961  { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27962  { 11308 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27963  { 11308 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27964  { 11308 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27965  { 11308 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27966  { 11318 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27967  { 11318 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27968  { 11325 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
27969  { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
27970  { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
27971  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27972  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27973  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
27974  { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
27975  { 11357 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27976  { 11357 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27977  { 11357 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
27978  { 11357 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
27979  { 11368 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27980  { 11368 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27981  { 11368 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27982  { 11368 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27983  { 11368 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27984  { 11368 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27985  { 11368 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27986  { 11368 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27987  { 11368 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27988  { 11368 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27989  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27990  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27991  { 11368 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27992  { 11368 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27993  { 11368 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27994  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27995  { 11368 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27996  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27997  { 11368 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27998  { 11368 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27999  { 11368 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28000  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28001  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28002  { 11368 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28003  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28004  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28005  { 11368 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28006  { 11368 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28007  { 11368 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28008  { 11368 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28009  { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28010  { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28011  { 11368 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28012  { 11368 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28013  { 11375 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28014  { 11375 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28015  { 11375 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28016  { 11375 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28017  { 11375 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28018  { 11375 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28019  { 11375 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28020  { 11375 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28021  { 11375 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28022  { 11375 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28023  { 11375 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28024  { 11375 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28025  { 11375 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28026  { 11375 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28027  { 11375 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28028  { 11375 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28029  { 11375 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28030  { 11375 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28031  { 11375 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28032  { 11375 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28033  { 11375 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28034  { 11375 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28035  { 11375 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28036  { 11375 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28037  { 11375 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28038  { 11375 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28039  { 11375 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28040  { 11375 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28041  { 11375 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28042  { 11375 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28043  { 11375 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28044  { 11375 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28045  { 11375 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28046  { 11375 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28047  { 11382 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28048  { 11382 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28049  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28050  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28051  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28052  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28053  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28054  { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28055  { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28056  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28057  { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28058  { 11389 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28059  { 11389 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28060  { 11389 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28061  { 11389 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28062  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28063  { 11389 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28064  { 11389 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28065  { 11389 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28066  { 11389 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28067  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28068  { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28069  { 11396 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, {  }, },
28070  { 11403 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28071  { 11411 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, {  }, },
28072  { 11418 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28073  { 11418 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28074  { 11418 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28075  { 11418 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28076  { 11418 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28077  { 11418 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28078  { 11418 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28079  { 11418 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28080  { 11418 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28081  { 11418 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28082  { 11418 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28083  { 11418 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28084  { 11418 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28085  { 11418 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28086  { 11418 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28087  { 11418 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28088  { 11418 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28089  { 11418 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28090  { 11418 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28091  { 11418 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28092  { 11418 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28093  { 11418 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28094  { 11418 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28095  { 11418 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28096  { 11418 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28097  { 11418 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28098  { 11418 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28099  { 11418 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28100  { 11418 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28101  { 11418 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28102  { 11418 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28103  { 11418 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28104  { 11418 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28105  { 11418 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28106  { 11425 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28107  { 11425 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28108  { 11425 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28109  { 11425 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28110  { 11425 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28111  { 11425 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28112  { 11425 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28113  { 11425 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28114  { 11425 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28115  { 11425 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28116  { 11425 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28117  { 11425 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28118  { 11425 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28119  { 11425 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28120  { 11425 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28121  { 11425 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28122  { 11425 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28123  { 11425 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28124  { 11425 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28125  { 11425 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28126  { 11425 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28127  { 11425 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28128  { 11425 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28129  { 11425 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28130  { 11425 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28131  { 11425 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28132  { 11425 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28133  { 11425 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28134  { 11425 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28135  { 11425 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28136  { 11425 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28137  { 11425 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28138  { 11425 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28139  { 11425 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28140  { 11432 /* vminsd */, X86::VMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28141  { 11432 /* vminsd */, X86::VMINSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28142  { 11432 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28143  { 11432 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28144  { 11432 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28145  { 11432 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28146  { 11432 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28147  { 11432 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28148  { 11432 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28149  { 11432 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28150  { 11432 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28151  { 11439 /* vminss */, X86::VMINSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28152  { 11439 /* vminss */, X86::VMINSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28153  { 11439 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28154  { 11439 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28155  { 11439 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28156  { 11439 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28157  { 11439 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28158  { 11439 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28159  { 11439 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28160  { 11439 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28161  { 11439 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28162  { 11446 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, {  }, },
28163  { 11455 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28164  { 11455 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28165  { 11462 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, {  }, },
28166  { 11470 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28167  { 11470 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28168  { 11470 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28169  { 11470 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28170  { 11470 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28171  { 11470 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28172  { 11470 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28173  { 11470 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28174  { 11470 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28175  { 11470 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28176  { 11470 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28177  { 11470 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28178  { 11470 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28179  { 11470 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28180  { 11470 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28181  { 11470 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28182  { 11470 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28183  { 11470 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28184  { 11470 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28185  { 11470 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28186  { 11470 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28187  { 11470 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28188  { 11470 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28189  { 11470 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28190  { 11470 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28191  { 11470 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28192  { 11470 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28193  { 11470 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28194  { 11470 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28195  { 11470 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28196  { 11470 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28197  { 11470 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28198  { 11478 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28199  { 11478 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28200  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28201  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28202  { 11478 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28203  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28204  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28205  { 11478 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28206  { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28207  { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28208  { 11478 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28209  { 11488 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28210  { 11488 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28211  { 11488 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28212  { 11488 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28213  { 11488 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28214  { 11488 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28215  { 11488 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28216  { 11488 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28217  { 11488 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28218  { 11488 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28219  { 11488 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28220  { 11488 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28221  { 11488 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28222  { 11488 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28223  { 11488 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28224  { 11488 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28225  { 11488 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28226  { 11488 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28227  { 11488 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28228  { 11488 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28229  { 11488 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28230  { 11488 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28231  { 11488 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28232  { 11488 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28233  { 11488 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28234  { 11488 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28235  { 11488 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28236  { 11488 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28237  { 11488 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28238  { 11488 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28239  { 11488 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28240  { 11488 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28241  { 11496 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28242  { 11496 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28243  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28244  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28245  { 11496 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28246  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28247  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28248  { 11496 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28249  { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28250  { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28251  { 11496 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28252  { 11506 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
28253  { 11506 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28254  { 11506 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28255  { 11506 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
28256  { 11506 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
28257  { 11506 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28258  { 11506 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
28259  { 11506 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
28260  { 11506 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
28261  { 11506 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
28262  { 11506 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28263  { 11506 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
28264  { 11512 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28265  { 11512 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28266  { 11512 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28267  { 11512 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28268  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28269  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28270  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28271  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28272  { 11512 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28273  { 11512 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28274  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28275  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28276  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28277  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28278  { 11512 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28279  { 11512 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28280  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28281  { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28282  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28283  { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28284  { 11512 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28285  { 11512 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28286  { 11521 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28287  { 11521 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28288  { 11521 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28289  { 11521 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28290  { 11521 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28291  { 11521 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28292  { 11521 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28293  { 11521 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28294  { 11529 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28295  { 11529 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28296  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28297  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28298  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28299  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28300  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28301  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28302  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28303  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28304  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28305  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28306  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28307  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28308  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28309  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28310  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28311  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28312  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28313  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28314  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28315  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28316  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28317  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28318  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28319  { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28320  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28321  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28322  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28323  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28324  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28325  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28326  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28327  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28328  { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28329  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28330  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28331  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28332  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28333  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28334  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28335  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28336  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28337  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28338  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28339  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28340  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28341  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28342  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28343  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28344  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28345  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28346  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28347  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28348  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28349  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28350  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28351  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28352  { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28353  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28354  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28355  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28356  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28357  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28358  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28359  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28360  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28361  { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28362  { 11583 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28363  { 11583 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28364  { 11583 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28365  { 11583 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28366  { 11583 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28367  { 11583 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28368  { 11583 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28369  { 11583 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28370  { 11591 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28371  { 11591 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28372  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28373  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28374  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28375  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28376  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28377  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28378  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28379  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28380  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28381  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28382  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28383  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28384  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28385  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28386  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28387  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28388  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28389  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28390  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28391  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28392  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28393  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28394  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28395  { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28396  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28397  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28398  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28399  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28400  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28401  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28402  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28403  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28404  { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28405  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28406  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28407  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28408  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28409  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28410  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28411  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28412  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28413  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28414  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28415  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28416  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28417  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28418  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28419  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28420  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28421  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28422  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28423  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28424  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28425  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28426  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28427  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28428  { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28429  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28430  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28431  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28432  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28433  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28434  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28435  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28436  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28437  { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28438  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28439  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28440  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28441  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28442  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28443  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28444  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28445  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28446  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28447  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28448  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28449  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28450  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28451  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28452  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28453  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28454  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28455  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28456  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28457  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28458  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28459  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28460  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28461  { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28462  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28463  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28464  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28465  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28466  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28467  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28468  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28469  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28470  { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28471  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28472  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28473  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28474  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28475  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28476  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28477  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28478  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28479  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28480  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28481  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28482  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28483  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28484  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28485  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28486  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28487  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28488  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28489  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28490  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28491  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28492  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28493  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28494  { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28495  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28496  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28497  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28498  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28499  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28500  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28501  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28502  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28503  { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28504  { 11687 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28505  { 11687 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28506  { 11696 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28507  { 11696 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28508  { 11696 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28509  { 11696 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28510  { 11704 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28511  { 11704 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28512  { 11704 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28513  { 11704 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28514  { 11712 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28515  { 11712 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28516  { 11721 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28517  { 11721 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28518  { 11721 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28519  { 11721 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28520  { 11729 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28521  { 11729 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28522  { 11729 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28523  { 11729 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28524  { 11737 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28525  { 11737 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28526  { 11747 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28527  { 11747 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28528  { 11757 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28529  { 11757 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28530  { 11757 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28531  { 11757 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28532  { 11757 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28533  { 11766 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28534  { 11766 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28535  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28536  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28537  { 11766 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28538  { 11776 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28539  { 11776 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28540  { 11776 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28541  { 11776 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28542  { 11776 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28543  { 11785 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28544  { 11785 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28545  { 11785 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28546  { 11785 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28547  { 11785 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28548  { 11794 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28549  { 11794 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28550  { 11794 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28551  { 11794 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28552  { 11794 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28553  { 11794 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
28554  { 11794 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
28555  { 11794 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28556  { 11794 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28557  { 11794 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28558  { 11794 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28559  { 11800 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28560  { 11800 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28561  { 11808 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28562  { 11808 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28563  { 11808 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28564  { 11808 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28565  { 11808 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28566  { 11808 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28567  { 11808 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28568  { 11808 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28569  { 11808 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28570  { 11808 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28571  { 11808 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28572  { 11808 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28573  { 11815 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28574  { 11815 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28575  { 11815 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28576  { 11815 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28577  { 11824 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28578  { 11824 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28579  { 11824 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28580  { 11824 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28581  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28582  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28583  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28584  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28585  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28586  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28587  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28588  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28589  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28590  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28591  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28592  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28593  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28594  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28595  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28596  { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28597  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28598  { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28599  { 11834 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28600  { 11834 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28601  { 11834 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28602  { 11834 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28603  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28604  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28605  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28606  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28607  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28608  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28609  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28610  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28611  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28612  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28613  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28614  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28615  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28616  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28617  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28618  { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28619  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28620  { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28621  { 11844 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28622  { 11844 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
28623  { 11844 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28624  { 11844 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
28625  { 11844 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28626  { 11844 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28627  { 11844 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28628  { 11844 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
28629  { 11844 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28630  { 11844 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
28631  { 11844 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28632  { 11844 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28633  { 11851 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28634  { 11851 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28635  { 11851 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28636  { 11851 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28637  { 11860 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28638  { 11860 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28639  { 11860 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28640  { 11860 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28641  { 11860 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28642  { 11860 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28643  { 11860 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28644  { 11860 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28645  { 11860 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28646  { 11860 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28647  { 11860 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28648  { 11860 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28649  { 11860 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28650  { 11860 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28651  { 11860 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28652  { 11860 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28653  { 11860 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28654  { 11860 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28655  { 11860 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28656  { 11860 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28657  { 11860 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28658  { 11860 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28659  { 11860 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28660  { 11860 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28661  { 11860 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28662  { 11860 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28663  { 11860 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28664  { 11860 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28665  { 11860 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28666  { 11860 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28667  { 11860 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28668  { 11860 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28669  { 11868 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28670  { 11868 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28671  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28672  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28673  { 11868 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28674  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28675  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28676  { 11868 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28677  { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28678  { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28679  { 11868 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28680  { 11878 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28681  { 11878 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28682  { 11878 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28683  { 11878 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28684  { 11878 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28685  { 11878 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28686  { 11878 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28687  { 11878 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28688  { 11878 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28689  { 11878 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28690  { 11878 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28691  { 11878 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28692  { 11878 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28693  { 11878 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28694  { 11878 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28695  { 11878 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28696  { 11878 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28697  { 11878 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28698  { 11878 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28699  { 11878 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28700  { 11878 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28701  { 11878 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28702  { 11878 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28703  { 11878 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28704  { 11878 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28705  { 11878 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28706  { 11878 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28707  { 11878 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28708  { 11878 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28709  { 11878 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28710  { 11878 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28711  { 11878 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28712  { 11886 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28713  { 11886 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28714  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28715  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28716  { 11886 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28717  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28718  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28719  { 11886 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28720  { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28721  { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28722  { 11886 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28723  { 11896 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28724  { 11896 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28725  { 11896 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28726  { 11896 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28727  { 11905 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28728  { 11913 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28729  { 11921 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
28730  { 11921 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
28731  { 11921 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
28732  { 11921 /* vmread */, X86::VMREAD64mr, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
28733  { 11944 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, {  }, },
28734  { 11953 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28735  { 11953 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28736  { 11959 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28737  { 11959 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28738  { 11966 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28739  { 11966 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28740  { 11966 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28741  { 11966 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28742  { 11966 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28743  { 11966 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28744  { 11966 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28745  { 11966 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28746  { 11966 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28747  { 11966 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28748  { 11966 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28749  { 11966 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28750  { 11966 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28751  { 11966 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28752  { 11966 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28753  { 11966 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28754  { 11966 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28755  { 11966 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28756  { 11966 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28757  { 11966 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28758  { 11966 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28759  { 11966 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28760  { 11966 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28761  { 11966 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28762  { 11966 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28763  { 11966 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28764  { 11966 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28765  { 11966 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28766  { 11966 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28767  { 11966 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28768  { 11966 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28769  { 11966 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28770  { 11966 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28771  { 11966 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28772  { 11973 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28773  { 11973 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28774  { 11973 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28775  { 11973 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28776  { 11973 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28777  { 11973 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28778  { 11973 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28779  { 11973 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28780  { 11973 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28781  { 11973 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28782  { 11973 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28783  { 11973 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28784  { 11973 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28785  { 11973 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28786  { 11973 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28787  { 11973 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28788  { 11973 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28789  { 11973 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28790  { 11973 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28791  { 11973 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28792  { 11973 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28793  { 11973 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28794  { 11973 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28795  { 11973 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28796  { 11973 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28797  { 11973 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28798  { 11973 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28799  { 11973 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28800  { 11973 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28801  { 11973 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28802  { 11973 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28803  { 11973 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28804  { 11973 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28805  { 11973 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28806  { 11980 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28807  { 11980 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28808  { 11980 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28809  { 11980 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28810  { 11980 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28811  { 11980 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28812  { 11980 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28813  { 11980 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28814  { 11980 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28815  { 11980 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28816  { 11980 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28817  { 11987 /* vmulss */, X86::VMULSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28818  { 11987 /* vmulss */, X86::VMULSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28819  { 11987 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28820  { 11987 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28821  { 11987 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28822  { 11987 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28823  { 11987 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28824  { 11987 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28825  { 11987 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28826  { 11987 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28827  { 11987 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28828  { 11994 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
28829  { 11994 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
28830  { 11994 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
28831  { 11994 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
28832  { 12020 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, {  }, },
28833  { 12027 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28834  { 12033 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28835  { 12033 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28836  { 12033 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28837  { 12033 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28838  { 12033 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28839  { 12033 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28840  { 12033 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28841  { 12033 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28842  { 12033 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28843  { 12033 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28844  { 12033 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28845  { 12033 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28846  { 12033 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28847  { 12033 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28848  { 12033 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28849  { 12033 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28850  { 12033 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28851  { 12033 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28852  { 12033 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28853  { 12033 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28854  { 12033 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28855  { 12033 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28856  { 12033 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28857  { 12033 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28858  { 12033 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28859  { 12033 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28860  { 12033 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28861  { 12033 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28862  { 12033 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28863  { 12033 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28864  { 12033 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28865  { 12039 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28866  { 12039 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28867  { 12039 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28868  { 12039 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28869  { 12039 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28870  { 12039 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28871  { 12039 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28872  { 12039 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28873  { 12039 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28874  { 12039 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28875  { 12039 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28876  { 12039 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28877  { 12039 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28878  { 12039 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28879  { 12039 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28880  { 12039 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28881  { 12039 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28882  { 12039 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28883  { 12039 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28884  { 12039 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28885  { 12039 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28886  { 12039 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28887  { 12039 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28888  { 12039 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28889  { 12039 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28890  { 12039 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28891  { 12039 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28892  { 12039 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28893  { 12039 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28894  { 12039 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28895  { 12039 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28896  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
28897  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
28898  { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
28899  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
28900  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
28901  { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
28902  { 12066 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28903  { 12066 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28904  { 12066 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28905  { 12066 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28906  { 12066 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28907  { 12066 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28908  { 12066 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28909  { 12066 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28910  { 12066 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28911  { 12066 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28912  { 12066 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28913  { 12066 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28914  { 12066 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28915  { 12066 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28916  { 12066 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28917  { 12066 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28918  { 12066 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28919  { 12066 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28920  { 12066 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28921  { 12066 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28922  { 12066 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28923  { 12066 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28924  { 12073 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28925  { 12073 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28926  { 12073 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28927  { 12073 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28928  { 12073 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28929  { 12073 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28930  { 12073 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28931  { 12073 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28932  { 12073 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28933  { 12073 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28934  { 12073 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28935  { 12073 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28936  { 12073 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28937  { 12073 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28938  { 12073 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28939  { 12073 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28940  { 12073 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28941  { 12073 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28942  { 12073 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28943  { 12073 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28944  { 12073 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28945  { 12073 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
28946  { 12073 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28947  { 12073 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28948  { 12073 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
28949  { 12073 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28950  { 12073 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28951  { 12073 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
28952  { 12073 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
28953  { 12073 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
28954  { 12073 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
28955  { 12080 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28956  { 12080 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28957  { 12080 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28958  { 12080 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28959  { 12080 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28960  { 12080 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28961  { 12080 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28962  { 12080 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28963  { 12080 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28964  { 12080 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28965  { 12080 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28966  { 12080 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28967  { 12080 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28968  { 12080 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28969  { 12080 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28970  { 12080 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28971  { 12080 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28972  { 12080 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
28973  { 12080 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28974  { 12080 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28975  { 12080 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
28976  { 12080 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28977  { 12080 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28978  { 12080 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
28979  { 12080 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
28980  { 12080 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
28981  { 12080 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
28982  { 12087 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28983  { 12087 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28984  { 12087 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28985  { 12087 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28986  { 12087 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28987  { 12087 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28988  { 12087 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28989  { 12087 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28990  { 12087 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28991  { 12087 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28992  { 12087 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28993  { 12087 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28994  { 12087 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28995  { 12087 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28996  { 12087 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28997  { 12087 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28998  { 12087 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28999  { 12087 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29000  { 12087 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29001  { 12087 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29002  { 12087 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29003  { 12087 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29004  { 12094 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29005  { 12094 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29006  { 12094 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29007  { 12094 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29008  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29009  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29010  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29011  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29012  { 12094 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29013  { 12094 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29014  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29015  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29016  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29017  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29018  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29019  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29020  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29021  { 12094 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29022  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29023  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29024  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29025  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29026  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29027  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29028  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29029  { 12094 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29030  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29031  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29032  { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29033  { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29034  { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29035  { 12104 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29036  { 12104 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29037  { 12104 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29038  { 12104 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29039  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29040  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29041  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29042  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29043  { 12104 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29044  { 12104 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29045  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29046  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29047  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29048  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29049  { 12104 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29050  { 12104 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29051  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29052  { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29053  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29054  { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29055  { 12104 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29056  { 12104 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29057  { 12114 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29058  { 12114 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29059  { 12114 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29060  { 12114 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29061  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29062  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29063  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29064  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29065  { 12114 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29066  { 12114 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29067  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29068  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29069  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29070  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29071  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29072  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29073  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29074  { 12114 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29075  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29076  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29077  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29078  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29079  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29080  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29081  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29082  { 12114 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29083  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29084  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29085  { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29086  { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29087  { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29088  { 12124 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29089  { 12124 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29090  { 12124 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29091  { 12124 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29092  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29093  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29094  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29095  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29096  { 12124 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29097  { 12124 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29098  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29099  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29100  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29101  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29102  { 12124 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29103  { 12124 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29104  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29105  { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29106  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29107  { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29108  { 12124 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29109  { 12124 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29110  { 12134 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29111  { 12134 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29112  { 12134 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29113  { 12134 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29114  { 12134 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29115  { 12134 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29116  { 12134 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29117  { 12134 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29118  { 12134 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29119  { 12134 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29120  { 12134 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29121  { 12134 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29122  { 12134 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29123  { 12134 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29124  { 12134 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29125  { 12134 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29126  { 12134 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29127  { 12134 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29128  { 12134 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29129  { 12134 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29130  { 12134 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29131  { 12134 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29132  { 12141 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29133  { 12141 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29134  { 12141 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29135  { 12141 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29136  { 12141 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29137  { 12141 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29138  { 12141 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29139  { 12141 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29140  { 12141 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29141  { 12141 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29142  { 12141 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29143  { 12141 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29144  { 12141 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29145  { 12141 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29146  { 12141 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29147  { 12141 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29148  { 12141 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29149  { 12141 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29150  { 12141 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29151  { 12141 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29152  { 12141 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29153  { 12141 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29154  { 12141 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29155  { 12141 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29156  { 12141 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29157  { 12141 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29158  { 12141 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29159  { 12141 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29160  { 12141 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29161  { 12141 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29162  { 12141 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29163  { 12148 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29164  { 12148 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29165  { 12148 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29166  { 12148 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29167  { 12148 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29168  { 12148 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29169  { 12148 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29170  { 12148 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29171  { 12148 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29172  { 12148 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29173  { 12148 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29174  { 12148 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29175  { 12148 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29176  { 12148 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29177  { 12148 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29178  { 12148 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29179  { 12148 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29180  { 12148 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29181  { 12148 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29182  { 12148 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29183  { 12148 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29184  { 12148 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29185  { 12148 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29186  { 12148 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29187  { 12148 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29188  { 12148 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29189  { 12148 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29190  { 12148 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29191  { 12148 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29192  { 12148 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29193  { 12148 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29194  { 12155 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29195  { 12155 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29196  { 12155 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29197  { 12155 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29198  { 12155 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29199  { 12155 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29200  { 12155 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29201  { 12155 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29202  { 12155 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29203  { 12155 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29204  { 12155 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29205  { 12155 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29206  { 12155 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29207  { 12155 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29208  { 12155 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29209  { 12155 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29210  { 12155 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29211  { 12155 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29212  { 12155 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29213  { 12155 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29214  { 12155 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29215  { 12155 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29216  { 12163 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29217  { 12163 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29218  { 12163 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29219  { 12163 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29220  { 12163 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29221  { 12163 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29222  { 12163 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29223  { 12163 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29224  { 12163 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29225  { 12163 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29226  { 12163 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29227  { 12163 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29228  { 12163 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29229  { 12163 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29230  { 12163 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29231  { 12163 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29232  { 12163 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29233  { 12163 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29234  { 12163 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29235  { 12163 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29236  { 12163 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29237  { 12163 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29238  { 12171 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29239  { 12171 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29240  { 12171 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29241  { 12171 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29242  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29243  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29244  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29245  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29246  { 12171 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29247  { 12171 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29248  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29249  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29250  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29251  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29252  { 12171 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29253  { 12171 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29254  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29255  { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29256  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29257  { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29258  { 12171 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29259  { 12171 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29260  { 12180 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29261  { 12180 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29262  { 12180 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29263  { 12180 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29264  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29265  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29266  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29267  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29268  { 12180 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29269  { 12180 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29270  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29271  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29272  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29273  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29274  { 12180 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29275  { 12180 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29276  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29277  { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29278  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29279  { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29280  { 12180 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29281  { 12180 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29282  { 12189 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29283  { 12189 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29284  { 12189 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29285  { 12189 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29286  { 12189 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29287  { 12189 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29288  { 12189 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29289  { 12189 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29290  { 12189 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29291  { 12189 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29292  { 12189 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29293  { 12189 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29294  { 12189 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29295  { 12189 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29296  { 12189 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29297  { 12189 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29298  { 12189 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29299  { 12189 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29300  { 12189 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29301  { 12189 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29302  { 12189 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29303  { 12189 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29304  { 12196 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29305  { 12196 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29306  { 12196 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29307  { 12196 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29308  { 12196 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29309  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29310  { 12196 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29311  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29312  { 12196 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29313  { 12196 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29314  { 12196 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29315  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29316  { 12196 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29317  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29318  { 12196 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29319  { 12196 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29320  { 12196 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29321  { 12196 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29322  { 12196 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29323  { 12196 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29324  { 12196 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29325  { 12196 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29326  { 12205 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29327  { 12205 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29328  { 12205 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29329  { 12205 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29330  { 12211 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29331  { 12211 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29332  { 12211 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29333  { 12211 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29334  { 12211 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29335  { 12211 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29336  { 12211 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29337  { 12211 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29338  { 12211 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29339  { 12211 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29340  { 12211 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29341  { 12211 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29342  { 12211 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29343  { 12211 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29344  { 12211 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29345  { 12211 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29346  { 12211 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29347  { 12211 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29348  { 12211 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29349  { 12211 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29350  { 12211 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29351  { 12211 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29352  { 12211 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29353  { 12211 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29354  { 12211 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29355  { 12211 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29356  { 12211 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29357  { 12218 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29358  { 12218 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29359  { 12218 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29360  { 12218 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29361  { 12225 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29362  { 12225 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29363  { 12225 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29364  { 12225 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29365  { 12225 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29366  { 12225 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29367  { 12225 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29368  { 12225 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29369  { 12225 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29370  { 12225 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29371  { 12225 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29372  { 12225 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29373  { 12225 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29374  { 12225 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29375  { 12225 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29376  { 12225 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29377  { 12225 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29378  { 12225 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29379  { 12225 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29380  { 12225 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29381  { 12225 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29382  { 12225 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29383  { 12225 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29384  { 12225 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29385  { 12225 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29386  { 12225 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29387  { 12225 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29388  { 12233 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29389  { 12233 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29390  { 12233 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29391  { 12233 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29392  { 12233 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29393  { 12233 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29394  { 12233 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29395  { 12233 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29396  { 12233 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29397  { 12233 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29398  { 12233 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29399  { 12233 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29400  { 12233 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29401  { 12233 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29402  { 12233 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29403  { 12233 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29404  { 12233 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29405  { 12233 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29406  { 12233 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29407  { 12233 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29408  { 12233 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29409  { 12233 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29410  { 12233 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29411  { 12233 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29412  { 12233 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29413  { 12233 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29414  { 12233 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29415  { 12241 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29416  { 12241 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29417  { 12241 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29418  { 12241 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29419  { 12241 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29420  { 12241 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29421  { 12241 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29422  { 12241 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29423  { 12241 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29424  { 12241 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29425  { 12241 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29426  { 12241 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29427  { 12241 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29428  { 12241 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29429  { 12241 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29430  { 12241 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29431  { 12241 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29432  { 12241 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29433  { 12241 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29434  { 12241 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29435  { 12241 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29436  { 12241 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29437  { 12241 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29438  { 12241 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29439  { 12241 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29440  { 12241 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29441  { 12241 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29442  { 12248 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29443  { 12248 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29444  { 12248 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29445  { 12248 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29446  { 12248 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29447  { 12248 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29448  { 12248 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29449  { 12248 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29450  { 12248 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29451  { 12248 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29452  { 12248 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29453  { 12248 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29454  { 12248 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29455  { 12248 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29456  { 12248 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29457  { 12248 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29458  { 12248 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29459  { 12248 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29460  { 12248 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29461  { 12248 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29462  { 12248 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29463  { 12248 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29464  { 12255 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29465  { 12255 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29466  { 12255 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29467  { 12255 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29468  { 12255 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29469  { 12255 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29470  { 12255 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29471  { 12255 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29472  { 12255 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29473  { 12255 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29474  { 12255 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29475  { 12255 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29476  { 12255 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29477  { 12255 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29478  { 12255 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29479  { 12255 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29480  { 12255 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29481  { 12255 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29482  { 12255 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29483  { 12255 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29484  { 12255 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29485  { 12255 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29486  { 12262 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29487  { 12262 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29488  { 12262 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29489  { 12262 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29490  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29491  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29492  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29493  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29494  { 12271 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29495  { 12271 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29496  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29497  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29498  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29499  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29500  { 12271 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29501  { 12271 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29502  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29503  { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29504  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29505  { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29506  { 12271 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29507  { 12271 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29508  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29509  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29510  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29511  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29512  { 12281 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29513  { 12281 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29514  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29515  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29516  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29517  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29518  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29519  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29520  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29521  { 12281 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29522  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29523  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29524  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29525  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29526  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29527  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29528  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29529  { 12281 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29530  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29531  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29532  { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29533  { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29534  { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29535  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29536  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29537  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29538  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29539  { 12291 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29540  { 12291 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29541  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29542  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29543  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29544  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29545  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29546  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29547  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29548  { 12291 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29549  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29550  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29551  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29552  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29553  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29554  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29555  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29556  { 12291 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29557  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29558  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29559  { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29560  { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29561  { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29562  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29563  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29564  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29565  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29566  { 12301 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29567  { 12301 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29568  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29569  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29570  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29571  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29572  { 12301 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29573  { 12301 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29574  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29575  { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29576  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29577  { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29578  { 12301 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29579  { 12301 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29580  { 12311 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
29581  { 12311 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
29582  { 12311 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
29583  { 12311 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
29584  { 12321 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29585  { 12321 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29586  { 12321 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29587  { 12321 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29588  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29589  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32, MCK_Mem8 }, },
29590  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29591  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256, MCK_Mem8 }, },
29592  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29593  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29594  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32X, MCK_Mem8 }, },
29595  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29596  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29597  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256X, MCK_Mem8 }, },
29598  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29599  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29600  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR512, MCK_Mem8 }, },
29601  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29602  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29603  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29604  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29605  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29606  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29607  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29608  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29609  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29610  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29611  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29612  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29613  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29614  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29615  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29616  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29617  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29618  { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29619  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29620  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
29621  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29622  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
29623  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29624  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29625  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
29626  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29627  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29628  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
29629  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29630  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29631  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32 }, },
29632  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29633  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29634  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29635  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29636  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29637  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29638  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29639  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29640  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29641  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29642  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29643  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29644  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29645  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29646  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29647  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29648  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29649  { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29650  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
29651  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
29652  { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
29653  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
29654  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
29655  { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
29656  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29657  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
29658  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29659  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
29660  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
29661  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29662  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
29663  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR64 }, },
29664  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29665  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
29666  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR64 }, },
29667  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29668  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
29669  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29670  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29671  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29672  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29673  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29674  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29675  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29676  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29677  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29678  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29679  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29680  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29681  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29682  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29683  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29684  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29685  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29686  { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29687  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29688  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
29689  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29690  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256, MCK_Mem16 }, },
29691  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29692  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29693  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
29694  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29695  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29696  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256X, MCK_Mem16 }, },
29697  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29698  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29699  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR512, MCK_Mem16 }, },
29700  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29701  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29702  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29703  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29704  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29705  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29706  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29707  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29708  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29709  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29710  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29711  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29712  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29713  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29714  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29715  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29716  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29717  { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29718  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29719  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29720  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29721  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29722  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29723  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29724  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29725  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29726  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29727  { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29728  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29729  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29730  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29731  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29732  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29733  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29734  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29735  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29736  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29737  { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29738  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29739  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29740  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29741  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29742  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29743  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29744  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29745  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29746  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29747  { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29748  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29749  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29750  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29751  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29752  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29753  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29754  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29755  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29756  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29757  { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29758  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29759  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29760  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29761  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29762  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29763  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29764  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29765  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29766  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29767  { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29768  { 12481 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
29769  { 12481 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29770  { 12481 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
29771  { 12481 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
29772  { 12481 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29773  { 12481 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
29774  { 12488 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29775  { 12488 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29776  { 12488 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29777  { 12488 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29778  { 12488 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29779  { 12488 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29780  { 12488 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29781  { 12488 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29782  { 12488 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29783  { 12488 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29784  { 12488 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29785  { 12488 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29786  { 12488 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29787  { 12488 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29788  { 12488 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29789  { 12488 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29790  { 12488 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29791  { 12488 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29792  { 12488 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29793  { 12488 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29794  { 12488 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29795  { 12488 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29796  { 12488 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29797  { 12488 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29798  { 12488 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29799  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29800  { 12488 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29801  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29802  { 12488 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29803  { 12488 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29804  { 12488 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29805  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29806  { 12488 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29807  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29808  { 12488 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29809  { 12488 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29810  { 12488 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29811  { 12488 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29812  { 12488 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29813  { 12488 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29814  { 12488 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29815  { 12488 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29816  { 12488 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29817  { 12488 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29818  { 12488 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29819  { 12488 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29820  { 12488 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29821  { 12488 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29822  { 12488 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29823  { 12488 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29824  { 12488 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29825  { 12488 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29826  { 12488 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29827  { 12488 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29828  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29829  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29830  { 12488 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29831  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29832  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29833  { 12488 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29834  { 12488 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29835  { 12488 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29836  { 12488 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29837  { 12488 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29838  { 12488 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29839  { 12488 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29840  { 12488 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29841  { 12488 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29842  { 12488 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29843  { 12488 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29844  { 12488 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29845  { 12488 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29846  { 12488 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29847  { 12488 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29848  { 12488 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29849  { 12488 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29850  { 12488 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29851  { 12488 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29852  { 12488 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29853  { 12488 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29854  { 12488 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29855  { 12488 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29856  { 12488 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29857  { 12488 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29858  { 12488 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29859  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29860  { 12488 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29861  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29862  { 12488 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29863  { 12488 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29864  { 12488 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29865  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29866  { 12488 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29867  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29868  { 12488 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29869  { 12488 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29870  { 12488 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29871  { 12488 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29872  { 12488 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29873  { 12488 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29874  { 12488 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29875  { 12488 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29876  { 12488 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29877  { 12488 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29878  { 12488 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29879  { 12488 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29880  { 12488 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29881  { 12488 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29882  { 12488 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29883  { 12488 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29884  { 12488 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29885  { 12488 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29886  { 12488 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29887  { 12488 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29888  { 12488 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29889  { 12488 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29890  { 12488 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29891  { 12488 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29892  { 12488 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29893  { 12488 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29894  { 12494 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29895  { 12494 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29896  { 12494 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29897  { 12494 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29898  { 12494 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29899  { 12494 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29900  { 12494 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29901  { 12494 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29902  { 12494 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29903  { 12494 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29904  { 12494 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29905  { 12494 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29906  { 12501 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29907  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29908  { 12501 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29909  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29910  { 12501 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29911  { 12501 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29912  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29913  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29914  { 12501 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
29915  { 12501 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29916  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29917  { 12501 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29918  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29919  { 12501 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29920  { 12501 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29921  { 12501 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29922  { 12501 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29923  { 12501 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
29924  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29925  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29926  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29927  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29928  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
29929  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29930  { 12508 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29931  { 12508 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29932  { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29933  { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29934  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29935  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29936  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29937  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29938  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29939  { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29940  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29941  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29942  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29943  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29944  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
29945  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29946  { 12517 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29947  { 12517 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29948  { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29949  { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29950  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29951  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29952  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29953  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29954  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29955  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29956  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29957  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29958  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29959  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29960  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29961  { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29962  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29963  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29964  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29965  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29966  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
29967  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29968  { 12526 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29969  { 12526 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29970  { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29971  { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29972  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29973  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29974  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29975  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29976  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29977  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29978  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29979  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29980  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29981  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29982  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29983  { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29984  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29985  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29986  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29987  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29988  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
29989  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29990  { 12535 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29991  { 12535 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29992  { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29993  { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29994  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29995  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29996  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29997  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29998  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29999  { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30000  { 12544 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30001  { 12544 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30002  { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30003  { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30004  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30005  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30006  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30007  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30008  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30009  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30010  { 12566 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30011  { 12566 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30012  { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30013  { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30014  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30015  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30016  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30017  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30018  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30019  { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30020  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30021  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30022  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30023  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30024  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30025  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30026  { 12575 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30027  { 12575 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30028  { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30029  { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30030  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30031  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30032  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30033  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30034  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30035  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30036  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30037  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30038  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30039  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30040  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30041  { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30042  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30043  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30044  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30045  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30046  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30047  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30048  { 12584 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30049  { 12584 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30050  { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30051  { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30052  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30053  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30054  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30055  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30056  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30057  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30058  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30059  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30060  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30061  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30062  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30063  { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30064  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30065  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30066  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30067  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30068  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30069  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30070  { 12593 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30071  { 12593 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30072  { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30073  { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30074  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30075  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30076  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30077  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30078  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30079  { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30080  { 12602 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30081  { 12602 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30082  { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30083  { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30084  { 12624 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30085  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30086  { 12624 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30087  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30088  { 12624 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30089  { 12624 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30090  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30091  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30092  { 12624 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30093  { 12624 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30094  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30095  { 12624 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30096  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30097  { 12624 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30098  { 12624 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30099  { 12624 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30100  { 12624 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30101  { 12624 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30102  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30103  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30104  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30105  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30106  { 12631 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30107  { 12631 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30108  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30109  { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30110  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30111  { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30112  { 12631 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30113  { 12631 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30114  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30115  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30116  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30117  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30118  { 12639 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30119  { 12639 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30120  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30121  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30122  { 12639 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30123  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30124  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30125  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30126  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30127  { 12639 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30128  { 12639 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30129  { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30130  { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30131  { 12639 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30132  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30133  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30134  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30135  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30136  { 12647 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30137  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30138  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30139  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30140  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30141  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30142  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30143  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30144  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30145  { 12647 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30146  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30147  { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30148  { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30149  { 12647 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30150  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30151  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30152  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30153  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30154  { 12655 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30155  { 12655 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30156  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30157  { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30158  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30159  { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30160  { 12655 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30161  { 12655 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30162  { 12663 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30163  { 12663 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30164  { 12663 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30165  { 12663 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30166  { 12663 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30167  { 12663 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30168  { 12663 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30169  { 12663 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30170  { 12663 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30171  { 12663 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30172  { 12663 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30173  { 12663 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30174  { 12670 /* vpcom */, X86::VPCOMBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30175  { 12670 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30176  { 12670 /* vpcom */, X86::VPCOMDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30177  { 12670 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30178  { 12670 /* vpcom */, X86::VPCOMQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30179  { 12670 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30180  { 12670 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30181  { 12670 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30182  { 12670 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30183  { 12670 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30184  { 12670 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30185  { 12670 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30186  { 12670 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30187  { 12670 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30188  { 12670 /* vpcom */, X86::VPCOMWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30189  { 12670 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30190  { 12676 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30191  { 12676 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30192  { 12683 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30193  { 12683 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30194  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30195  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30196  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30197  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30198  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30199  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30200  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30201  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30202  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30203  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30204  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30205  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30206  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30207  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30208  { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30209  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30210  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30211  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30212  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30213  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30214  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30215  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30216  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30217  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30218  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30219  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30220  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30221  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30222  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30223  { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30224  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30225  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30226  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30227  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30228  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30229  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30230  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30231  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30232  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30233  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30234  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30235  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30236  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30237  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30238  { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30239  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30240  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30241  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30242  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30243  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30244  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30245  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30246  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30247  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30248  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30249  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30250  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30251  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30252  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30253  { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30254  { 12738 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30255  { 12738 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30256  { 12745 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30257  { 12745 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30258  { 12753 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30259  { 12753 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30260  { 12761 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30261  { 12761 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30262  { 12769 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30263  { 12769 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30264  { 12777 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30265  { 12777 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30266  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30267  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
30268  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30269  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
30270  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30271  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
30272  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30273  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30274  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30275  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30276  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30277  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30278  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30279  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30280  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30281  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30282  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30283  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30284  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30285  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30286  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30287  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30288  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30289  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30290  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30291  { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30292  { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30293  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30294  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
30295  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30296  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
30297  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30298  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
30299  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30300  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30301  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30302  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30303  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30304  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30305  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30306  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30307  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30308  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30309  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30310  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30311  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30312  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30313  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30314  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30315  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30316  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30317  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30318  { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30319  { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30320  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30321  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30322  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30323  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30324  { 12808 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30325  { 12808 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30326  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30327  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30328  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30329  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30330  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30331  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30332  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30333  { 12808 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30334  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30335  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30336  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30337  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30338  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30339  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30340  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30341  { 12808 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30342  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30343  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30344  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30345  { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30346  { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30347  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30348  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30349  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30350  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30351  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30352  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30353  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30354  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30355  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30356  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30357  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30358  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30359  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30360  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30361  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30362  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30363  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30364  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30365  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30366  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30367  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30368  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30369  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30370  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30371  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30372  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30373  { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30374  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30375  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30376  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30377  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30378  { 12827 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30379  { 12827 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30380  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30381  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30382  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30383  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30384  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30385  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30386  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30387  { 12827 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30388  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30389  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30390  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30391  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30392  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30393  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30394  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30395  { 12827 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30396  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30397  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30398  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30399  { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30400  { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30401  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30402  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30403  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30404  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30405  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30406  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30407  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30408  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30409  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30410  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30411  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30412  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30413  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30414  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30415  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30416  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30417  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30418  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30419  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30420  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30421  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30422  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30423  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30424  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30425  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30426  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30427  { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30428  { 12846 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30429  { 12846 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30430  { 12857 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30431  { 12857 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30432  { 12868 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30433  { 12868 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30434  { 12868 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30435  { 12868 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30436  { 12868 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30437  { 12868 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30438  { 12868 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30439  { 12868 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30440  { 12868 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30441  { 12868 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30442  { 12868 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30443  { 12868 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30444  { 12868 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30445  { 12868 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30446  { 12868 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30447  { 12868 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30448  { 12868 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30449  { 12868 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30450  { 12875 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30451  { 12875 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30452  { 12875 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30453  { 12875 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30454  { 12875 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30455  { 12875 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30456  { 12875 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30457  { 12875 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30458  { 12875 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30459  { 12875 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30460  { 12875 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30461  { 12875 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30462  { 12875 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30463  { 12875 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30464  { 12875 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30465  { 12875 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30466  { 12875 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30467  { 12875 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30468  { 12875 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30469  { 12875 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30470  { 12882 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30471  { 12882 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30472  { 12882 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30473  { 12882 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30474  { 12882 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30475  { 12882 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30476  { 12882 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30477  { 12882 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30478  { 12882 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30479  { 12882 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30480  { 12882 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30481  { 12882 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30482  { 12882 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30483  { 12882 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30484  { 12882 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30485  { 12882 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30486  { 12882 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30487  { 12882 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30488  { 12891 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30489  { 12891 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30490  { 12891 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30491  { 12891 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30492  { 12891 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30493  { 12891 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30494  { 12891 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30495  { 12891 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30496  { 12891 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30497  { 12891 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30498  { 12891 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30499  { 12891 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30500  { 12891 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30501  { 12891 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30502  { 12891 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30503  { 12891 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30504  { 12891 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30505  { 12891 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30506  { 12891 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30507  { 12891 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30508  { 12891 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30509  { 12891 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30510  { 12891 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30511  { 12891 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30512  { 12891 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30513  { 12891 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30514  { 12891 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30515  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30516  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30517  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30518  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30519  { 12900 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30520  { 12900 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30521  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30522  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30523  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30524  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30525  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30526  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30527  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30528  { 12900 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30529  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30530  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30531  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30532  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30533  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30534  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30535  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30536  { 12900 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30537  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30538  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30539  { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30540  { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30541  { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30542  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30543  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30544  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30545  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30546  { 12910 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30547  { 12910 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30548  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30549  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30550  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30551  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30552  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30553  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30554  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30555  { 12910 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30556  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30557  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30558  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30559  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30560  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30561  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30562  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30563  { 12910 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30564  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30565  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30566  { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30567  { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30568  { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30569  { 12920 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30570  { 12920 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30571  { 12920 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30572  { 12920 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30573  { 12920 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30574  { 12920 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30575  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30576  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30577  { 12920 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30578  { 12920 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30579  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30580  { 12920 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30581  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30582  { 12920 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30583  { 12920 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30584  { 12920 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30585  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30586  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30587  { 12920 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30588  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30589  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30590  { 12920 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30591  { 12920 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30592  { 12920 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30593  { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30594  { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30595  { 12920 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30596  { 12929 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30597  { 12929 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30598  { 12929 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30599  { 12929 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30600  { 12929 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30601  { 12929 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30602  { 12929 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30603  { 12929 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30604  { 12929 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30605  { 12929 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30606  { 12929 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30607  { 12929 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30608  { 12929 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30609  { 12929 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30610  { 12929 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30611  { 12929 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30612  { 12929 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30613  { 12929 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30614  { 12938 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30615  { 12938 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30616  { 12938 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30617  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30618  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30619  { 12938 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30620  { 12949 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30621  { 12949 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30622  { 12949 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30623  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30624  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30625  { 12949 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30626  { 12960 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30627  { 12960 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30628  { 12960 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30629  { 12960 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30630  { 12960 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30631  { 12960 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30632  { 12960 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30633  { 12960 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30634  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30635  { 12960 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30636  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30637  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30638  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30639  { 12960 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30640  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30641  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30642  { 12960 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30643  { 12960 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30644  { 12960 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30645  { 12960 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30646  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30647  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30648  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30649  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30650  { 12960 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30651  { 12960 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30652  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30653  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30654  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30655  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30656  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30657  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30658  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30659  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30660  { 12960 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30661  { 12960 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30662  { 12960 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30663  { 12960 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30664  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30665  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30666  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30667  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30668  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30669  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30670  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30671  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30672  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30673  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30674  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30675  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30676  { 12960 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30677  { 12960 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30678  { 12960 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30679  { 12960 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30680  { 12960 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30681  { 12960 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30682  { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30683  { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30684  { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30685  { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30686  { 12960 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30687  { 12960 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30688  { 12970 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30689  { 12970 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30690  { 12970 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30691  { 12970 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30692  { 12970 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30693  { 12970 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30694  { 12970 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30695  { 12970 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30696  { 12970 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30697  { 12970 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30698  { 12970 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30699  { 12970 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30700  { 12970 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30701  { 12970 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30702  { 12970 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30703  { 12970 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30704  { 12970 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30705  { 12970 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30706  { 12970 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30707  { 12970 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30708  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30709  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30710  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30711  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30712  { 12970 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30713  { 12970 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30714  { 12970 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30715  { 12970 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30716  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30717  { 12970 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30718  { 12970 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30719  { 12970 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30720  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30721  { 12970 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30722  { 12970 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30723  { 12970 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30724  { 12970 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30725  { 12970 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30726  { 12970 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30727  { 12970 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30728  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30729  { 12970 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30730  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30731  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30732  { 12970 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30733  { 12970 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30734  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30735  { 12970 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30736  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30737  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30738  { 12970 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30739  { 12970 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30740  { 12970 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30741  { 12970 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30742  { 12970 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30743  { 12970 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30744  { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30745  { 12970 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30746  { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30747  { 12970 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30748  { 12970 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30749  { 12970 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30750  { 12980 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30751  { 12980 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30752  { 12980 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30753  { 12980 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30754  { 12980 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30755  { 12980 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30756  { 12980 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30757  { 12980 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30758  { 12980 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30759  { 12980 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30760  { 12980 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30761  { 12980 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30762  { 12980 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30763  { 12980 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30764  { 12980 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30765  { 12980 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30766  { 12980 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30767  { 12980 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30768  { 12980 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30769  { 12980 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30770  { 12980 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30771  { 12980 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30772  { 12980 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30773  { 12980 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30774  { 12980 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30775  { 12980 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30776  { 12980 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30777  { 12980 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30778  { 12980 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30779  { 12980 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30780  { 12980 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30781  { 12980 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30782  { 12980 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30783  { 12980 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30784  { 12980 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30785  { 12980 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30786  { 12980 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30787  { 12980 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30788  { 12988 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30789  { 12988 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30790  { 12988 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30791  { 12988 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30792  { 12988 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30793  { 12988 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30794  { 12988 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30795  { 12988 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30796  { 12988 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30797  { 12988 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30798  { 12988 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30799  { 12988 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30800  { 12988 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30801  { 12988 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30802  { 12988 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30803  { 12988 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30804  { 12988 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30805  { 12988 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30806  { 12988 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30807  { 12988 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30808  { 12996 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30809  { 12996 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30810  { 12996 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30811  { 12996 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30812  { 12996 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30813  { 12996 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30814  { 12996 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30815  { 12996 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30816  { 12996 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30817  { 12996 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30818  { 12996 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30819  { 12996 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30820  { 12996 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30821  { 12996 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30822  { 12996 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30823  { 12996 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30824  { 12996 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30825  { 12996 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30826  { 12996 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30827  { 12996 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30828  { 12996 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30829  { 12996 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30830  { 12996 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30831  { 12996 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30832  { 12996 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30833  { 12996 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30834  { 12996 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30835  { 12996 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30836  { 12996 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30837  { 12996 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30838  { 12996 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30839  { 12996 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30840  { 12996 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30841  { 12996 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30842  { 12996 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30843  { 12996 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30844  { 12996 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30845  { 12996 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30846  { 13003 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30847  { 13003 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30848  { 13003 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30849  { 13003 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30850  { 13003 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30851  { 13003 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30852  { 13003 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30853  { 13003 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30854  { 13003 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30855  { 13003 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30856  { 13003 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30857  { 13003 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30858  { 13003 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30859  { 13003 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30860  { 13003 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30861  { 13003 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30862  { 13003 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30863  { 13003 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30864  { 13012 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30865  { 13012 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30866  { 13012 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30867  { 13012 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30868  { 13012 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30869  { 13012 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30870  { 13012 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30871  { 13012 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30872  { 13012 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30873  { 13012 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30874  { 13012 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30875  { 13012 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30876  { 13012 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30877  { 13012 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30878  { 13012 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30879  { 13012 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30880  { 13012 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30881  { 13012 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30882  { 13012 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30883  { 13012 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30884  { 13012 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30885  { 13012 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30886  { 13012 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30887  { 13012 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30888  { 13012 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30889  { 13012 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30890  { 13012 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30891  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30892  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30893  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30894  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30895  { 13021 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30896  { 13021 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30897  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30898  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30899  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30900  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30901  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30902  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30903  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30904  { 13021 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30905  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30906  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30907  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30908  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30909  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30910  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30911  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30912  { 13021 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30913  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30914  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30915  { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30916  { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30917  { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30918  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30919  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30920  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30921  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30922  { 13031 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30923  { 13031 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30924  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30925  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30926  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30927  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30928  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30929  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30930  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30931  { 13031 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30932  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30933  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30934  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30935  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30936  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30937  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30938  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30939  { 13031 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30940  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30941  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30942  { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30943  { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30944  { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30945  { 13041 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30946  { 13041 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30947  { 13041 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30948  { 13041 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30949  { 13041 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30950  { 13041 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30951  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30952  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30953  { 13041 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30954  { 13041 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30955  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30956  { 13041 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30957  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30958  { 13041 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30959  { 13041 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30960  { 13041 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30961  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30962  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30963  { 13041 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30964  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30965  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30966  { 13041 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30967  { 13041 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30968  { 13041 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30969  { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30970  { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30971  { 13041 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30972  { 13050 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30973  { 13050 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30974  { 13050 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30975  { 13050 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30976  { 13050 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30977  { 13050 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30978  { 13050 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30979  { 13050 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30980  { 13050 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30981  { 13050 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30982  { 13050 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30983  { 13050 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30984  { 13050 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30985  { 13050 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30986  { 13050 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30987  { 13050 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30988  { 13050 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30989  { 13050 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30990  { 13059 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30991  { 13059 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30992  { 13059 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30993  { 13059 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30994  { 13059 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30995  { 13059 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30996  { 13059 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30997  { 13059 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30998  { 13059 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30999  { 13059 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31000  { 13059 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31001  { 13059 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31002  { 13059 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31003  { 13059 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31004  { 13059 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31005  { 13059 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31006  { 13059 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31007  { 13059 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31008  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31009  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31010  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31011  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31012  { 13066 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31013  { 13066 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31014  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31015  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31016  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31017  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31018  { 13066 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31019  { 13066 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31020  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31021  { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31022  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31023  { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31024  { 13066 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31025  { 13066 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31026  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31027  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31028  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31029  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31030  { 13076 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31031  { 13076 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31032  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31033  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31034  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31035  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31036  { 13076 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31037  { 13076 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31038  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31039  { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31040  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31041  { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31042  { 13076 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31043  { 13076 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31044  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31045  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31046  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31047  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31048  { 13086 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31049  { 13086 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31050  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31051  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31052  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31053  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31054  { 13086 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31055  { 13086 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31056  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31057  { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31058  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31059  { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31060  { 13086 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31061  { 13086 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31062  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31063  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31064  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31065  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31066  { 13096 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31067  { 13096 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31068  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31069  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31070  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31071  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31072  { 13096 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31073  { 13096 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31074  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31075  { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31076  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31077  { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31078  { 13096 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31079  { 13096 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31080  { 13106 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31081  { 13106 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31082  { 13106 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
31083  { 13106 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31084  { 13114 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31085  { 13114 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31086  { 13114 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31087  { 13114 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31088  { 13122 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31089  { 13122 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31090  { 13122 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31091  { 13122 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31092  { 13130 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31093  { 13130 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31094  { 13130 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
31095  { 13130 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31096  { 13138 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31097  { 13138 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31098  { 13138 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31099  { 13138 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31100  { 13138 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31101  { 13149 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31102  { 13149 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
31103  { 13149 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31104  { 13149 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
31105  { 13149 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
31106  { 13160 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
31107  { 13160 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
31108  { 13160 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
31109  { 13160 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
31110  { 13160 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
31111  { 13171 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31112  { 13171 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31113  { 13171 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31114  { 13171 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31115  { 13171 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31116  { 13182 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31117  { 13182 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31118  { 13191 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31119  { 13191 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31120  { 13200 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31121  { 13200 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31122  { 13209 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31123  { 13209 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31124  { 13209 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31125  { 13209 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31126  { 13217 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31127  { 13217 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31128  { 13226 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31129  { 13226 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31130  { 13226 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31131  { 13226 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31132  { 13235 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31133  { 13235 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31134  { 13245 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31135  { 13245 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31136  { 13255 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31137  { 13255 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31138  { 13265 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31139  { 13265 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31140  { 13275 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31141  { 13275 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31142  { 13285 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31143  { 13285 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31144  { 13295 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31145  { 13295 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31146  { 13295 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31147  { 13295 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31148  { 13303 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31149  { 13303 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31150  { 13312 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31151  { 13312 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31152  { 13321 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31153  { 13321 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31154  { 13333 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31155  { 13333 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31156  { 13342 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31157  { 13342 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31158  { 13342 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31159  { 13342 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31160  { 13350 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31161  { 13350 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31162  { 13359 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31163  { 13359 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31164  { 13359 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31165  { 13359 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31166  { 13368 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31167  { 13368 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31168  { 13368 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31169  { 13368 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31170  { 13376 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31171  { 13376 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31172  { 13385 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31173  { 13385 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31174  { 13385 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31175  { 13385 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31176  { 13393 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
31177  { 13393 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31178  { 13393 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
31179  { 13393 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31180  { 13401 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
31181  { 13401 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31182  { 13401 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
31183  { 13401 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31184  { 13409 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31185  { 13409 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31186  { 13409 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31187  { 13409 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31188  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31189  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31190  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31191  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31192  { 13417 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31193  { 13417 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31194  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31195  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31196  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31197  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31198  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31199  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31200  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31201  { 13417 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31202  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31203  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31204  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31205  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31206  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31207  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31208  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31209  { 13417 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31210  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31211  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31212  { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31213  { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31214  { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31215  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31216  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31217  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31218  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31219  { 13426 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31220  { 13426 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31221  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31222  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31223  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31224  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31225  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31226  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31227  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31228  { 13426 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31229  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31230  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31231  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31232  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31233  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31234  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31235  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31236  { 13426 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31237  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31238  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31239  { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31240  { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31241  { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31242  { 13435 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31243  { 13435 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31244  { 13444 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31245  { 13444 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31246  { 13454 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31247  { 13454 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31248  { 13464 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31249  { 13464 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31250  { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31251  { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31252  { 13485 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31253  { 13485 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31254  { 13496 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31255  { 13496 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31256  { 13506 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31257  { 13506 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31258  { 13516 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31259  { 13516 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31260  { 13525 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31261  { 13525 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31262  { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31263  { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31264  { 13545 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31265  { 13545 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31266  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31267  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31268  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31269  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31270  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31271  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31272  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31273  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31274  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31275  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31276  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31277  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31278  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31279  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31280  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31281  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31282  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31283  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31284  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31285  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31286  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31287  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31288  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31289  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31290  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31291  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31292  { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31293  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31294  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31295  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31296  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31297  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31298  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31299  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31300  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31301  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31302  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31303  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31304  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31305  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31306  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31307  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31308  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31309  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31310  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31311  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31312  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31313  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31314  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31315  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31316  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31317  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31318  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31319  { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31320  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31321  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31322  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31323  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31324  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31325  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31326  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31327  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31328  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31329  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31330  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31331  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31332  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31333  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31334  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31335  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31336  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31337  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31338  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31339  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31340  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31341  { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31342  { 13590 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31343  { 13590 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31344  { 13590 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31345  { 13590 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31346  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31347  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31348  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31349  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31350  { 13590 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31351  { 13590 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31352  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31353  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31354  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31355  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31356  { 13590 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31357  { 13590 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31358  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31359  { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31360  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31361  { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31362  { 13590 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31363  { 13590 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31364  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31365  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31366  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31367  { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31368  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31369  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31370  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31371  { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31372  { 13621 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31373  { 13621 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31374  { 13621 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31375  { 13621 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31376  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31377  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31378  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31379  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31380  { 13621 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31381  { 13621 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31382  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31383  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31384  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31385  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31386  { 13621 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31387  { 13621 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31388  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31389  { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31390  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31391  { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31392  { 13621 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31393  { 13621 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31394  { 13629 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31395  { 13629 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31396  { 13629 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31397  { 13629 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31398  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31399  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31400  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31401  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31402  { 13629 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31403  { 13629 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31404  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31405  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31406  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31407  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31408  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31409  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31410  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31411  { 13629 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31412  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31413  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31414  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31415  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31416  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31417  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31418  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31419  { 13629 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31420  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31421  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31422  { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31423  { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31424  { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31425  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31426  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31427  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31428  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31429  { 13637 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31430  { 13637 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31431  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31432  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31433  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31434  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31435  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31436  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31437  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31438  { 13637 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31439  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31440  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31441  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31442  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31443  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31444  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31445  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31446  { 13637 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31447  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31448  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31449  { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31450  { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31451  { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31452  { 13645 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31453  { 13645 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31454  { 13645 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31455  { 13645 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31456  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31457  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31458  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31459  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31460  { 13645 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31461  { 13645 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31462  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31463  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31464  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31465  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31466  { 13645 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31467  { 13645 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31468  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31469  { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31470  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31471  { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31472  { 13645 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31473  { 13645 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31474  { 13653 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31475  { 13653 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31476  { 13653 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31477  { 13653 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31478  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31479  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31480  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31481  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31482  { 13653 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31483  { 13653 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31484  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31485  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31486  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31487  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31488  { 13653 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31489  { 13653 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31490  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31491  { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31492  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31493  { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31494  { 13653 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31495  { 13653 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31496  { 13661 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31497  { 13661 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31498  { 13661 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31499  { 13661 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31500  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31501  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31502  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31503  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31504  { 13661 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31505  { 13661 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31506  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31507  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31508  { 13661 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31509  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31510  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31511  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31512  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31513  { 13661 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31514  { 13661 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31515  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31516  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31517  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31518  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31519  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31520  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31521  { 13661 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31522  { 13661 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31523  { 13661 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31524  { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31525  { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31526  { 13661 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31527  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31528  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31529  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31530  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31531  { 13669 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31532  { 13669 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31533  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31534  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31535  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31536  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31537  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31538  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31539  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31540  { 13669 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31541  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31542  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31543  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31544  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31545  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31546  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31547  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31548  { 13669 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31549  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31550  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31551  { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31552  { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31553  { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31554  { 13677 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31555  { 13677 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31556  { 13677 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31557  { 13677 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31558  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31559  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31560  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31561  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31562  { 13677 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31563  { 13677 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31564  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31565  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31566  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31567  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31568  { 13677 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31569  { 13677 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31570  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31571  { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31572  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31573  { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31574  { 13677 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31575  { 13677 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31576  { 13685 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31577  { 13685 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31578  { 13685 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31579  { 13685 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31580  { 13685 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31581  { 13685 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31582  { 13685 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31583  { 13685 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31584  { 13685 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31585  { 13685 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31586  { 13685 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31587  { 13685 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31588  { 13685 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31589  { 13685 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31590  { 13685 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31591  { 13685 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31592  { 13685 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31593  { 13685 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31594  { 13685 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31595  { 13685 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31596  { 13685 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31597  { 13685 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31598  { 13693 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31599  { 13693 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31600  { 13693 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31601  { 13693 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31602  { 13693 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31603  { 13693 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31604  { 13693 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31605  { 13693 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31606  { 13693 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31607  { 13693 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31608  { 13693 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31609  { 13693 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31610  { 13693 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31611  { 13693 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31612  { 13693 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31613  { 13693 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31614  { 13693 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31615  { 13693 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31616  { 13693 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31617  { 13693 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31618  { 13693 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31619  { 13693 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31620  { 13693 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31621  { 13693 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31622  { 13693 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31623  { 13693 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31624  { 13693 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31625  { 13693 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31626  { 13693 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31627  { 13693 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31628  { 13693 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31629  { 13701 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31630  { 13701 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31631  { 13701 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31632  { 13701 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31633  { 13701 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31634  { 13701 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31635  { 13701 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31636  { 13701 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31637  { 13701 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31638  { 13701 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31639  { 13701 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31640  { 13701 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31641  { 13701 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31642  { 13701 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31643  { 13701 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31644  { 13701 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31645  { 13701 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31646  { 13701 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31647  { 13701 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31648  { 13701 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31649  { 13701 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31650  { 13701 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31651  { 13701 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31652  { 13701 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31653  { 13701 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31654  { 13701 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31655  { 13701 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31656  { 13709 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31657  { 13709 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31658  { 13709 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31659  { 13709 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31660  { 13709 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31661  { 13709 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31662  { 13709 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31663  { 13709 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31664  { 13709 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31665  { 13709 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31666  { 13709 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31667  { 13709 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31668  { 13709 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31669  { 13709 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31670  { 13709 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31671  { 13709 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31672  { 13709 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31673  { 13709 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31674  { 13709 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31675  { 13709 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31676  { 13709 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31677  { 13709 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31678  { 13717 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31679  { 13717 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31680  { 13717 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31681  { 13717 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31682  { 13717 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31683  { 13717 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31684  { 13717 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31685  { 13717 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31686  { 13717 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31687  { 13717 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31688  { 13717 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31689  { 13717 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31690  { 13717 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31691  { 13717 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31692  { 13717 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31693  { 13717 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31694  { 13717 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31695  { 13717 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31696  { 13717 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31697  { 13717 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31698  { 13717 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31699  { 13717 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31700  { 13725 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31701  { 13725 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31702  { 13725 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31703  { 13725 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31704  { 13725 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31705  { 13725 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31706  { 13725 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31707  { 13725 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31708  { 13725 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31709  { 13725 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31710  { 13725 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31711  { 13725 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31712  { 13725 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31713  { 13725 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31714  { 13725 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31715  { 13725 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31716  { 13725 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31717  { 13725 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31718  { 13725 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31719  { 13725 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31720  { 13725 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31721  { 13725 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31722  { 13725 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31723  { 13725 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31724  { 13725 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31725  { 13725 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31726  { 13725 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31727  { 13725 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31728  { 13725 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31729  { 13725 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31730  { 13725 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31731  { 13733 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31732  { 13733 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31733  { 13733 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31734  { 13733 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31735  { 13733 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31736  { 13733 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31737  { 13733 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31738  { 13733 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31739  { 13733 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31740  { 13733 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31741  { 13733 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31742  { 13733 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31743  { 13733 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31744  { 13733 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31745  { 13733 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31746  { 13733 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31747  { 13733 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31748  { 13733 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31749  { 13733 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31750  { 13733 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31751  { 13733 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31752  { 13733 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31753  { 13733 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31754  { 13733 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31755  { 13733 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31756  { 13733 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31757  { 13733 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31758  { 13741 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31759  { 13741 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31760  { 13741 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31761  { 13741 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31762  { 13741 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31763  { 13741 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31764  { 13741 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31765  { 13741 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31766  { 13741 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31767  { 13741 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31768  { 13741 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31769  { 13741 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31770  { 13741 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31771  { 13741 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31772  { 13741 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31773  { 13741 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31774  { 13741 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31775  { 13741 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31776  { 13741 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31777  { 13741 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31778  { 13741 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31779  { 13741 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31780  { 13749 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
31781  { 13749 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
31782  { 13749 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
31783  { 13758 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
31784  { 13758 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
31785  { 13758 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
31786  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31787  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31788  { 13767 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31789  { 13767 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
31790  { 13767 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
31791  { 13767 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
31792  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31793  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31794  { 13767 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31795  { 13767 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31796  { 13767 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31797  { 13767 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31798  { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31799  { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31800  { 13767 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31801  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31802  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31803  { 13775 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
31804  { 13775 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
31805  { 13775 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
31806  { 13775 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
31807  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31808  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31809  { 13775 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31810  { 13775 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31811  { 13775 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31812  { 13775 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31813  { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31814  { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31815  { 13775 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31816  { 13783 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
31817  { 13783 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
31818  { 13783 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
31819  { 13792 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
31820  { 13792 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
31821  { 13792 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
31822  { 13801 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
31823  { 13801 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
31824  { 13801 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
31825  { 13810 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
31826  { 13810 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
31827  { 13810 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
31828  { 13819 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
31829  { 13819 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
31830  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
31831  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
31832  { 13829 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
31833  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31834  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31835  { 13838 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31836  { 13838 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
31837  { 13838 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
31838  { 13838 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
31839  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31840  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31841  { 13838 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31842  { 13838 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31843  { 13838 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31844  { 13838 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31845  { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31846  { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31847  { 13838 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31848  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31849  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31850  { 13846 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
31851  { 13846 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
31852  { 13846 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
31853  { 13846 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
31854  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31855  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31856  { 13846 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31857  { 13846 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31858  { 13846 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31859  { 13846 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31860  { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31861  { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31862  { 13846 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31863  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31864  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31865  { 13854 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31866  { 13854 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
31867  { 13854 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
31868  { 13854 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
31869  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31870  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31871  { 13854 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31872  { 13854 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31873  { 13854 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31874  { 13854 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31875  { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31876  { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31877  { 13854 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31878  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31879  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31880  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31881  { 13862 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
31882  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
31883  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
31884  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31885  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31886  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31887  { 13862 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31888  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31889  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31890  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31891  { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31892  { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31893  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31894  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31895  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
31896  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
31897  { 13871 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
31898  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
31899  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31900  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31901  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31902  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31903  { 13871 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31904  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31905  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31906  { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31907  { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31908  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31909  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31910  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31911  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
31912  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
31913  { 13880 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
31914  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31915  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31916  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31917  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31918  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31919  { 13880 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31920  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31921  { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31922  { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31923  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31924  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31925  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
31926  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
31927  { 13889 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
31928  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
31929  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31930  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31931  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31932  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31933  { 13889 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31934  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31935  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31936  { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31937  { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31938  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31939  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31940  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
31941  { 13898 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
31942  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
31943  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
31944  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31945  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31946  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31947  { 13898 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31948  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31949  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31950  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31951  { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31952  { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31953  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31954  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
31955  { 13907 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
31956  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
31957  { 13907 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
31958  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
31959  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31960  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31961  { 13907 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31962  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31963  { 13907 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31964  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31965  { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31966  { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31967  { 13907 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31968  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31969  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
31970  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
31971  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
31972  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31973  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
31974  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
31975  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
31976  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
31977  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
31978  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31979  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
31980  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31981  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
31982  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31983  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31984  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31985  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
31986  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31987  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
31988  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31989  { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31990  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31991  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
31992  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
31993  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
31994  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31995  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
31996  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
31997  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
31998  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
31999  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
32000  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32001  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32002  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32003  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32004  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32005  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32006  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32007  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32008  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32009  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32010  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32011  { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32012  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32013  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32014  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32015  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32016  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32017  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32018  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32019  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32020  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32021  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32022  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32023  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32024  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32025  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32026  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32027  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32028  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32029  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32030  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32031  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32032  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32033  { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32034  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32035  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32036  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32037  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32038  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32039  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32040  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32041  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32042  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32043  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32044  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32045  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32046  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32047  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32048  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32049  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32050  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32051  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32052  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32053  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32054  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32055  { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32056  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32057  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32058  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32059  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32060  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32061  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32062  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32063  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32064  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32065  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32066  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32067  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32068  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32069  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32070  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32071  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32072  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32073  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32074  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32075  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32076  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32077  { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32078  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32079  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32080  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32081  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32082  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32083  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32084  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32085  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32086  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32087  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32088  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32089  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32090  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32091  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32092  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32093  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32094  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32095  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32096  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32097  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32098  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32099  { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32100  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32101  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32102  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32103  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32104  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32105  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32106  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32107  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32108  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32109  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32110  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32111  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32112  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32113  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32114  { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32115  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32116  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32117  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32118  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32119  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32120  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32121  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32122  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32123  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32124  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32125  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32126  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32127  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32128  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32129  { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32130  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32131  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32132  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32133  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
32134  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
32135  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
32136  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32137  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32138  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32139  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32140  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32141  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32142  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32143  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32144  { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32145  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32146  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32147  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32148  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32149  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32150  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32151  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32152  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32153  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32154  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32155  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32156  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32157  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32158  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32159  { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32160  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32161  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32162  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32163  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32164  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32165  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32166  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32167  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32168  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32169  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32170  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32171  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32172  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32173  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32174  { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32175  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32176  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32177  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32178  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32179  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32180  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32181  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32182  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32183  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32184  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32185  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32186  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32187  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32188  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32189  { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32190  { 14036 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
32191  { 14036 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
32192  { 14036 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
32193  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32194  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32195  { 14045 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32196  { 14045 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32197  { 14045 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32198  { 14045 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32199  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32200  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32201  { 14045 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32202  { 14045 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32203  { 14045 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32204  { 14045 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32205  { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32206  { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32207  { 14045 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32208  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32209  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32210  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32211  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32212  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32213  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32214  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32215  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32216  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32217  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32218  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32219  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32220  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32221  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32222  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32223  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32224  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32225  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32226  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32227  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32228  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32229  { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32230  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32231  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
32232  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32233  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
32234  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32235  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
32236  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32237  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
32238  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32239  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
32240  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32241  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32242  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32243  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32244  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32245  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32246  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32247  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32248  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32249  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32250  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32251  { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32252  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32253  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32254  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32255  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32256  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32257  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32258  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32259  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32260  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32261  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32262  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32263  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32264  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32265  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32266  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32267  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32268  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32269  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32270  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32271  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32272  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32273  { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32274  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32275  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32276  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32277  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32278  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32279  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32280  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32281  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32282  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32283  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32284  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32285  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32286  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32287  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32288  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32289  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32290  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32291  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32292  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32293  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32294  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32295  { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32296  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32297  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32298  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32299  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32300  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32301  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32302  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32303  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32304  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32305  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32306  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32307  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32308  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32309  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32310  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32311  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32312  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32313  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32314  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32315  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32316  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32317  { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32318  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32319  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32320  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32321  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32322  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32323  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32324  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32325  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32326  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32327  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32328  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32329  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32330  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32331  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32332  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32333  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32334  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32335  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32336  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32337  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32338  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32339  { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32340  { 14113 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32341  { 14113 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32342  { 14113 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32343  { 14113 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32344  { 14113 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32345  { 14113 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32346  { 14113 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32347  { 14113 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32348  { 14113 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32349  { 14113 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32350  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32351  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32352  { 14113 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32353  { 14113 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32354  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32355  { 14113 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32356  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32357  { 14113 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32358  { 14113 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32359  { 14113 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32360  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32361  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32362  { 14113 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32363  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32364  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32365  { 14113 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32366  { 14113 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32367  { 14113 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32368  { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32369  { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32370  { 14113 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32371  { 14121 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32372  { 14121 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32373  { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32374  { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32375  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32376  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32377  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32378  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32379  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32380  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32381  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32382  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32383  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32384  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32385  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32386  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32387  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32388  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32389  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32390  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32391  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32392  { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32393  { 14131 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32394  { 14131 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32395  { 14131 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32396  { 14131 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32397  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32398  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32399  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32400  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32401  { 14131 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32402  { 14131 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32403  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32404  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32405  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32406  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32407  { 14131 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32408  { 14131 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32409  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32410  { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32411  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32412  { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32413  { 14131 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32414  { 14131 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32415  { 14140 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32416  { 14140 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32417  { 14140 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32418  { 14140 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32419  { 14140 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32420  { 14140 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32421  { 14140 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32422  { 14140 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32423  { 14140 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32424  { 14140 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32425  { 14140 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32426  { 14140 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32427  { 14140 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32428  { 14140 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32429  { 14140 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32430  { 14140 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32431  { 14140 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32432  { 14140 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32433  { 14140 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32434  { 14140 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32435  { 14140 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32436  { 14140 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32437  { 14148 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32438  { 14148 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32439  { 14148 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32440  { 14148 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32441  { 14148 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32442  { 14148 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32443  { 14148 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32444  { 14148 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32445  { 14148 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32446  { 14148 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32447  { 14148 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32448  { 14148 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32449  { 14148 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32450  { 14148 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32451  { 14148 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32452  { 14148 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32453  { 14148 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32454  { 14148 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32455  { 14148 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32456  { 14148 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32457  { 14148 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32458  { 14148 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32459  { 14148 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32460  { 14148 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32461  { 14148 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32462  { 14148 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32463  { 14148 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32464  { 14148 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32465  { 14148 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32466  { 14148 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32467  { 14148 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32468  { 14156 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32469  { 14156 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32470  { 14156 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32471  { 14156 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32472  { 14156 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32473  { 14156 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32474  { 14156 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32475  { 14156 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32476  { 14156 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32477  { 14156 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32478  { 14156 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32479  { 14156 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32480  { 14156 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32481  { 14156 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32482  { 14156 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32483  { 14156 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32484  { 14156 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32485  { 14156 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32486  { 14156 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32487  { 14156 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32488  { 14156 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32489  { 14156 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32490  { 14156 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32491  { 14156 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32492  { 14156 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32493  { 14156 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32494  { 14156 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32495  { 14164 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32496  { 14164 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32497  { 14164 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32498  { 14164 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32499  { 14164 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32500  { 14164 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32501  { 14164 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32502  { 14164 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32503  { 14164 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32504  { 14164 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32505  { 14164 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32506  { 14164 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32507  { 14164 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32508  { 14164 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32509  { 14164 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32510  { 14164 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32511  { 14164 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32512  { 14164 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32513  { 14164 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32514  { 14164 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32515  { 14164 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32516  { 14164 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32517  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32518  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32519  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32520  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32521  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32522  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32523  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32524  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32525  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32526  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32527  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32528  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32529  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32530  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32531  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32532  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32533  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32534  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32535  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32536  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32537  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32538  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32539  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32540  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32541  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32542  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32543  { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32544  { 14187 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32545  { 14187 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32546  { 14187 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32547  { 14187 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32548  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32549  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32550  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32551  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32552  { 14187 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32553  { 14187 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32554  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32555  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32556  { 14187 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32557  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32558  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32559  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32560  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32561  { 14187 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32562  { 14187 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32563  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32564  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32565  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32566  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32567  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32568  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32569  { 14187 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32570  { 14187 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32571  { 14187 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32572  { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32573  { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32574  { 14187 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32575  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32576  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32577  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32578  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32579  { 14196 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32580  { 14196 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32581  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32582  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32583  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32584  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32585  { 14196 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32586  { 14196 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32587  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32588  { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32589  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32590  { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32591  { 14196 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32592  { 14196 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32593  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32594  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32595  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32596  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32597  { 14205 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32598  { 14205 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32599  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32600  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32601  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32602  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32603  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32604  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32605  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32606  { 14205 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32607  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32608  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32609  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32610  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32611  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32612  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32613  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32614  { 14205 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32615  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32616  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32617  { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32618  { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32619  { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32620  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32621  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32622  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32623  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32624  { 14214 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32625  { 14214 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32626  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32627  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32628  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32629  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32630  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32631  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32632  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32633  { 14214 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32634  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32635  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32636  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32637  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32638  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32639  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32640  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32641  { 14214 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32642  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32643  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32644  { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32645  { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32646  { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32647  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32648  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32649  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32650  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32651  { 14223 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32652  { 14223 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32653  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32654  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32655  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32656  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32657  { 14223 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32658  { 14223 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32659  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32660  { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32661  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32662  { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32663  { 14223 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32664  { 14223 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32665  { 14232 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32666  { 14232 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32667  { 14232 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32668  { 14232 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32669  { 14237 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32670  { 14237 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32671  { 14237 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32672  { 14237 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32673  { 14237 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32674  { 14237 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32675  { 14237 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32676  { 14237 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32677  { 14237 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32678  { 14237 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32679  { 14237 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32680  { 14237 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32681  { 14237 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32682  { 14237 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32683  { 14237 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32684  { 14237 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32685  { 14237 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32686  { 14237 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32687  { 14237 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32688  { 14237 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32689  { 14237 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32690  { 14237 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32691  { 14237 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32692  { 14237 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32693  { 14237 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32694  { 14237 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32695  { 14237 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32696  { 14243 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32697  { 14243 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32698  { 14243 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32699  { 14243 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32700  { 14243 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32701  { 14243 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32702  { 14243 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32703  { 14243 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32704  { 14243 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32705  { 14243 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32706  { 14243 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32707  { 14243 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32708  { 14243 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32709  { 14243 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32710  { 14243 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32711  { 14243 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32712  { 14243 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32713  { 14243 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32714  { 14243 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32715  { 14243 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32716  { 14243 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32717  { 14243 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32718  { 14243 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32719  { 14243 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32720  { 14243 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32721  { 14243 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32722  { 14243 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32723  { 14249 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32724  { 14249 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32725  { 14249 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32726  { 14256 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32727  { 14256 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32728  { 14256 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32729  { 14256 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32730  { 14256 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32731  { 14256 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32732  { 14256 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32733  { 14256 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32734  { 14256 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32735  { 14256 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32736  { 14256 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32737  { 14256 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32738  { 14256 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32739  { 14256 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32740  { 14256 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32741  { 14256 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32742  { 14256 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32743  { 14256 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32744  { 14256 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32745  { 14256 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32746  { 14256 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32747  { 14256 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32748  { 14256 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32749  { 14256 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32750  { 14256 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32751  { 14256 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32752  { 14256 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32753  { 14263 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32754  { 14263 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32755  { 14263 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32756  { 14263 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32757  { 14263 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32758  { 14263 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32759  { 14263 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32760  { 14263 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32761  { 14263 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32762  { 14263 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32763  { 14263 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32764  { 14263 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32765  { 14263 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32766  { 14263 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32767  { 14263 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32768  { 14263 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32769  { 14263 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32770  { 14263 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32771  { 14263 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32772  { 14263 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32773  { 14263 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32774  { 14263 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32775  { 14263 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32776  { 14263 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32777  { 14263 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32778  { 14263 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32779  { 14263 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32780  { 14270 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32781  { 14270 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32782  { 14270 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32783  { 14270 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32784  { 14270 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32785  { 14270 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32786  { 14270 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32787  { 14270 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32788  { 14270 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32789  { 14270 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32790  { 14270 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32791  { 14270 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32792  { 14270 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32793  { 14270 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32794  { 14270 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32795  { 14270 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32796  { 14270 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32797  { 14270 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32798  { 14270 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32799  { 14270 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32800  { 14270 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32801  { 14270 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32802  { 14270 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32803  { 14270 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32804  { 14270 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32805  { 14270 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32806  { 14270 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32807  { 14278 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32808  { 14278 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32809  { 14278 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32810  { 14278 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32811  { 14278 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32812  { 14278 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32813  { 14278 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32814  { 14278 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32815  { 14278 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32816  { 14278 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32817  { 14278 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32818  { 14278 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32819  { 14278 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32820  { 14278 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32821  { 14278 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32822  { 14278 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32823  { 14278 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32824  { 14278 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32825  { 14278 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32826  { 14278 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32827  { 14278 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32828  { 14278 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32829  { 14278 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32830  { 14278 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32831  { 14278 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32832  { 14278 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32833  { 14278 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32834  { 14286 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32835  { 14286 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32836  { 14286 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32837  { 14286 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32838  { 14286 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32839  { 14286 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32840  { 14286 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32841  { 14286 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32842  { 14286 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32843  { 14286 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32844  { 14286 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32845  { 14286 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32846  { 14286 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32847  { 14286 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32848  { 14286 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32849  { 14286 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32850  { 14286 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32851  { 14286 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32852  { 14286 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32853  { 14286 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32854  { 14286 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32855  { 14286 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32856  { 14286 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32857  { 14286 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32858  { 14286 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32859  { 14286 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32860  { 14286 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32861  { 14293 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32862  { 14293 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32863  { 14293 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32864  { 14293 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32865  { 14293 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32866  { 14293 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32867  { 14293 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32868  { 14293 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32869  { 14293 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32870  { 14293 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32871  { 14293 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32872  { 14293 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32873  { 14293 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32874  { 14293 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32875  { 14293 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32876  { 14293 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32877  { 14293 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32878  { 14293 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32879  { 14293 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32880  { 14293 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32881  { 14293 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32882  { 14293 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32883  { 14293 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32884  { 14293 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32885  { 14293 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32886  { 14293 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32887  { 14293 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32888  { 14300 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32889  { 14300 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32890  { 14300 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32891  { 14300 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32892  { 14300 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32893  { 14300 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32894  { 14300 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32895  { 14300 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32896  { 14300 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32897  { 14300 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32898  { 14300 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32899  { 14300 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32900  { 14300 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32901  { 14300 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32902  { 14300 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32903  { 14300 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32904  { 14300 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32905  { 14300 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32906  { 14300 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32907  { 14300 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32908  { 14300 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32909  { 14300 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32910  { 14300 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32911  { 14300 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32912  { 14300 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32913  { 14300 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32914  { 14300 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32915  { 14308 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32916  { 14308 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32917  { 14308 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32918  { 14308 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32919  { 14308 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32920  { 14308 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32921  { 14308 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32922  { 14308 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32923  { 14308 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32924  { 14308 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32925  { 14308 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32926  { 14308 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32927  { 14308 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32928  { 14308 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32929  { 14308 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32930  { 14308 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32931  { 14308 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32932  { 14308 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32933  { 14308 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32934  { 14308 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32935  { 14308 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32936  { 14308 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32937  { 14308 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32938  { 14308 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32939  { 14308 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32940  { 14308 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32941  { 14308 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32942  { 14316 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32943  { 14316 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32944  { 14316 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32945  { 14316 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32946  { 14316 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32947  { 14323 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32948  { 14323 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32949  { 14323 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32950  { 14323 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32951  { 14323 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32952  { 14330 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32953  { 14330 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32954  { 14330 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32955  { 14330 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32956  { 14330 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32957  { 14337 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32958  { 14337 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32959  { 14337 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32960  { 14337 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32961  { 14337 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32962  { 14344 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32963  { 14344 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32964  { 14344 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32965  { 14344 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32966  { 14344 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32967  { 14344 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32968  { 14344 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32969  { 14344 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32970  { 14344 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32971  { 14344 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32972  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32973  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32974  { 14352 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32975  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32976  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32977  { 14364 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32978  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32979  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32980  { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32981  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32982  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32983  { 14388 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32984  { 14400 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32985  { 14400 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32986  { 14400 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32987  { 14407 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32988  { 14407 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32989  { 14407 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32990  { 14414 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32991  { 14414 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32992  { 14414 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32993  { 14421 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32994  { 14421 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32995  { 14421 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32996  { 14428 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32997  { 14428 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32998  { 14428 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32999  { 14435 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33000  { 14435 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33001  { 14435 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33002  { 14442 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33003  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33004  { 14442 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33005  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33006  { 14442 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33007  { 14442 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33008  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33009  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33010  { 14442 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33011  { 14442 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33012  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33013  { 14442 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33014  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33015  { 14442 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33016  { 14442 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33017  { 14442 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33018  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33019  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33020  { 14442 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33021  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33022  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33023  { 14442 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33024  { 14442 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33025  { 14442 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33026  { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33027  { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33028  { 14442 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33029  { 14450 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33030  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33031  { 14450 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33032  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33033  { 14450 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33034  { 14450 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33035  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33036  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33037  { 14450 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33038  { 14450 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33039  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33040  { 14450 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33041  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33042  { 14450 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33043  { 14450 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33044  { 14450 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33045  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33046  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33047  { 14450 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33048  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33049  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33050  { 14450 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33051  { 14450 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33052  { 14450 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33053  { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33054  { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33055  { 14450 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33056  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33057  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33058  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33059  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33060  { 14458 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33061  { 14458 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33062  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33063  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33064  { 14458 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33065  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33066  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33067  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33068  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33069  { 14458 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33070  { 14458 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33071  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33072  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33073  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33074  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33075  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33076  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33077  { 14458 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33078  { 14458 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33079  { 14458 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33080  { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33081  { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33082  { 14458 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33083  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33084  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33085  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33086  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33087  { 14467 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33088  { 14467 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33089  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33090  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33091  { 14467 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33092  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33093  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33094  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33095  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33096  { 14467 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33097  { 14467 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33098  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33099  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33100  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33101  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33102  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33103  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33104  { 14467 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33105  { 14467 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33106  { 14467 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33107  { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33108  { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33109  { 14467 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33110  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33111  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33112  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33113  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33114  { 14476 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33115  { 14476 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33116  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33117  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33118  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33119  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33120  { 14476 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33121  { 14476 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33122  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33123  { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33124  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33125  { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33126  { 14476 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33127  { 14476 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33128  { 14485 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33129  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33130  { 14485 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33131  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33132  { 14485 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33133  { 14485 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33134  { 14485 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33135  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33136  { 14485 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33137  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33138  { 14485 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33139  { 14485 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33140  { 14485 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33141  { 14485 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33142  { 14485 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33143  { 14485 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33144  { 14485 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33145  { 14485 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33146  { 14493 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33147  { 14493 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33148  { 14493 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33149  { 14500 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33150  { 14500 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33151  { 14500 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33152  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33153  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33154  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33155  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33156  { 14507 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33157  { 14507 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33158  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33159  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33160  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33161  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33162  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33163  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33164  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33165  { 14507 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33166  { 14507 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33167  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33168  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33169  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33170  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33171  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33172  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33173  { 14507 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33174  { 14507 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33175  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33176  { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33177  { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33178  { 14507 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33179  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33180  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33181  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33182  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33183  { 14515 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33184  { 14515 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33185  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33186  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33187  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33188  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33189  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33190  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33191  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33192  { 14515 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33193  { 14515 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33194  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33195  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33196  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33197  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33198  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33199  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33200  { 14515 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33201  { 14515 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33202  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33203  { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33204  { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33205  { 14515 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33206  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33207  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33208  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33209  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33210  { 14523 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33211  { 14523 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33212  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33213  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33214  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33215  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33216  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33217  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33218  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33219  { 14523 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33220  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33221  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33222  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33223  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33224  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33225  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33226  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33227  { 14523 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33228  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33229  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33230  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33231  { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33232  { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33233  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33234  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33235  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33236  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33237  { 14532 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33238  { 14532 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33239  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33240  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33241  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33242  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33243  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33244  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33245  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33246  { 14532 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33247  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33248  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33249  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33250  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33251  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33252  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33253  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33254  { 14532 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33255  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33256  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33257  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33258  { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33259  { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33260  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33261  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33262  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33263  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33264  { 14541 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33265  { 14541 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33266  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33267  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33268  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33269  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33270  { 14541 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33271  { 14541 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33272  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33273  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33274  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33275  { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33276  { 14541 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33277  { 14541 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33278  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33279  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33280  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33281  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33282  { 14550 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33283  { 14550 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33284  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33285  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33286  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33287  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33288  { 14550 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33289  { 14550 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33290  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33291  { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33292  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33293  { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33294  { 14550 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33295  { 14550 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33296  { 14558 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33297  { 14558 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33298  { 14558 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33299  { 14558 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33300  { 14558 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33301  { 14558 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33302  { 14558 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33303  { 14558 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33304  { 14558 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33305  { 14558 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33306  { 14558 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33307  { 14558 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33308  { 14558 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33309  { 14558 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33310  { 14558 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33311  { 14558 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33312  { 14558 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33313  { 14558 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33314  { 14558 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33315  { 14558 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33316  { 14558 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33317  { 14558 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33318  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
33319  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
33320  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
33321  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
33322  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
33323  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
33324  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33325  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33326  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33327  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33328  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33329  { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33330  { 14579 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33331  { 14579 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33332  { 14579 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33333  { 14579 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33334  { 14579 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33335  { 14579 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33336  { 14579 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33337  { 14579 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33338  { 14579 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33339  { 14579 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33340  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33341  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33342  { 14579 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33343  { 14579 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33344  { 14579 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33345  { 14579 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33346  { 14579 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33347  { 14579 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33348  { 14579 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33349  { 14579 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33350  { 14579 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33351  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33352  { 14579 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33353  { 14579 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33354  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33355  { 14579 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33356  { 14579 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33357  { 14579 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33358  { 14579 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33359  { 14579 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33360  { 14579 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33361  { 14587 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33362  { 14587 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33363  { 14587 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33364  { 14587 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33365  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33366  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33367  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33368  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33369  { 14587 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33370  { 14587 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33371  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33372  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33373  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33374  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33375  { 14587 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33376  { 14587 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33377  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33378  { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33379  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33380  { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33381  { 14587 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33382  { 14587 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33383  { 14596 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33384  { 14596 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33385  { 14596 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33386  { 14596 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33387  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33388  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33389  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33390  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33391  { 14596 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33392  { 14596 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33393  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33394  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33395  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33396  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33397  { 14596 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33398  { 14596 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33399  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33400  { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33401  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33402  { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33403  { 14596 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33404  { 14596 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33405  { 14605 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33406  { 14605 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33407  { 14605 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33408  { 14605 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33409  { 14613 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33410  { 14613 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33411  { 14613 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33412  { 14613 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33413  { 14621 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33414  { 14621 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33415  { 14621 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33416  { 14621 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33417  { 14629 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33418  { 14629 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33419  { 14629 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33420  { 14629 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33421  { 14629 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33422  { 14629 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33423  { 14629 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33424  { 14629 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33425  { 14629 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33426  { 14629 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33427  { 14629 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33428  { 14629 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33429  { 14629 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33430  { 14629 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33431  { 14629 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33432  { 14629 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33433  { 14629 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33434  { 14629 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33435  { 14629 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33436  { 14629 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33437  { 14629 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33438  { 14629 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33439  { 14629 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33440  { 14629 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33441  { 14629 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33442  { 14629 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33443  { 14629 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33444  { 14629 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33445  { 14629 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33446  { 14629 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33447  { 14629 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33448  { 14629 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33449  { 14629 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33450  { 14629 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33451  { 14629 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33452  { 14629 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33453  { 14629 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33454  { 14629 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33455  { 14629 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33456  { 14629 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33457  { 14629 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33458  { 14629 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33459  { 14629 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33460  { 14629 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33461  { 14629 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33462  { 14629 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33463  { 14629 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33464  { 14629 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33465  { 14629 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33466  { 14629 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33467  { 14629 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33468  { 14636 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33469  { 14636 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33470  { 14636 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33471  { 14636 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33472  { 14636 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33473  { 14636 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33474  { 14636 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33475  { 14636 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33476  { 14644 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33477  { 14644 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33478  { 14644 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33479  { 14644 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33480  { 14644 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33481  { 14644 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33482  { 14644 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33483  { 14644 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33484  { 14644 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33485  { 14644 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33486  { 14644 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33487  { 14644 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33488  { 14644 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33489  { 14644 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33490  { 14644 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33491  { 14644 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33492  { 14644 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33493  { 14644 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33494  { 14644 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33495  { 14644 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33496  { 14644 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33497  { 14644 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33498  { 14644 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33499  { 14644 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33500  { 14644 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33501  { 14644 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33502  { 14644 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33503  { 14644 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33504  { 14644 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33505  { 14644 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33506  { 14644 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33507  { 14644 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33508  { 14644 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33509  { 14644 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33510  { 14644 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33511  { 14644 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33512  { 14644 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33513  { 14644 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33514  { 14644 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33515  { 14644 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33516  { 14644 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33517  { 14644 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33518  { 14644 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33519  { 14644 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33520  { 14644 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33521  { 14644 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33522  { 14644 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33523  { 14644 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33524  { 14644 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33525  { 14644 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33526  { 14644 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33527  { 14651 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33528  { 14651 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33529  { 14651 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33530  { 14651 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33531  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33532  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33533  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33534  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33535  { 14651 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33536  { 14651 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33537  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33538  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33539  { 14651 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33540  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33541  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33542  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33543  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33544  { 14651 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33545  { 14651 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33546  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33547  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33548  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33549  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33550  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33551  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33552  { 14651 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33553  { 14651 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33554  { 14651 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33555  { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33556  { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33557  { 14651 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33558  { 14659 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33559  { 14659 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33560  { 14659 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33561  { 14659 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33562  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33563  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33564  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33565  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33566  { 14659 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33567  { 14659 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33568  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33569  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33570  { 14659 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33571  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33572  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33573  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33574  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33575  { 14659 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33576  { 14659 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33577  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33578  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33579  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33580  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33581  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33582  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33583  { 14659 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33584  { 14659 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33585  { 14659 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33586  { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33587  { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33588  { 14659 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33589  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33590  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33591  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33592  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33593  { 14667 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33594  { 14667 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33595  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33596  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33597  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33598  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33599  { 14667 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33600  { 14667 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33601  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33602  { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33603  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33604  { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33605  { 14667 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33606  { 14667 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33607  { 14675 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33608  { 14675 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33609  { 14675 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33610  { 14675 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33611  { 14675 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33612  { 14675 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33613  { 14675 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33614  { 14675 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33615  { 14675 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33616  { 14675 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33617  { 14675 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33618  { 14675 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33619  { 14675 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33620  { 14675 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33621  { 14675 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33622  { 14675 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33623  { 14675 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33624  { 14675 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33625  { 14675 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33626  { 14675 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33627  { 14675 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33628  { 14675 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33629  { 14675 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33630  { 14675 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33631  { 14675 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33632  { 14675 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33633  { 14675 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33634  { 14675 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33635  { 14675 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33636  { 14675 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33637  { 14675 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33638  { 14675 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33639  { 14675 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33640  { 14675 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33641  { 14675 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33642  { 14675 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33643  { 14675 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33644  { 14675 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33645  { 14675 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33646  { 14675 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33647  { 14675 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33648  { 14675 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33649  { 14682 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33650  { 14682 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33651  { 14682 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33652  { 14682 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33653  { 14682 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33654  { 14682 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33655  { 14682 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33656  { 14682 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33657  { 14682 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33658  { 14682 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33659  { 14682 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33660  { 14682 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33661  { 14682 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33662  { 14682 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33663  { 14682 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33664  { 14682 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33665  { 14682 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33666  { 14682 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33667  { 14682 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33668  { 14682 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33669  { 14682 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33670  { 14682 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33671  { 14682 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33672  { 14682 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33673  { 14682 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33674  { 14682 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33675  { 14682 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33676  { 14682 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33677  { 14682 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33678  { 14682 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33679  { 14682 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33680  { 14682 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33681  { 14682 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33682  { 14682 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33683  { 14682 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33684  { 14682 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33685  { 14682 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33686  { 14682 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33687  { 14682 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33688  { 14682 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33689  { 14682 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33690  { 14682 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33691  { 14682 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33692  { 14682 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33693  { 14682 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33694  { 14682 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33695  { 14682 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33696  { 14682 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33697  { 14682 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33698  { 14682 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33699  { 14682 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33700  { 14689 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33701  { 14689 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33702  { 14689 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33703  { 14689 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33704  { 14689 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33705  { 14689 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33706  { 14689 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33707  { 14689 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33708  { 14689 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33709  { 14689 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33710  { 14689 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33711  { 14689 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33712  { 14689 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33713  { 14689 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33714  { 14689 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33715  { 14689 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33716  { 14689 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33717  { 14689 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33718  { 14689 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33719  { 14689 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33720  { 14689 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33721  { 14689 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33722  { 14689 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33723  { 14689 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33724  { 14689 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33725  { 14689 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33726  { 14689 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33727  { 14689 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33728  { 14689 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33729  { 14689 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33730  { 14689 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33731  { 14689 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33732  { 14689 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33733  { 14689 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33734  { 14689 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33735  { 14689 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33736  { 14689 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33737  { 14689 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33738  { 14689 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33739  { 14689 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33740  { 14689 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33741  { 14689 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33742  { 14689 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33743  { 14689 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33744  { 14689 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33745  { 14696 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33746  { 14696 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33747  { 14696 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33748  { 14696 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33749  { 14696 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33750  { 14696 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33751  { 14696 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33752  { 14696 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33753  { 14696 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33754  { 14696 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33755  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33756  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33757  { 14696 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33758  { 14696 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33759  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33760  { 14696 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33761  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33762  { 14696 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33763  { 14696 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33764  { 14696 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33765  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33766  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33767  { 14696 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33768  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33769  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33770  { 14696 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33771  { 14696 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33772  { 14696 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33773  { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33774  { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33775  { 14696 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33776  { 14704 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33777  { 14704 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33778  { 14704 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33779  { 14704 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33780  { 14704 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33781  { 14704 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33782  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33783  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33784  { 14704 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33785  { 14704 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33786  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33787  { 14704 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33788  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33789  { 14704 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33790  { 14704 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33791  { 14704 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33792  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33793  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33794  { 14704 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33795  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33796  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33797  { 14704 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33798  { 14704 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33799  { 14704 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33800  { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33801  { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33802  { 14704 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33803  { 14712 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33804  { 14712 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33805  { 14712 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33806  { 14712 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33807  { 14712 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33808  { 14712 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33809  { 14712 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33810  { 14712 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33811  { 14712 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33812  { 14712 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33813  { 14712 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33814  { 14712 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33815  { 14712 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33816  { 14712 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33817  { 14712 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33818  { 14712 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33819  { 14712 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33820  { 14712 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33821  { 14720 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33822  { 14720 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33823  { 14720 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33824  { 14720 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33825  { 14720 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33826  { 14720 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33827  { 14720 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33828  { 14720 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33829  { 14720 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33830  { 14720 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33831  { 14720 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33832  { 14720 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33833  { 14720 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33834  { 14720 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33835  { 14720 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33836  { 14720 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33837  { 14720 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33838  { 14720 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33839  { 14720 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33840  { 14720 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33841  { 14720 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33842  { 14720 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33843  { 14720 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33844  { 14720 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33845  { 14720 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33846  { 14720 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33847  { 14720 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33848  { 14720 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33849  { 14720 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33850  { 14720 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33851  { 14720 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33852  { 14720 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33853  { 14720 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33854  { 14720 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33855  { 14720 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33856  { 14720 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33857  { 14720 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33858  { 14720 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33859  { 14720 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33860  { 14720 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33861  { 14720 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33862  { 14720 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33863  { 14727 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33864  { 14727 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33865  { 14727 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33866  { 14727 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33867  { 14727 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33868  { 14727 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33869  { 14727 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33870  { 14727 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33871  { 14727 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33872  { 14727 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33873  { 14727 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33874  { 14727 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33875  { 14727 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33876  { 14727 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33877  { 14727 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33878  { 14727 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33879  { 14727 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33880  { 14727 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33881  { 14727 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33882  { 14727 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33883  { 14727 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33884  { 14727 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33885  { 14727 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33886  { 14727 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33887  { 14727 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33888  { 14727 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33889  { 14727 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33890  { 14727 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33891  { 14727 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33892  { 14727 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33893  { 14727 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33894  { 14727 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33895  { 14727 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33896  { 14727 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33897  { 14727 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33898  { 14727 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33899  { 14727 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33900  { 14727 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33901  { 14727 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33902  { 14727 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33903  { 14727 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33904  { 14727 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33905  { 14727 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33906  { 14727 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33907  { 14727 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33908  { 14727 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33909  { 14727 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33910  { 14727 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33911  { 14727 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33912  { 14727 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33913  { 14727 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33914  { 14734 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33915  { 14734 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33916  { 14734 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33917  { 14734 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33918  { 14734 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33919  { 14734 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33920  { 14734 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33921  { 14734 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33922  { 14742 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33923  { 14742 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33924  { 14742 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33925  { 14742 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33926  { 14742 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33927  { 14742 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33928  { 14742 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33929  { 14742 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33930  { 14742 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33931  { 14742 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33932  { 14742 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33933  { 14742 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33934  { 14742 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33935  { 14742 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33936  { 14742 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33937  { 14742 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33938  { 14742 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33939  { 14742 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33940  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33941  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33942  { 14742 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33943  { 14742 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33944  { 14742 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33945  { 14742 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33946  { 14742 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33947  { 14742 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33948  { 14742 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33949  { 14742 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33950  { 14742 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33951  { 14742 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33952  { 14742 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33953  { 14742 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33954  { 14742 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33955  { 14742 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33956  { 14742 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33957  { 14742 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33958  { 14742 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33959  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33960  { 14742 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33961  { 14742 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33962  { 14742 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33963  { 14742 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33964  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33965  { 14742 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33966  { 14742 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33967  { 14742 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33968  { 14742 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33969  { 14742 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33970  { 14742 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33971  { 14742 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33972  { 14742 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33973  { 14749 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33974  { 14749 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33975  { 14749 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33976  { 14749 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33977  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33978  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33979  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33980  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33981  { 14749 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33982  { 14749 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33983  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33984  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33985  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33986  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33987  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33988  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33989  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33990  { 14749 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33991  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33992  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33993  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33994  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33995  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33996  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33997  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33998  { 14749 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33999  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34000  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34001  { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34002  { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34003  { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34004  { 14757 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34005  { 14757 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34006  { 14757 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34007  { 14757 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34008  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34009  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34010  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34011  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34012  { 14757 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34013  { 14757 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34014  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34015  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34016  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34017  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34018  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34019  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34020  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34021  { 14757 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34022  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34023  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34024  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34025  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34026  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34027  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34028  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34029  { 14757 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34030  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34031  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34032  { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34033  { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34034  { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34035  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34036  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34037  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34038  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34039  { 14765 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34040  { 14765 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34041  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34042  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34043  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34044  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34045  { 14765 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34046  { 14765 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34047  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34048  { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34049  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34050  { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34051  { 14765 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34052  { 14765 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34053  { 14773 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34054  { 14773 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34055  { 14773 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34056  { 14773 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34057  { 14773 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34058  { 14773 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34059  { 14773 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34060  { 14773 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34061  { 14773 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34062  { 14773 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34063  { 14773 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34064  { 14773 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34065  { 14773 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34066  { 14773 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34067  { 14773 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34068  { 14773 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34069  { 14773 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34070  { 14773 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34071  { 14773 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34072  { 14773 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34073  { 14773 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34074  { 14773 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34075  { 14773 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34076  { 14773 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34077  { 14773 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34078  { 14773 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34079  { 14773 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34080  { 14773 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34081  { 14773 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34082  { 14773 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34083  { 14773 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34084  { 14773 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34085  { 14773 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34086  { 14773 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34087  { 14773 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34088  { 14773 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34089  { 14773 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34090  { 14773 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34091  { 14773 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34092  { 14773 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34093  { 14773 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34094  { 14773 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34095  { 14780 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34096  { 14780 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34097  { 14780 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34098  { 14780 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34099  { 14780 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34100  { 14780 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34101  { 14780 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34102  { 14780 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34103  { 14780 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34104  { 14780 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34105  { 14780 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34106  { 14780 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34107  { 14780 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34108  { 14780 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34109  { 14780 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34110  { 14780 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34111  { 14780 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34112  { 14780 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34113  { 14780 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34114  { 14780 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34115  { 14780 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34116  { 14780 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34117  { 14787 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34118  { 14787 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34119  { 14787 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34120  { 14787 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34121  { 14787 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34122  { 14787 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34123  { 14787 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34124  { 14787 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34125  { 14787 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34126  { 14787 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34127  { 14787 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34128  { 14787 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34129  { 14787 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34130  { 14787 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34131  { 14787 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34132  { 14787 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34133  { 14787 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34134  { 14787 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34135  { 14787 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34136  { 14787 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34137  { 14787 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34138  { 14787 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34139  { 14787 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34140  { 14787 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34141  { 14787 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34142  { 14787 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34143  { 14787 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34144  { 14787 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34145  { 14787 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34146  { 14787 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34147  { 14787 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34148  { 14794 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34149  { 14794 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34150  { 14794 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34151  { 14794 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34152  { 14794 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34153  { 14794 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34154  { 14794 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34155  { 14794 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34156  { 14794 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34157  { 14794 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34158  { 14794 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34159  { 14794 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34160  { 14794 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34161  { 14794 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34162  { 14794 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34163  { 14794 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34164  { 14794 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34165  { 14794 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34166  { 14794 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34167  { 14794 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34168  { 14794 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34169  { 14794 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34170  { 14794 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34171  { 14794 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34172  { 14794 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34173  { 14794 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34174  { 14794 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34175  { 14794 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34176  { 14794 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34177  { 14794 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34178  { 14794 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34179  { 14801 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34180  { 14801 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34181  { 14801 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34182  { 14801 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34183  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34184  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34185  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34186  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34187  { 14801 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34188  { 14801 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34189  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34190  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34191  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34192  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34193  { 14801 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34194  { 14801 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34195  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34196  { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34197  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34198  { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34199  { 14801 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34200  { 14801 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34201  { 14809 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34202  { 14809 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34203  { 14809 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34204  { 14809 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34205  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34206  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34207  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34208  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34209  { 14809 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34210  { 14809 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34211  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34212  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34213  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34214  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34215  { 14809 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34216  { 14809 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34217  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34218  { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34219  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34220  { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34221  { 14809 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34222  { 14809 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34223  { 14817 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34224  { 14817 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34225  { 14817 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34226  { 14817 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34227  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34228  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34229  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34230  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34231  { 14817 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34232  { 14817 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34233  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34234  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34235  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34236  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34237  { 14817 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34238  { 14817 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34239  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34240  { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34241  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34242  { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34243  { 14817 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34244  { 14817 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34245  { 14826 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34246  { 14826 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34247  { 14826 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34248  { 14826 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34249  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34250  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34251  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34252  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34253  { 14826 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34254  { 14826 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34255  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34256  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34257  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34258  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34259  { 14826 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34260  { 14826 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34261  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34262  { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34263  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34264  { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34265  { 14826 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34266  { 14826 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34267  { 14835 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34268  { 14835 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34269  { 14835 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34270  { 14835 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34271  { 14835 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34272  { 14835 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34273  { 14835 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34274  { 14835 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34275  { 14835 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34276  { 14835 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34277  { 14835 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34278  { 14835 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34279  { 14835 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34280  { 14835 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34281  { 14835 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34282  { 14835 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34283  { 14835 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34284  { 14835 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34285  { 14835 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34286  { 14835 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34287  { 14835 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34288  { 14835 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34289  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34290  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34291  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34292  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34293  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34294  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34295  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34296  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34297  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34298  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34299  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34300  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34301  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34302  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34303  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34304  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34305  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34306  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34307  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34308  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34309  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34310  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34311  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34312  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34313  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34314  { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34315  { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34316  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34317  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34318  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34319  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34320  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34321  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34322  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34323  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34324  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34325  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34326  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34327  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34328  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34329  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34330  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34331  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34332  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34333  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34334  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34335  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34336  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34337  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34338  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34339  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34340  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34341  { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34342  { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34343  { 14864 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
34344  { 14864 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
34345  { 14864 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
34346  { 14864 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
34347  { 14871 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34348  { 14871 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34349  { 14871 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34350  { 14871 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34351  { 14871 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34352  { 14871 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34353  { 14871 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34354  { 14871 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34355  { 14871 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34356  { 14871 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34357  { 14871 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34358  { 14871 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34359  { 14880 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34360  { 14880 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34361  { 14880 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34362  { 14880 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34363  { 14880 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34364  { 14880 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34365  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34366  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34367  { 14880 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34368  { 14880 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34369  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34370  { 14880 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34371  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34372  { 14880 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34373  { 14880 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34374  { 14880 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34375  { 14880 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34376  { 14880 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34377  { 14889 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34378  { 14889 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34379  { 14889 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34380  { 14889 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34381  { 14889 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34382  { 14889 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34383  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34384  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34385  { 14889 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34386  { 14889 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34387  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34388  { 14889 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34389  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34390  { 14889 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34391  { 14889 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34392  { 14889 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34393  { 14889 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34394  { 14889 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34395  { 14898 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34396  { 14898 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34397  { 14898 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34398  { 14898 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34399  { 14898 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34400  { 14898 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34401  { 14898 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34402  { 14898 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34403  { 14898 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34404  { 14898 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34405  { 14898 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34406  { 14898 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34407  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34408  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34409  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34410  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34411  { 14907 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34412  { 14907 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34413  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34414  { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34415  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34416  { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34417  { 14907 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34418  { 14907 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34419  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34420  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34421  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34422  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34423  { 14917 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34424  { 14917 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34425  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34426  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34427  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34428  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34429  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34430  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34431  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34432  { 14917 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34433  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34434  { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34435  { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34436  { 14917 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34437  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34438  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34439  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34440  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34441  { 14927 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34442  { 14927 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34443  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34444  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34445  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34446  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34447  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34448  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34449  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34450  { 14927 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34451  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34452  { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34453  { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34454  { 14927 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34455  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34456  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34457  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34458  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34459  { 14937 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34460  { 14937 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34461  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34462  { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34463  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34464  { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34465  { 14937 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34466  { 14937 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34467  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34468  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34469  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34470  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34471  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34472  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34473  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34474  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34475  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34476  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34477  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34478  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34479  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34480  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34481  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34482  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34483  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34484  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34485  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34486  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34487  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34488  { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34489  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34490  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34491  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34492  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34493  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34494  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34495  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34496  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34497  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34498  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34499  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34500  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34501  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34502  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34503  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34504  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34505  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34506  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34507  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34508  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34509  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34510  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34511  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34512  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34513  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34514  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34515  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34516  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34517  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34518  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34519  { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34520  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34521  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34522  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34523  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34524  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34525  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34526  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34527  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34528  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34529  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34530  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34531  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34532  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34533  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34534  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34535  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34536  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34537  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34538  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34539  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34540  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34541  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34542  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34543  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34544  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34545  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34546  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34547  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34548  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34549  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34550  { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34551  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34552  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34553  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34554  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34555  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34556  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34557  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34558  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34559  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34560  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34561  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34562  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34563  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34564  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34565  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34566  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34567  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34568  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34569  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34570  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34571  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34572  { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34573  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34574  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34575  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34576  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34577  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34578  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34579  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34580  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34581  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34582  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34583  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34584  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34585  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34586  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34587  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34588  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34589  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34590  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34591  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34592  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34593  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34594  { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34595  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34596  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34597  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34598  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34599  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34600  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34601  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34602  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34603  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34604  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34605  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34606  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34607  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34608  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34609  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34610  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34611  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34612  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34613  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34614  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34615  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34616  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34617  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34618  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34619  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34620  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34621  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34622  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34623  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34624  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34625  { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34626  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34627  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34628  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34629  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34630  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34631  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34632  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34633  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34634  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34635  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34636  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34637  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34638  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34639  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34640  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34641  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34642  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34643  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34644  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34645  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34646  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34647  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34648  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34649  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34650  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34651  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34652  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34653  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34654  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34655  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34656  { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34657  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34658  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34659  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34660  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34661  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34662  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34663  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34664  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34665  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34666  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34667  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34668  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34669  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34670  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34671  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34672  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34673  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34674  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34675  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34676  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34677  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34678  { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34679  { 15037 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34680  { 15037 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34681  { 15037 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34682  { 15037 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34683  { 15043 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34684  { 15043 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34685  { 15043 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34686  { 15043 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34687  { 15043 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34688  { 15043 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34689  { 15043 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34690  { 15043 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34691  { 15043 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34692  { 15043 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34693  { 15043 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34694  { 15043 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34695  { 15043 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34696  { 15043 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34697  { 15043 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34698  { 15043 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34699  { 15043 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34700  { 15043 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34701  { 15043 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34702  { 15043 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34703  { 15043 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34704  { 15043 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34705  { 15043 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34706  { 15043 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34707  { 15043 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34708  { 15043 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34709  { 15043 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34710  { 15050 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34711  { 15050 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34712  { 15050 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34713  { 15050 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34714  { 15050 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34715  { 15050 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34716  { 15050 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34717  { 15050 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34718  { 15050 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34719  { 15050 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34720  { 15050 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34721  { 15050 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34722  { 15050 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34723  { 15050 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34724  { 15050 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34725  { 15050 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34726  { 15050 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34727  { 15050 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34728  { 15050 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34729  { 15050 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34730  { 15050 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34731  { 15050 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34732  { 15050 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34733  { 15050 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34734  { 15050 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34735  { 15050 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34736  { 15050 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34737  { 15057 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34738  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34739  { 15057 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34740  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34741  { 15057 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34742  { 15057 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34743  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34744  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34745  { 15057 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34746  { 15057 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34747  { 15057 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34748  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34749  { 15057 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34750  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34751  { 15057 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34752  { 15057 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34753  { 15057 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34754  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34755  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34756  { 15057 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34757  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34758  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34759  { 15057 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34760  { 15057 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34761  { 15057 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34762  { 15057 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34763  { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34764  { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34765  { 15057 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34766  { 15057 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34767  { 15066 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34768  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34769  { 15066 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34770  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34771  { 15066 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34772  { 15066 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34773  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34774  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34775  { 15066 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34776  { 15066 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34777  { 15066 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34778  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34779  { 15066 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34780  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34781  { 15066 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34782  { 15066 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34783  { 15066 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34784  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34785  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34786  { 15066 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34787  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34788  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34789  { 15066 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34790  { 15066 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34791  { 15066 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34792  { 15066 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34793  { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34794  { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34795  { 15066 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34796  { 15066 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34797  { 15075 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34798  { 15075 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34799  { 15075 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34800  { 15075 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34801  { 15075 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34802  { 15075 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34803  { 15075 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34804  { 15075 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34805  { 15075 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34806  { 15084 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34807  { 15084 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34808  { 15084 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34809  { 15084 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34810  { 15084 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34811  { 15084 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34812  { 15084 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34813  { 15084 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34814  { 15084 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34815  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
34816  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
34817  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
34818  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
34819  { 15093 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
34820  { 15093 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
34821  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34822  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34823  { 15093 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34824  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34825  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
34826  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34827  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
34828  { 15093 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34829  { 15093 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34830  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
34831  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
34832  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
34833  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
34834  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
34835  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
34836  { 15093 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34837  { 15093 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34838  { 15093 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34839  { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
34840  { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
34841  { 15093 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34842  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
34843  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
34844  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
34845  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
34846  { 15102 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
34847  { 15102 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
34848  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34849  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34850  { 15102 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34851  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34852  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
34853  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34854  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
34855  { 15102 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34856  { 15102 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34857  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
34858  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
34859  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
34860  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
34861  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
34862  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
34863  { 15102 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34864  { 15102 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34865  { 15102 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34866  { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
34867  { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
34868  { 15102 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34869  { 15111 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34870  { 15111 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
34871  { 15111 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34872  { 15111 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
34873  { 15111 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34874  { 15111 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
34875  { 15120 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34876  { 15120 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
34877  { 15120 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34878  { 15120 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
34879  { 15120 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34880  { 15120 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
34881  { 15129 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
34882  { 15129 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
34883  { 15129 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
34884  { 15129 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34885  { 15129 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34886  { 15129 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34887  { 15129 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34888  { 15129 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34889  { 15129 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
34890  { 15129 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34891  { 15129 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
34892  { 15129 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34893  { 15138 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
34894  { 15138 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
34895  { 15138 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
34896  { 15138 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34897  { 15138 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34898  { 15138 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34899  { 15138 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34900  { 15138 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34901  { 15138 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
34902  { 15138 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34903  { 15138 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
34904  { 15138 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34905  { 15147 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34906  { 15147 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
34907  { 15147 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34908  { 15147 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34909  { 15147 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
34910  { 15147 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34911  { 15147 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
34912  { 15147 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34913  { 15147 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34914  { 15156 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34915  { 15156 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
34916  { 15156 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34917  { 15156 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34918  { 15156 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
34919  { 15156 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34920  { 15156 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
34921  { 15156 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34922  { 15156 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
34923  { 15165 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
34924  { 15165 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
34925  { 15165 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
34926  { 15165 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
34927  { 15172 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34928  { 15172 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
34929  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34930  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34931  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34932  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34933  { 15179 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34934  { 15179 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34935  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34936  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34937  { 15179 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34938  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34939  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34940  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34941  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34942  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34943  { 15179 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34944  { 15179 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34945  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34946  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34947  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34948  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34949  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34950  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34951  { 15179 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34952  { 15179 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34953  { 15179 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34954  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34955  { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34956  { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34957  { 15179 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34958  { 15179 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34959  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34960  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34961  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34962  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34963  { 15189 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34964  { 15189 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34965  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34966  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34967  { 15189 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34968  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34969  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34970  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34971  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34972  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34973  { 15189 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34974  { 15189 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34975  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34976  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34977  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34978  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34979  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34980  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34981  { 15189 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34982  { 15189 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34983  { 15189 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34984  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34985  { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34986  { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34987  { 15189 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34988  { 15189 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34989  { 15199 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34990  { 15199 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34991  { 15199 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34992  { 15199 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34993  { 15199 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34994  { 15199 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34995  { 15199 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34996  { 15199 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34997  { 15199 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34998  { 15209 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34999  { 15209 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35000  { 15209 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35001  { 15209 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35002  { 15209 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35003  { 15209 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35004  { 15209 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35005  { 15209 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35006  { 15209 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35007  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35008  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35009  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35010  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35011  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35012  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35013  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35014  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35015  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35016  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35017  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35018  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35019  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35020  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35021  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35022  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35023  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35024  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35025  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35026  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35027  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35028  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35029  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35030  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35031  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35032  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35033  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35034  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35035  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35036  { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35037  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35038  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35039  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35040  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35041  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35042  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35043  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35044  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35045  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35046  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35047  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35048  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35049  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35050  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35051  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35052  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35053  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35054  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35055  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35056  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35057  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35058  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35059  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35060  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35061  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35062  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35063  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35064  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35065  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35066  { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35067  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35068  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35069  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35070  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35071  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35072  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35073  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35074  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35075  { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35076  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35077  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35078  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35079  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35080  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35081  { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35082  { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35083  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35084  { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35085  { 15267 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35086  { 15267 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35087  { 15267 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35088  { 15267 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35089  { 15276 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35090  { 15276 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35091  { 15276 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35092  { 15276 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35093  { 15285 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35094  { 15285 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35095  { 15294 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35096  { 15294 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35097  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35098  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35099  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35100  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35101  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35102  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35103  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35104  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35105  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35106  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35107  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35108  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35109  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35110  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35111  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35112  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35113  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35114  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35115  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35116  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35117  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35118  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35119  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35120  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35121  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35122  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35123  { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35124  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35125  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35126  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35127  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35128  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35129  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35130  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35131  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35132  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35133  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35134  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35135  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35136  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35137  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35138  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35139  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35140  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35141  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35142  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35143  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35144  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35145  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35146  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35147  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35148  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35149  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35150  { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35151  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35152  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35153  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35154  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35155  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35156  { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35157  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35158  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35159  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35160  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35161  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35162  { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35163  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35164  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35165  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35166  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35167  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35168  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35169  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35170  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35171  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35172  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35173  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35174  { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35175  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35176  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35177  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35178  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35179  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35180  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35181  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35182  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35183  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35184  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35185  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35186  { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35187  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35188  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35189  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35190  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35191  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35192  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35193  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35194  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35195  { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35196  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35197  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35198  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35199  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35200  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35201  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35202  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35203  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35204  { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35205  { 15391 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35206  { 15391 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35207  { 15391 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35208  { 15391 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35209  { 15400 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35210  { 15400 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35211  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35212  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35213  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35214  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35215  { 15409 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35216  { 15409 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35217  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35218  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35219  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35220  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35221  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35222  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35223  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35224  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35225  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35226  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35227  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35228  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35229  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35230  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35231  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35232  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35233  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35234  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35235  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35236  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35237  { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35238  { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35239  { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35240  { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35241  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35242  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35243  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35244  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35245  { 15419 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35246  { 15419 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35247  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35248  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35249  { 15419 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35250  { 15419 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35251  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35252  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35253  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35254  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35255  { 15419 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35256  { 15419 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35257  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35258  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35259  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35260  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35261  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35262  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35263  { 15419 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35264  { 15419 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35265  { 15419 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35266  { 15419 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35267  { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35268  { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35269  { 15419 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35270  { 15419 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35271  { 15429 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35272  { 15429 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35273  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35274  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35275  { 15429 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35276  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35277  { 15429 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35278  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35279  { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35280  { 15439 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35281  { 15439 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35282  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35283  { 15439 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35284  { 15439 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35285  { 15439 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35286  { 15439 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35287  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35288  { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35289  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35290  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35291  { 15449 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35292  { 15461 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35293  { 15461 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35294  { 15461 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35295  { 15473 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35296  { 15488 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35297  { 15503 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35298  { 15518 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35299  { 15533 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35300  { 15548 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35301  { 15563 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35302  { 15578 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35303  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35304  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35305  { 15593 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35306  { 15605 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35307  { 15605 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35308  { 15605 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35309  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35310  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35311  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35312  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35313  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35314  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35315  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35316  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35317  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35318  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35319  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35320  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35321  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35322  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35323  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35324  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35325  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35326  { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35327  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35328  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35329  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35330  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35331  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35332  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35333  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35334  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35335  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35336  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35337  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35338  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35339  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35340  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35341  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35342  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35343  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35344  { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35345  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35346  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35347  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35348  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35349  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35350  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35351  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35352  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35353  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35354  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35355  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35356  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35357  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35358  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35359  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35360  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35361  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35362  { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35363  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35364  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35365  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35366  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35367  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35368  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35369  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35370  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35371  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35372  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35373  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35374  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35375  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35376  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35377  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35378  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35379  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35380  { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35381  { 15661 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35382  { 15661 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35383  { 15661 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35384  { 15661 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35385  { 15661 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35386  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35387  { 15661 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35388  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35389  { 15661 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35390  { 15661 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35391  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35392  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35393  { 15661 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35394  { 15661 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35395  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35396  { 15661 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35397  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35398  { 15661 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35399  { 15661 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35400  { 15661 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35401  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35402  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35403  { 15661 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35404  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35405  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35406  { 15661 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35407  { 15661 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35408  { 15661 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35409  { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35410  { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35411  { 15661 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35412  { 15669 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35413  { 15669 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35414  { 15669 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35415  { 15669 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35416  { 15669 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35417  { 15669 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35418  { 15669 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35419  { 15669 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35420  { 15669 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35421  { 15669 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35422  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35423  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35424  { 15669 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35425  { 15669 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35426  { 15669 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35427  { 15669 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35428  { 15669 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35429  { 15669 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35430  { 15669 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35431  { 15669 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35432  { 15669 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35433  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35434  { 15669 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35435  { 15669 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35436  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35437  { 15669 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35438  { 15669 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35439  { 15669 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35440  { 15669 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35441  { 15669 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35442  { 15669 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35443  { 15677 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35444  { 15677 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35445  { 15677 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35446  { 15677 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35447  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35448  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35449  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35450  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35451  { 15677 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35452  { 15677 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35453  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35454  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35455  { 15677 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35456  { 15677 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35457  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35458  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35459  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35460  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35461  { 15677 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35462  { 15677 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35463  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35464  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35465  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35466  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35467  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35468  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35469  { 15677 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35470  { 15677 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35471  { 15677 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35472  { 15677 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35473  { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35474  { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35475  { 15677 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35476  { 15677 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35477  { 15685 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35478  { 15685 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35479  { 15685 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35480  { 15685 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35481  { 15685 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35482  { 15685 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35483  { 15685 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35484  { 15685 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35485  { 15685 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35486  { 15685 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35487  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35488  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35489  { 15685 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35490  { 15685 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35491  { 15685 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35492  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35493  { 15685 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35494  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35495  { 15685 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35496  { 15685 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35497  { 15685 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35498  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35499  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35500  { 15685 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35501  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35502  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35503  { 15685 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35504  { 15685 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35505  { 15685 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35506  { 15685 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35507  { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35508  { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35509  { 15685 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35510  { 15685 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35511  { 15693 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35512  { 15693 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35513  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35514  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35515  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35516  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35517  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35518  { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35519  { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35520  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35521  { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35522  { 15701 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35523  { 15701 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35524  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35525  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35526  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35527  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35528  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35529  { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35530  { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35531  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35532  { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35533  { 15709 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
35534  { 15718 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35535  { 15718 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35536  { 15718 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35537  { 15718 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35538  { 15718 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35539  { 15718 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35540  { 15718 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35541  { 15718 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35542  { 15718 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35543  { 15718 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35544  { 15718 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35545  { 15718 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35546  { 15718 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35547  { 15718 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35548  { 15718 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35549  { 15718 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35550  { 15718 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35551  { 15718 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35552  { 15718 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35553  { 15718 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35554  { 15718 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35555  { 15718 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35556  { 15718 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35557  { 15718 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35558  { 15718 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35559  { 15718 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35560  { 15718 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35561  { 15718 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35562  { 15718 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35563  { 15718 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35564  { 15718 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35565  { 15718 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35566  { 15718 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35567  { 15718 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35568  { 15725 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35569  { 15725 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35570  { 15725 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35571  { 15725 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35572  { 15725 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35573  { 15725 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35574  { 15725 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35575  { 15725 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35576  { 15725 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35577  { 15725 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35578  { 15725 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35579  { 15725 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35580  { 15725 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35581  { 15725 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35582  { 15725 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35583  { 15725 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35584  { 15725 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35585  { 15725 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35586  { 15725 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35587  { 15725 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35588  { 15725 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35589  { 15725 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35590  { 15725 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35591  { 15725 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35592  { 15725 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35593  { 15725 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35594  { 15725 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35595  { 15725 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35596  { 15725 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35597  { 15725 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35598  { 15725 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35599  { 15725 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35600  { 15725 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35601  { 15725 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35602  { 15732 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35603  { 15732 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35604  { 15732 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35605  { 15732 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35606  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35607  { 15732 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35608  { 15732 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35609  { 15732 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35610  { 15732 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35611  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35612  { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35613  { 15739 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35614  { 15739 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35615  { 15739 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35616  { 15739 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35617  { 15739 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35618  { 15739 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35619  { 15739 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35620  { 15739 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35621  { 15739 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35622  { 15739 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35623  { 15739 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35624  { 15746 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35625  { 15746 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35626  { 15746 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35627  { 15746 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35628  { 15754 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35629  { 15754 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35630  { 15754 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35631  { 15754 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35632  { 15762 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35633  { 15762 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
35634  { 15762 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35635  { 15762 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
35636  { 15762 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35637  { 15771 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35638  { 15771 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
35639  { 15771 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35640  { 15771 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
35641  { 15771 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35642  { 15780 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35643  { 15780 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35644  { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35645  { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35646  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35647  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35648  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35649  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35650  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35651  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35652  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35653  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35654  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35655  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35656  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35657  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35658  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35659  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35660  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35661  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35662  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35663  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35664  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35665  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35666  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35667  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35668  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35669  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35670  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35671  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35672  { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35673  { 15790 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35674  { 15790 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35675  { 15790 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35676  { 15790 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35677  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35678  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35679  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35680  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35681  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35682  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35683  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35684  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35685  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35686  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35687  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35688  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35689  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35690  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35691  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35692  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35693  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35694  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35695  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35696  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35697  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35698  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35699  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35700  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35701  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35702  { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35703  { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35704  { 15800 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35705  { 15800 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35706  { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35707  { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35708  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35709  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35710  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35711  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35712  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35713  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35714  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35715  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35716  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35717  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35718  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35719  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35720  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35721  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35722  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35723  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35724  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35725  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35726  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35727  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35728  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35729  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35730  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35731  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35732  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35733  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35734  { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35735  { 15810 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35736  { 15810 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35737  { 15810 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35738  { 15810 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35739  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35740  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35741  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35742  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35743  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35744  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35745  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35746  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35747  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35748  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35749  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35750  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35751  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35752  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35753  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35754  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35755  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35756  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35757  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35758  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35759  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35760  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35761  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35762  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35763  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35764  { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35765  { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35766  { 15820 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35767  { 15820 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35768  { 15820 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35769  { 15820 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35770  { 15820 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35771  { 15820 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35772  { 15820 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35773  { 15820 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35774  { 15820 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35775  { 15820 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35776  { 15820 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35777  { 15820 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35778  { 15820 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35779  { 15820 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35780  { 15820 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35781  { 15820 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35782  { 15820 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35783  { 15820 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35784  { 15820 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35785  { 15820 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35786  { 15820 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35787  { 15820 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35788  { 15820 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35789  { 15820 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35790  { 15820 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35791  { 15820 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35792  { 15820 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35793  { 15820 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35794  { 15820 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35795  { 15820 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35796  { 15820 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35797  { 15827 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35798  { 15827 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35799  { 15827 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35800  { 15827 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35801  { 15827 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35802  { 15827 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35803  { 15827 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35804  { 15827 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35805  { 15827 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35806  { 15827 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35807  { 15827 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35808  { 15827 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35809  { 15827 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35810  { 15827 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35811  { 15827 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35812  { 15827 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35813  { 15827 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35814  { 15827 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35815  { 15827 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35816  { 15827 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35817  { 15827 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35818  { 15827 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35819  { 15827 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35820  { 15827 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35821  { 15827 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35822  { 15827 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35823  { 15827 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35824  { 15827 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35825  { 15827 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35826  { 15827 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35827  { 15827 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35828  { 15834 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, {  }, },
35829  { 15843 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, {  }, },
35830  { 15854 /* wait */, X86::WAIT, Convert_NoOperands, 0, {  }, },
35831  { 15859 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, {  }, },
35832  { 15866 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, 0, {  }, },
35833  { 15875 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
35834  { 15875 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
35835  { 15904 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
35836  { 15904 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
35837  { 15933 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, {  }, },
35838  { 15939 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, {  }, },
35839  { 15946 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35840  { 15952 /* wrssq */, X86::WRSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35841  { 15958 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35842  { 15965 /* wrussq */, X86::WRUSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35843  { 15972 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
35844  { 15979 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, {  }, },
35845  { 15988 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR16, MCK_GR16 }, },
35846  { 15988 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR32, MCK_GR32 }, },
35847  { 15988 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR64, MCK_GR64 }, },
35848  { 15988 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR8, MCK_GR8 }, },
35849  { 15988 /* xadd */, X86::XADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
35850  { 15988 /* xadd */, X86::XADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
35851  { 15988 /* xadd */, X86::XADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
35852  { 15988 /* xadd */, X86::XADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
35853  { 16017 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
35854  { 16017 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
35855  { 16024 /* xchg */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_AX, MCK_GR16 }, },
35856  { 16024 /* xchg */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, Feature_In64BitMode, { MCK_EAX, MCK_EAX }, },
35857  { 16024 /* xchg */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_EAX, MCK_GR32 }, },
35858  { 16024 /* xchg */, X86::NOOP, Convert_NoOperands, 0, { MCK_RAX, MCK_RAX }, },
35859  { 16024 /* xchg */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_RAX, MCK_GR64 }, },
35860  { 16024 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_AX }, },
35861  { 16024 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR16, MCK_GR16 }, },
35862  { 16024 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
35863  { 16024 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_EAX }, },
35864  { 16024 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR32, MCK_GR32 }, },
35865  { 16024 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
35866  { 16024 /* xchg */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_RAX }, },
35867  { 16024 /* xchg */, X86::XCHG64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR64, MCK_GR64 }, },
35868  { 16024 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
35869  { 16024 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR8, MCK_GR8 }, },
35870  { 16024 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
35871  { 16024 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
35872  { 16024 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
35873  { 16024 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
35874  { 16024 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
35875  { 16053 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, {  }, },
35876  { 16063 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, {  }, },
35877  { 16073 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, {  }, },
35878  { 16083 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, {  }, },
35879  { 16093 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, {  }, },
35880  { 16103 /* xend */, X86::XEND, Convert_NoOperands, 0, {  }, },
35881  { 16108 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, {  }, },
35882  { 16115 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, {  }, },
35883  { 16121 /* xor */, X86::XOR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
35884  { 16121 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
35885  { 16121 /* xor */, X86::XOR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
35886  { 16121 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
35887  { 16121 /* xor */, X86::XOR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
35888  { 16121 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
35889  { 16121 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
35890  { 16121 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
35891  { 16121 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
35892  { 16121 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
35893  { 16121 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
35894  { 16121 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
35895  { 16121 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
35896  { 16121 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
35897  { 16121 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
35898  { 16121 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
35899  { 16121 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
35900  { 16121 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
35901  { 16121 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
35902  { 16121 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
35903  { 16121 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
35904  { 16121 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
35905  { 16121 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
35906  { 16121 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
35907  { 16121 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
35908  { 16121 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35909  { 16121 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
35910  { 16121 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
35911  { 16121 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35912  { 16121 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
35913  { 16121 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
35914  { 16121 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
35915  { 16121 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
35916  { 16135 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35917  { 16135 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35918  { 16141 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35919  { 16141 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35920  { 16157 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, {  }, },
35921  { 16166 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
35922  { 16173 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35923  { 16182 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
35924  { 16190 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35925  { 16200 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
35926  { 16206 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35927  { 16214 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
35928  { 16221 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35929  { 16230 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
35930  { 16239 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35931  { 16250 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
35932  { 16257 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
35933  { 16266 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, {  }, },
35934  { 16273 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, {  }, },
35935  { 16279 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, {  }, },
35936  { 16287 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
35937  { 16294 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
35938  { 16304 /* xtest */, X86::XTEST, Convert_NoOperands, 0, {  }, },
35939};
35940
35941#include "llvm/Support/Debug.h"
35942#include "llvm/Support/Format.h"
35943
35944unsigned X86AsmParser::
35945MatchInstructionImpl(const OperandVector &Operands,
35946                     MCInst &Inst,
35947                     uint64_t &ErrorInfo,
35948                     bool matchingInlineAsm, unsigned VariantID) {
35949  // Eliminate obvious mismatches.
35950  if (Operands.size() > 10) {
35951    ErrorInfo = 10;
35952    return Match_InvalidOperand;
35953  }
35954
35955  // Get the current feature set.
35956  uint64_t AvailableFeatures = getAvailableFeatures();
35957
35958  // Get the instruction mnemonic, which is the first token.
35959  StringRef Mnemonic = ((X86Operand&)*Operands[0]).getToken();
35960
35961  // Process all MnemonicAliases to remap the mnemonic.
35962  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
35963
35964  // Some state to try to produce better error messages.
35965  bool HadMatchOtherThanFeatures = false;
35966  bool HadMatchOtherThanPredicate = false;
35967  unsigned RetCode = Match_InvalidOperand;
35968  uint64_t MissingFeatures = ~0ULL;
35969  // Set ErrorInfo to the operand that mismatches if it is
35970  // wrong for all instances of the instruction.
35971  ErrorInfo = ~0ULL;
35972  // Find the appropriate table for this asm variant.
35973  const MatchEntry *Start, *End;
35974  switch (VariantID) {
35975  default: llvm_unreachable("invalid variant!");
35976  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
35977  case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
35978  }
35979  // Search the table.
35980  auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
35981
35982  DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
35983  std::distance(MnemonicRange.first, MnemonicRange.second) <<
35984  " encodings with mnemonic '" << Mnemonic << "'\n");
35985
35986  // Return a more specific error code if no mnemonics match.
35987  if (MnemonicRange.first == MnemonicRange.second)
35988    return Match_MnemonicFail;
35989
35990  for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
35991       it != ie; ++it) {
35992    bool HasRequiredFeatures =
35993      (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
35994    DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
35995                                          << MII.getName(it->Opcode) << "\n");
35996    // equal_range guarantees that instruction mnemonic matches.
35997    assert(Mnemonic == it->getMnemonic());
35998    bool OperandsValid = true;
35999    for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 9; ++FormalIdx) {
36000      auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
36001      DEBUG_WITH_TYPE("asm-matcher",
36002                      dbgs() << "  Matching formal operand class " << getMatchClassName(Formal)
36003                             << " against actual operand at index " << ActualIdx);
36004      if (ActualIdx < Operands.size())
36005        DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
36006                        Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
36007      else
36008        DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
36009      if (ActualIdx >= Operands.size()) {
36010        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
36011        OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
36012        if (!OperandsValid) ErrorInfo = ActualIdx;
36013        break;
36014      }
36015      MCParsedAsmOperand &Actual = *Operands[ActualIdx];
36016      unsigned Diag = validateOperandClass(Actual, Formal);
36017      if (Diag == Match_Success) {
36018        DEBUG_WITH_TYPE("asm-matcher",
36019                        dbgs() << "match success using generic matcher\n");
36020        ++ActualIdx;
36021        continue;
36022      }
36023      // If the generic handler indicates an invalid operand
36024      // failure, check for a special case.
36025      if (Diag != Match_Success) {
36026        unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
36027        if (TargetDiag == Match_Success) {
36028          DEBUG_WITH_TYPE("asm-matcher",
36029                          dbgs() << "match success using target matcher\n");
36030          ++ActualIdx;
36031          continue;
36032        }
36033        // If the target matcher returned a specific error code use
36034        // that, else use the one from the generic matcher.
36035        if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
36036          Diag = TargetDiag;
36037      }
36038      // If current formal operand wasn't matched and it is optional
36039      // then try to match next formal operand
36040      if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
36041        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
36042        continue;
36043      }
36044      // If this operand is broken for all of the instances of this
36045      // mnemonic, keep track of it so we can report loc info.
36046      // If we already had a match that only failed due to a
36047      // target predicate, that diagnostic is preferred.
36048      if (!HadMatchOtherThanPredicate &&
36049          (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
36050        if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
36051          RetCode = Diag;
36052        ErrorInfo = ActualIdx;
36053      }
36054      // Otherwise, just reject this instance of the mnemonic.
36055      OperandsValid = false;
36056      break;
36057    }
36058
36059    if (!OperandsValid) {
36060      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
36061                                               "operand mismatches, ignoring "
36062                                               "this opcode\n");
36063      continue;
36064    }
36065    if (!HasRequiredFeatures) {
36066      HadMatchOtherThanFeatures = true;
36067      uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
36068      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "
36069                                            << format_hex(NewMissingFeatures, 18)
36070                                            << "\n");
36071      if (countPopulation(NewMissingFeatures) <=
36072          countPopulation(MissingFeatures))
36073        MissingFeatures = NewMissingFeatures;
36074      continue;
36075    }
36076
36077    Inst.clear();
36078
36079    Inst.setOpcode(it->Opcode);
36080    // We have a potential match but have not rendered the operands.
36081    // Check the target predicate to handle any context sensitive
36082    // constraints.
36083    // For example, Ties that are referenced multiple times must be
36084    // checked here to ensure the input is the same for each match
36085    // constraints. If we leave it any later the ties will have been
36086    // canonicalized
36087    unsigned MatchResult;
36088    if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
36089      Inst.clear();
36090      DEBUG_WITH_TYPE(
36091          "asm-matcher",
36092          dbgs() << "Early target match predicate failed with diag code "
36093                 << MatchResult << "\n");
36094      RetCode = MatchResult;
36095      HadMatchOtherThanPredicate = true;
36096      continue;
36097    }
36098
36099    if (matchingInlineAsm) {
36100      convertToMapAndConstraints(it->ConvertFn, Operands);
36101      if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
36102        return Match_InvalidTiedOperand;
36103
36104      return Match_Success;
36105    }
36106
36107    // We have selected a definite instruction, convert the parsed
36108    // operands into the appropriate MCInst.
36109    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
36110
36111    // We have a potential match. Check the target predicate to
36112    // handle any context sensitive constraints.
36113    if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
36114      DEBUG_WITH_TYPE("asm-matcher",
36115                      dbgs() << "Target match predicate failed with diag code "
36116                             << MatchResult << "\n");
36117      Inst.clear();
36118      RetCode = MatchResult;
36119      HadMatchOtherThanPredicate = true;
36120      continue;
36121    }
36122
36123    if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
36124      return Match_InvalidTiedOperand;
36125
36126    DEBUG_WITH_TYPE(
36127        "asm-matcher",
36128        dbgs() << "Opcode result: complete match, selecting this opcode\n");
36129    return Match_Success;
36130  }
36131
36132  // Okay, we had no match.  Try to return a useful error code.
36133  if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
36134    return RetCode;
36135
36136  // Missing feature matches return which features were missing
36137  ErrorInfo = MissingFeatures;
36138  return Match_MissingFeature;
36139}
36140
36141#endif // GET_MATCHER_IMPLEMENTATION
36142
36143
36144#ifdef GET_MNEMONIC_SPELL_CHECKER
36145#undef GET_MNEMONIC_SPELL_CHECKER
36146
36147static std::string X86MnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
36148  const unsigned MaxEditDist = 2;
36149  std::vector<StringRef> Candidates;
36150  StringRef Prev = "";
36151
36152  // Find the appropriate table for this asm variant.
36153  const MatchEntry *Start, *End;
36154  switch (VariantID) {
36155  default: llvm_unreachable("invalid variant!");
36156  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
36157  case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
36158  }
36159
36160  for (auto I = Start; I < End; I++) {
36161    // Ignore unsupported instructions.
36162    if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
36163      continue;
36164
36165    StringRef T = I->getMnemonic();
36166    // Avoid recomputing the edit distance for the same string.
36167    if (T.equals(Prev))
36168      continue;
36169
36170    Prev = T;
36171    unsigned Dist = S.edit_distance(T, false, MaxEditDist);
36172    if (Dist <= MaxEditDist)
36173      Candidates.push_back(T);
36174  }
36175
36176  if (Candidates.empty())
36177    return "";
36178
36179  std::string Res = ", did you mean: ";
36180  unsigned i = 0;
36181  for( ; i < Candidates.size() - 1; i++)
36182    Res += Candidates[i].str() + ", ";
36183  return Res + Candidates[i].str() + "?";
36184}
36185
36186#endif // GET_MNEMONIC_SPELL_CHECKER
36187
36188