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Searched refs:dispatch_mode (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_vec4_gs_visitor.cpp133 prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2; in setup_payload()
856 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_gs()
881 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in brw_compile_gs()
944 prog_data->base.dispatch_mode = DISPATCH_MODE_4X1_SINGLE; in brw_compile_gs()
946 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_INSTANCE; in brw_compile_gs()
Dbrw_vec4.cpp2097 enum shader_dispatch_mode dispatch_mode) in stage_uses_interleaved_attributes() argument
2103 return dispatch_mode != DISPATCH_MODE_4X2_DUAL_OBJECT; in stage_uses_interleaved_attributes()
2117 enum shader_dispatch_mode dispatch_mode, in get_lowered_simd_width() argument
2159 stage_uses_interleaved_attributes(stage, dispatch_mode)) in get_lowered_simd_width()
2213 get_lowered_simd_width(devinfo, prog_data->dispatch_mode, stage, inst); in lower_simd_width()
2271 prog_data->dispatch_mode); in lower_simd_width()
2369 (stage_uses_interleaved_attributes(stage, prog_data->dispatch_mode) && in is_supported_64bit_region()
2887 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_vs()
2918 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in brw_compile_vs()
Dtest_vec4_copy_propagation.cpp53 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in copy_propagation_vec4_visitor()
Dtest_vec4_register_coalesce.cpp56 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in register_coalesce_vec4_visitor()
Dbrw_vec4_copy_propagation.cpp478 prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2; in opt_copy_propagation()
Dbrw_vec4_tcs.cpp475 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_tcs()
Dbrw_compiler.h955 enum shader_dispatch_mode dispatch_mode; member
Dbrw_shader.cpp1252 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_tes()
Dtest_vec4_cmod_propagation.cpp55 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in cmod_propagation_vec4_visitor()
/external/mesa3d/src/intel/vulkan/
DgenX_pipeline.c1134 vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8;
1255 tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8 ?
1289 gs.DispatchMode = gs_prog_data->base.dispatch_mode;
/external/mesa3d/src/mesa/drivers/dri/i965/
DgenX_state_upload.c2065 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
2066 vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
2132 vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
2612 gs.DispatchMode = vue_prog_data->dispatch_mode;
3990 if (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8)
/external/mesa3d/src/intel/blorp/
Dblorp_genX_exec.h593 vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8; in blorp_emit_vs_config()