/external/libdrm/intel/tests/ |
D | gen7-3d.batch-ref.txt | 3 0x12300008: 0x00000000: dword 1 4 0x1230000c: 0x00000000: dword 2 5 0x12300010: 0x00000000: dword 3 7 0x12300018: 0x00000001: dword 1 9 0x12300020: 0x00000000: dword 1 54 0x123000d4: 0x00000000: dword 1 63 0x123000f8: 0x00000000: dword 1 64 0x123000fc: 0x00000000: dword 2 65 0x12300100: 0x00000000: dword 3 66 0x12300104: 0x00000000: dword 4 [all …]
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D | gen6-3d.batch-ref.txt | 11 0x12300028: 0x00000000: dword 1 12 0x1230002c: 0x00000000: dword 2 14 0x12300034: 0x00000001: dword 1 16 0x1230003c: 0x00000000: dword 1 17 0x12300040: 0x00000000: dword 2 18 0x12300044: 0xffffffff: dword 3 20 0x1230004c: 0x20000000: dword 1 21 0x12300050: 0x00000000: dword 2 22 0x12300054: 0xffffffff: dword 3 24 0x1230005c: 0x40000000: dword 1 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
D | intel-syntax-avx512.s | 274 vmovss dword ptr [rcx] {k2}, xmm13 278 vmovss dword ptr [rax+r14*8+0x1234],xmm13 282 vmovss dword ptr [rdx+0x1fc],xmm13 286 vmovss dword ptr [rdx+0x200],xmm13 290 vmovss dword ptr [rdx-0x200],xmm13 294 vmovss dword ptr [rdx-0x204],xmm13 298 vmovss dword ptr [rdx+0x1fc],xmm5 302 vmovss dword ptr [rdx+0x200],xmm5 306 vmovss dword ptr [rdx-0x200], xmm5 310 vmovss dword ptr [rdx-0x204],xmm5 [all …]
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D | intel-syntax.s | 686 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA" 687 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL 693 inc dword ptr [rax] 703 dec dword ptr [rax] 712 add dword ptr [rax], 1 723 fstp dword ptr [rax] 740 fxsave dword ptr [eax] 741 fsave dword ptr [eax] 742 fxrstor dword ptr [eax] 743 frstor dword ptr [eax] [all …]
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/external/llvm/test/MC/X86/ |
D | intel-syntax-avx512.s | 270 vmovss dword ptr [rcx] {k2}, xmm13 274 vmovss dword ptr [rax+r14*8+0x1234],xmm13 278 vmovss dword ptr [rdx+0x1fc],xmm13 282 vmovss dword ptr [rdx+0x200],xmm13 286 vmovss dword ptr [rdx-0x200],xmm13 290 vmovss dword ptr [rdx-0x204],xmm13 294 vmovss dword ptr [rdx+0x1fc],xmm5 298 vmovss dword ptr [rdx+0x200],xmm5 302 vmovss dword ptr [rdx-0x200], xmm5 306 vmovss dword ptr [rdx-0x204],xmm5 [all …]
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D | intel-syntax.s | 624 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA" 625 fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL 630 inc dword ptr [rax] 639 dec dword ptr [rax] 648 add dword ptr [rax], 1 659 fstp dword ptr [rax] 676 fxsave dword ptr [eax] 677 fsave dword ptr [eax] 678 fxrstor dword ptr [eax] 679 frstor dword ptr [eax] [all …]
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | i915_debug_fp.c | 207 print_src_reg(GLuint dword) in print_src_reg() argument 209 GLuint nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK; in print_src_reg() 210 GLuint type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK; in print_src_reg() 212 print_reg_neg_swizzle(dword); in print_src_reg() 217 print_dest_reg(GLuint dword) in print_dest_reg() argument 219 GLuint nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK; in print_dest_reg() 220 GLuint type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK; in print_dest_reg() 222 if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL) in print_dest_reg() 225 if (dword & A0_DEST_CHANNEL_X) in print_dest_reg() 227 if (dword & A0_DEST_CHANNEL_Y) in print_dest_reg() [all …]
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/external/u-boot/drivers/net/ |
D | smc91111.h | 46 typedef unsigned long int dword; typedef 71 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1)))) 80 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) 91 #define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d) 94 #define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d) 106 dword *__b2; \ 107 __b2 = (dword *) b; \ 122 dword *__b2; \ 123 __b2 = (dword *) b; \ 153 ({ dword _x = (_x_); \ [all …]
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/external/mesa3d/src/gallium/drivers/i915/ |
D | i915_debug_fp.c | 222 print_src_reg(struct debug_stream *stream, unsigned dword) in print_src_reg() argument 224 unsigned nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK; in print_src_reg() 225 unsigned type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK; in print_src_reg() 227 print_reg_neg_swizzle(stream, dword); in print_src_reg() 232 print_dest_reg(struct debug_stream *stream, unsigned dword) in print_dest_reg() argument 234 unsigned nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK; in print_dest_reg() 235 unsigned type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK; in print_dest_reg() 237 if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL) in print_dest_reg() 240 if (dword & A0_DEST_CHANNEL_X) in print_dest_reg() 242 if (dword & A0_DEST_CHANNEL_Y) in print_dest_reg() [all …]
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D | i915_batchbuffer.h | 51 unsigned dword) in i915_winsys_batchbuffer_dword_unchecked() argument 53 *(unsigned *)batch->ptr = dword; in i915_winsys_batchbuffer_dword_unchecked() 69 unsigned dword) in i915_winsys_batchbuffer_dword() argument 72 i915_winsys_batchbuffer_dword_unchecked(batch, dword); in i915_winsys_batchbuffer_dword()
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/external/zlib/src/contrib/masmx86/ |
D | match686.asm | 42 cur_match equ dword ptr[esp+NbStack-0] 43 str_s equ dword ptr[esp+NbStack-4] 44 ; 5 dword on top (ret,ebp,esi,edi,ebx) 45 adrret equ dword ptr[esp+NbStack-8] 46 pushebp equ dword ptr[esp+NbStack-12] 47 pushedi equ dword ptr[esp+NbStack-16] 48 pushesi equ dword ptr[esp+NbStack-20] 49 pushebx equ dword ptr[esp+NbStack-24] 51 chain_length equ dword ptr [esp+NbStack-28] 52 limit equ dword ptr [esp+NbStack-32] [all …]
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/external/swiftshader/src/Pipeline/ |
D | Constants.hpp | 89 dword maxX[16]; 90 dword maxY[16]; 91 dword maxZ[16]; 92 dword minX[16]; 93 dword minY[16]; 94 dword minZ[16]; 95 dword fini[16];
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/external/swiftshader/src/Shader/ |
D | Constants.hpp | 89 dword maxX[16]; 90 dword maxY[16]; 91 dword maxZ[16]; 92 dword minX[16]; 93 dword minY[16]; 94 dword minZ[16]; 95 dword fini[16];
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/external/libdrm/intel/ |
D | intel_decode.c | 1786 int width, height, pitch, dword; in decode_3d_1d() local 1789 dword = data[i]; in decode_3d_1d() 1792 dword & (1 << 31) ? in decode_3d_1d() 1794 dword & (1 << 1) ? in decode_3d_1d() 1796 dword & (1 << 0) ? in decode_3d_1d() 1799 dword = data[i]; in decode_3d_1d() 1800 width = ((dword >> 10) & ((1 << 11) - 1)) + 1; in decode_3d_1d() 1801 height = ((dword >> 21) & ((1 << 11) - 1)) + 1; in decode_3d_1d() 1804 if (dword & (1 << 2)) in decode_3d_1d() 1806 else if (dword & (1 << 1)) in decode_3d_1d() [all …]
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/external/u-boot/arch/x86/cpu/broadwell/ |
D | me.c | 14 u32 dword; in me_read_dword_ptr() local 16 dm_pci_read_config32(dev, offset, &dword); in me_read_dword_ptr() 17 memcpy(ptr, &dword, sizeof(dword)); in me_read_dword_ptr()
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/external/u-boot/arch/x86/include/asm/ |
D | me_common.h | 358 u32 dword; in pci_read_dword_ptr() local 360 dm_pci_read_config32(me_dev, offset, &dword); in pci_read_dword_ptr() 361 memcpy(ptr, &dword, sizeof(dword)); in pci_read_dword_ptr() 367 u32 dword = 0; in pci_write_dword_ptr() local 369 memcpy(&dword, ptr, sizeof(dword)); in pci_write_dword_ptr() 370 dm_pci_write_config32(me_dev, offset, dword); in pci_write_dword_ptr()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/cconv/ |
D | return.ll | 21 @dword = global i64 zeroinitializer 55 %0 = load volatile i64, i64* @dword 61 ; O32-DAG: lw $2, %lo(dword)([[R1:\$[0-9]+]]) 62 ; O32-DAG: addiu [[R2:\$[0-9]+]], [[R1]], %lo(dword) 64 ; N32-DAG: ld $2, %lo(dword)([[R1:\$[0-9]+]]) 65 ; N64-DAG: lui [[R1:\$[0-9]+]], %highest(dword) 66 ; N64-DAG: ld $2, %lo(dword)([[R1]])
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | llvm.SI.load.dword.ll | 22 …%tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<4 x i32> %tmp10, i32 0, i32 0, i32 0, i32 0,… 24 …%tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<4 x i32> %tmp10, i32 %tmp11, i32 0, i32 0, i… 26 …%tmp16 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<4 x i32> %tmp10, i32 %tmp11, i32 0, i32 0, i… 28 …%tmp18 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<4 x i32> %tmp10, <2 x i32> zeroinitializer… 31 …%tmp20 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<4 x i32> %tmp10, <2 x i32> zeroinitializer… 34 …%tmp22 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<4 x i32> %tmp10, <2 x i32> zeroinitializer… 43 declare i32 @llvm.SI.buffer.load.dword.i32.i32(<4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #0 46 declare i32 @llvm.SI.buffer.load.dword.i32.v2i32(<4 x i32>, <2 x i32>, i32, i32, i32, i32, i32, i32…
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/external/llvm/test/CodeGen/AMDGPU/ |
D | llvm.SI.load.dword.ll | 22 …%tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0,… 24 …%tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i… 26 …%tmp16 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i… 28 …%tmp18 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer… 31 …%tmp20 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer… 34 …%tmp22 = call i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8> %tmp10, <2 x i32> zeroinitializer… 43 declare i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #0 46 declare i32 @llvm.SI.buffer.load.dword.i32.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32…
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/external/libmpeg2/common/ |
D | impeg2_macros.h | 41 #define MSW(dword) (dword >> 16) argument 42 #define LSW(dword) (dword & 0xFFFF) argument
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/external/libvpx/libvpx/vpx_dsp/x86/ |
D | sad_sse4.asm | 188 movsxd rax, dword ptr arg(1) ;src_stride 189 movsxd rdx, dword ptr arg(3) ;ref_stride 229 movsxd rax, dword ptr arg(1) ;src_stride 230 movsxd rdx, dword ptr arg(3) ;ref_stride 266 movsxd rax, dword ptr arg(1) ;src_stride 267 movsxd rdx, dword ptr arg(3) ;ref_stride 303 movsxd rax, dword ptr arg(1) ;src_stride 304 movsxd rdx, dword ptr arg(3) ;ref_stride 344 movsxd rax, dword ptr arg(1) ;src_stride 345 movsxd rdx, dword ptr arg(3) ;ref_stride
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/external/llvm/test/CodeGen/Mips/cconv/ |
D | return.ll | 21 @dword = global i64 zeroinitializer 55 %0 = load volatile i64, i64* @dword 61 ; O32-DAG: lw $2, %lo(dword)([[R1:\$[0-9]+]]) 62 ; O32-DAG: addiu [[R2:\$[0-9]+]], [[R1]], %lo(dword) 64 ; N32-DAG: ld $2, %lo(dword)([[R1:\$[0-9]+]]) 65 ; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(dword)([[R1:\$[0-9]+]])
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | fp_constant_op.ll | 10 ; CHECK: fadd dword ptr 17 ; CHECK: fmul dword ptr 24 ; CHECK: fadd dword ptr 38 ; CHECK: fdiv dword ptr
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D | ms-inline-asm.ll | 88 …call void asm sideeffect inteldialect "lea edi, dword ptr $0", "*m,~{edi},~{dirflag},~{fpsr},~{fla… 89 …call void asm sideeffect inteldialect "mov dword ptr $0, edi", "=*m,~{dirflag},~{fpsr},~{flags}"(i… 95 ; CHECK: lea edi, dword ptr [{{_?}}results] 100 ; CHECK: mov dword ptr [esp], edi 113 …call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i… 122 ; CHECK: mov dword ptr [esp], esp 148 …c eax\0A\09cmp eax, $$42\0A\09jne .L__MSASMLABEL_.${:uid}__wloop\0A\09mov dword ptr $0, eax", "=*m… 163 …call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{eax},~{ebx},~{ecx},~{edx},~{edi},…
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/external/llvm/test/CodeGen/X86/ |
D | fp_constant_op.ll | 10 ; CHECK: fadd dword ptr 17 ; CHECK: fmul dword ptr 24 ; CHECK: fadd dword ptr 38 ; CHECK: fdiv dword ptr
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