Searched refs:fpu (Results 1 – 25 of 88) sorted by relevance
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1 @ Check multiple .fpu directives.3 @ The later .fpu directive should overwrite the earlier one.4 @ We also check here that all the .fpu directives that we expect to work do work9 .fpu none10 .fpu vfp11 .fpu vfpv212 .fpu vfpv313 .fpu vfpv3-fp1614 .fpu vfpv3-d1615 .fpu vfpv3-d16-fp16[all …]
8 .fpu neon14 .fpu vfpv319 .fpu vfpv3-d1624 .fpu vfpv429 .fpu vfpv4-d1634 .fpu fpv5-d1639 .fpu fp-armv844 .fpu fp-armv849 .fpu neon54 .fpu neon-vfpv4[all …]
8 .fpu vfpv313 .fpu vfpv418 .fpu neon23 .fpu neon-vfpv428 .fpu neon-fp-armv833 .fpu crypto-neon-fp-armv8
7 .fpu invalid9 @ CHECK: .fpu invalid
3 .fpu neon7 @ .thumb should not disable the prior .fpu neon
8 .fpu softvfp
21 .fpu neon
8 .fpu neon
42 int fpu = fpu_status (); in fpu_post_test() local48 if (!fpu) in fpu_post_test()66 if (!fpu) in fpu_post_test()
1 …fpu : yesfpu_exception : yescpuid level : 13wp : yesflags : fpu vme de pse tsc msr pae mce cx8 …
25 [ 0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'26 [ 0.000000] x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 25627 [ 0.000000] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'standard' fo…
310 ; ARM1156T2F-S: .fpu vfpv2437 ; V8-FPARMv8: .fpu fp-armv8441 ; V8-NEON: .fpu neon446 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8451 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8504 ; CORTEX-A7-CHECK: .fpu neon-vfpv4505 ; CORTEX-A7-NOFPU-NOT: .fpu506 ; CORTEX-A7-FPUV4: .fpu vfpv4582 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4608 ; CORTEX-A5-NONEON: .fpu vfpv4-d16[all …]
22 .fpu vfpv3
265 ; ARM1156T2F-S: .fpu vfpv2376 ; V8-FPARMv8: .fpu fp-armv8380 ; V8-NEON: .fpu neon385 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8390 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8443 ; CORTEX-A7-CHECK: .fpu neon-vfpv4444 ; CORTEX-A7-NOFPU-NOT: .fpu445 ; CORTEX-A7-FPUV4: .fpu vfpv4520 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4546 ; CORTEX-A5-NONEON: .fpu vfpv4-d16[all …]
8502 static void Print_x86_float_state_t(MachO::x86_float_state64_t &fpu) { in Print_x86_float_state_t() argument8503 outs() << "\t fpu_reserved[0] " << fpu.fpu_reserved[0]; in Print_x86_float_state_t()8504 outs() << " fpu_reserved[1] " << fpu.fpu_reserved[1] << "\n"; in Print_x86_float_state_t()8505 outs() << "\t control: invalid " << fpu.fpu_fcw.invalid; in Print_x86_float_state_t()8506 outs() << " denorm " << fpu.fpu_fcw.denorm; in Print_x86_float_state_t()8507 outs() << " zdiv " << fpu.fpu_fcw.zdiv; in Print_x86_float_state_t()8508 outs() << " ovrfl " << fpu.fpu_fcw.ovrfl; in Print_x86_float_state_t()8509 outs() << " undfl " << fpu.fpu_fcw.undfl; in Print_x86_float_state_t()8510 outs() << " precis " << fpu.fpu_fcw.precis << "\n"; in Print_x86_float_state_t()8512 if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_24B) in Print_x86_float_state_t()[all …]
153 XLAT_UOFF(fpu),
8965 static void Print_x86_float_state_t(MachO::x86_float_state64_t &fpu) { in Print_x86_float_state_t() argument8966 outs() << "\t fpu_reserved[0] " << fpu.fpu_reserved[0]; in Print_x86_float_state_t()8967 outs() << " fpu_reserved[1] " << fpu.fpu_reserved[1] << "\n"; in Print_x86_float_state_t()8968 outs() << "\t control: invalid " << fpu.fpu_fcw.invalid; in Print_x86_float_state_t()8969 outs() << " denorm " << fpu.fpu_fcw.denorm; in Print_x86_float_state_t()8970 outs() << " zdiv " << fpu.fpu_fcw.zdiv; in Print_x86_float_state_t()8971 outs() << " ovrfl " << fpu.fpu_fcw.ovrfl; in Print_x86_float_state_t()8972 outs() << " undfl " << fpu.fpu_fcw.undfl; in Print_x86_float_state_t()8973 outs() << " precis " << fpu.fpu_fcw.precis << "\n"; in Print_x86_float_state_t()8975 if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_24B) in Print_x86_float_state_t()[all …]