Home
last modified time | relevance | path

Searched refs:getWavefrontSize (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp268 .addImm(StackSize * ST.getWavefrontSize()); in emitEntryFunctionPrologue()
570 .addImm((Alignment - 1) * ST.getWavefrontSize()) in emitPrologue()
574 .addImm(-Alignment * ST.getWavefrontSize()) in emitPrologue()
590 .addImm(RoundedSize * ST.getWavefrontSize()) in emitPrologue()
641 .addImm(RoundedSize * ST.getWavefrontSize()); in emitEpilogue()
772 .addImm(Amount * ST.getWavefrontSize()); in eliminateCallFramePseudoInstr()
DAMDGPUSubtarget.cpp256 return std::make_pair(getWavefrontSize() * 2, getWavefrontSize() * 4); in getDefaultFlatWorkGroupSize()
263 return std::make_pair(1, getWavefrontSize()); in getDefaultFlatWorkGroupSize()
265 return std::make_pair(1, 16 * getWavefrontSize()); in getDefaultFlatWorkGroupSize()
DSIRegisterInfo.cpp556 Offset *= ST.getWavefrontSize(); in buildSpillLoadStore()
724 int64_t Offset = (ST.getWavefrontSize() * FrOffset) + (EltSize * i); in spillSGPR()
886 int64_t Offset = (ST.getWavefrontSize() * FrOffset) + (EltSize * i); in restoreSGPR()
1091 .addImm(Log2_32(ST.getWavefrontSize())) in eliminateFrameIndex()
1098 .addImm(Log2_32(ST.getWavefrontSize())) in eliminateFrameIndex()
DSIMachineFunctionInfo.cpp260 unsigned WaveSize = ST.getWavefrontSize(); in allocateSGPRSpillToVGPR()
DR600ControlFlowFinalizer.cpp112 if (ST->getWavefrontSize() == 64) { in requiresWorkAroundForInst()
123 assert(ST->getWavefrontSize() == 32); in requiresWorkAroundForInst()
DAMDGPUSubtarget.h181 unsigned getWavefrontSize() const { in getWavefrontSize() function
DAMDGPUHSAMetadataStreamer.cpp220 HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); in getHSACodeProps()
DAMDGPUAsmPrinter.cpp954 alignTo(ProgInfo.ScratchSize * STM.getWavefrontSize(), in getSIProgramInfo()
DSIInstrInfo.cpp1041 unsigned WavefrontSize = ST.getWavefrontSize(); in calculateLDSSpillAddress()
DSIISelLowering.cpp5379 if (WGSize <= ST.getWavefrontSize()) in LowerINTRINSIC_VOID()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUSubtarget.h138 unsigned getWavefrontSize() const { in getWavefrontSize() function
282 return 4 * 256 / getWavefrontSize(); in getStackAlignment()
DAMDGPUSubtarget.cpp197 switch (getWavefrontSize()) { in getStackEntrySize()
DSIMachineFunctionInfo.cpp142 MaximumWorkGroupSize = ST.getWavefrontSize();
DR600ControlFlowFinalizer.cpp94 if (ST->getWavefrontSize() == 64) { in requiresWorkAroundForInst()
105 assert(ST->getWavefrontSize() == 32); in requiresWorkAroundForInst()
DAMDGPUAsmPrinter.cpp535 alignTo(ProgInfo.ScratchSize * STM.getWavefrontSize(), in getSIProgramInfo()
DSIRegisterInfo.cpp32 unsigned MaxInvocationsPerWave = SIMDPerCU * ST.getWavefrontSize(); in getMaxWaveCountPerSIMD()
DSIInstrInfo.cpp735 unsigned WavefrontSize = ST.getWavefrontSize(); in calculateLDSSpillAddress()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp213 unsigned getWavefrontSize(const FeatureBitset &Features) { in getWavefrontSize() function
280 return alignTo(FlatWorkGroupSize, getWavefrontSize(Features)) / in getWavesPerWorkGroup()
281 getWavefrontSize(Features); in getWavesPerWorkGroup()
DAMDGPUBaseInfo.h75 unsigned getWavefrontSize(const FeatureBitset &Features);