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Searched refs:gur (Results 1 – 25 of 210) sorted by relevance

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/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet_serdes.c107 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in serdes_lane_enabled() local
127 return !(in_be32(&gur->rcwsr[word]) & (0x80000000 >> bit)); in serdes_lane_enabled()
132 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_serdes_configured() local
135 if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) in is_serdes_configured()
166 const ccsr_gur_t *gur; in serdes_get_first_lane() local
168 gur = (typeof(gur))CONFIG_SYS_MPC85xx_GUTS_ADDR; in serdes_get_first_lane()
171 if (unlikely((in_be32(&gur->rcwsr[5]) & 0x2000) == 0)) in serdes_get_first_lane()
174 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_get_first_lane()
244 const ccsr_gur_t *gur; in serdes_reset_rx() local
250 gur = (typeof(gur))CONFIG_SYS_MPC85xx_GUTS_ADDR; in serdes_reset_rx()
[all …]
Dmp.c84 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in cpu_disable() local
86 setbits_be32(&gur->coredisrl, 1 << nr); in cpu_disable()
92 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_core_disabled() local
93 u32 coredisrl = in_be32(&gur->coredisrl); in is_core_disabled()
100 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in cpu_disable() local
104 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0); in cpu_disable()
107 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1); in cpu_disable()
118 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_core_disabled() local
119 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled()
253 volatile ccsr_gur_t *gur; in plat_mp_up() local
[all …]
/external/u-boot/board/freescale/p1022ds/
Ddiu.c67 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in diu_set_pixel_clock() local
78 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()
79 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()
80 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
85 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in platform_diu_init() local
191 clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); in platform_diu_init()
192 pmuxcr = in_be32(&gur->pmuxcr); in platform_diu_init()
214 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in set_mux_to_lbc() local
217 if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) != in set_mux_to_lbc()
233 out_be32(&gur->pmuxcr, (pmuxcr & ~PMUXCR_ELBCDIU_MASK) | in set_mux_to_lbc()
[all …]
Dp1022ds.c32 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local
35 setbits_be32(&gur->pmuxcr, 0x1000); in board_early_init_f()
37 setbits_be32(&gur->pmuxcr, in board_early_init_f()
38 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_early_init_f()
42 in_be32(&gur->pmuxcr); in board_early_init_f()
45 clrbits_be32(&gur->pmuxcr2, 0x001F8000); in board_early_init_f()
106 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in misc_init_r() local
126 clrsetbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_ETSECUSB_MASK, in misc_init_r()
139 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_MASK, in misc_init_r()
143 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SPI_MASK, in misc_init_r()
[all …]
Dspl.c35 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_init_f() local
40 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); in board_init_f()
41 setbits_be32(&gur->pmuxcr, in board_init_f()
42 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_init_f()
50 in_be32(&gur->pmuxcr); in board_init_f()
55 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; in board_init_f()
/external/u-boot/drivers/net/fm/
Dp1023.c19 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local
20 u32 devdisr = in_be32(&gur->devdisr); in is_device_disabled()
27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local
33 setbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_disable_port()
38 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local
40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_enable_port()
45 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local
46 u32 pordevsr = in_be32(&gur->pordevsr); in fman_port_enet_if()
Dp5020.c23 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local
24 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled()
31 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local
37 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
42 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local
44 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
49 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local
50 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
Dp4080.c27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local
28 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled()
35 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local
41 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
46 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local
48 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
53 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local
54 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
Dp5040.c29 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local
30 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled()
37 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local
43 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
48 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local
50 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
55 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local
56 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
Db4860.c27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local
28 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled()
35 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local
37 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
42 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local
44 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
53 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local
72 serdes2_prtcl = in_be32(&gur->rcwsr[4]) & in fman_port_enet_if()
/external/u-boot/board/xes/common/
Dfsl_8xxx_pci.c28 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
29 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board()
30 uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; in pci_init_board()
31 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; in pci_init_board()
32 uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; in pci_init_board()
33 uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1; in pci_init_board()
58 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
60 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); in pci_init_board()
Dfsl_8xxx_clk.c15 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in get_board_sys_clk() local
18 volatile ccsr_gur_t *gur = &immap->im_gur; in get_board_sys_clk()
21 if (in_be32(&gur->gpporcr) & 0x10000) in get_board_sys_clk()
38 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in get_board_ddr_clk() local
39 u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; in get_board_ddr_clk()
45 if (in_be32(&gur->gpporcr) & 0x20000) in get_board_ddr_clk()
/external/u-boot/drivers/net/ldpaa_eth/
Dls1088a.c27 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in is_device_disabled() local
28 u32 devdisr2 = in_le32(&gur->devdisr2); in is_device_disabled()
35 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_disable() local
37 setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_disable()
42 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_enable() local
44 clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_enable()
92 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in fsl_rgmii_init() local
96 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1]) in fsl_rgmii_init()
105 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1]) in fsl_rgmii_init()
/external/u-boot/board/freescale/mpc8569mds/
Dmpc8569mds.c186 volatile struct ccsr_gur *gur; in board_early_init_f() local
187 gur = (struct ccsr_gur *)(CONFIG_SYS_IMMR + 0xe0000); in board_early_init_f()
188 gur->plppar1 &= ~PLPPAR1_I2C_BIT_MASK; in board_early_init_f()
189 gur->plppar1 |= PLPPAR1_I2C2_VAL; in board_early_init_f()
190 gur->plpdir1 &= ~PLPDIR1_I2C_BIT_MASK; in board_early_init_f()
191 gur->plpdir1 |= PLPDIR1_I2C2_VAL; in board_early_init_f()
287 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local
296 out_be32(&gur->lbiuiplldcr1, 0x00078080); in local_bus_init()
298 out_be32(&gur->lbiuiplldcr0, 0x7c0f1bf0); in local_bus_init()
300 out_be32(&gur->lbiuiplldcr0, 0x6c0f1bf0); in local_bus_init()
[all …]
/external/u-boot/board/gdsys/p1022/
Dcontrolcenterd.c73 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local
77 clrsetbits_be32(&gur->pmuxcr, 0x00600000, 0x80000000); in board_early_init_f()
80 setbits_be32(&gur->pmuxcr, 0x00001000); in board_early_init_f()
83 setbits_be32(&gur->pmuxcr, 0x00000010); in board_early_init_f()
86 setbits_be32(&gur->pmuxcr, 0x00000020); in board_early_init_f()
89 setbits_be32(&gur->pmuxcr, 0x000000c0); in board_early_init_f()
92 setbits_be32(&gur->pmuxcr2, 0x03000000); in board_early_init_f()
95 clrbits_be32(&gur->pmuxcr, 0x00000300); in board_early_init_f()
98 setbits_be32(&gur->pmuxcr, 0x000000F0); in board_early_init_f()
101 in_be32(&gur->pmuxcr); in board_early_init_f()
[all …]
Ddiu.c49 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in diu_set_pixel_clock() local
60 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()
61 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()
62 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
67 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in platform_diu_init() local
79 clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); in platform_diu_init()
80 pmuxcr = in_be32(&gur->pmuxcr); in platform_diu_init()
/external/u-boot/board/freescale/mpc8548cds/
Dmpc8548cds.c31 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in checkboard() local
53 gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */ in checkboard()
66 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local
75 gur->lbiuiplldcr1 = 0x00078080; in local_bus_init()
77 gur->lbiuiplldcr0 = 0x7c0f1bf0; in local_bus_init()
79 gur->lbiuiplldcr0 = 0x6c0f1bf0; in local_bus_init()
81 gur->lbiuiplldcr0 = 0x5c0f1bf0; in local_bus_init()
194 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
201 devdisr = in_be32(&gur->devdisr); in pci_init_board()
202 pordevsr = in_be32(&gur->pordevsr); in pci_init_board()
[all …]
/external/u-boot/board/freescale/bsc9131rdb/
Dbsc9131rdb.c27 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local
29 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42); in board_early_init_f()
30 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS); in board_early_init_f()
32 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43); in board_early_init_f()
33 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK | in board_early_init_f()
35 setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0); in board_early_init_f()
36 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK | in board_early_init_f()
/external/u-boot/board/Arcturus/ucp1020/
Dspl.c36 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_init_f() local
41 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); in board_init_f()
42 setbits_be32(&gur->pmuxcr, in board_init_f()
43 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_init_f()
46 in_be32(&gur->pmuxcr); in board_init_f()
49 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_init_f()
53 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; in board_init_f()
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dspl.c28 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_init_f() local
33 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); in board_init_f()
34 setbits_be32(&gur->pmuxcr, in board_init_f()
35 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_init_f()
38 in_be32(&gur->pmuxcr); in board_init_f()
41 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_init_f()
45 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; in board_init_f()
/external/u-boot/board/sbc8548/
Dsbc8548.c57 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local
70 out_be32(&gur->lbiuiplldcr1, 0x00078080); in local_bus_init()
72 out_be32(&gur->lbiuiplldcr0, 0x7c0f1bf0); in local_bus_init()
74 out_be32(&gur->lbiuiplldcr0, 0x6c0f1bf0); in local_bus_init()
76 out_be32(&gur->lbiuiplldcr0, 0x5c0f1bf0); in local_bus_init()
243 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
248 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board()
249 u32 pordevsr = in_be32(&gur->pordevsr); in pci_init_board()
250 u32 porpllsr = in_be32(&gur->porpllsr); in pci_init_board()
279 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
[all …]
/external/u-boot/board/freescale/bsc9132qds/
Dbsc9132qds.c47 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in board_config_serdes_mux() local
48 u32 pordevsr = in_be32(&gur->pordevsr); in board_config_serdes_mux()
273 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in misc_init_r() local
274 u32 porbmsr = in_be32(&gur->porbmsr); in misc_init_r()
290 clrbits_be32(&gur->pmuxcr3, in misc_init_r()
292 setbits_be32(&gur->pmuxcr3, MPC85xx_PMUXCR3_UART2_SEL); in misc_init_r()
310 clrbits_be32(&gur->pmuxcr, in misc_init_r()
312 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR0_SIM_SEL); in misc_init_r()
324 clrbits_be32(&gur->pmuxcr3, in misc_init_r()
326 setbits_be32(&gur->pmuxcr3, MPC85xx_PMUXCR3_UART3_SEL); in misc_init_r()
[all …]
/external/u-boot/board/freescale/mpc8568mds/
Dmpc8568mds.c129 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local
138 gur->lbiuiplldcr1 = 0x00078080; in local_bus_init()
140 gur->lbiuiplldcr0 = 0x7c0f1bf0; in local_bus_init()
142 gur->lbiuiplldcr0 = 0x6c0f1bf0; in local_bus_init()
144 gur->lbiuiplldcr0 = 0x5c0f1bf0; in local_bus_init()
292 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
299 devdisr = in_be32(&gur->devdisr); in pci_init_board()
300 pordevsr = in_be32(&gur->pordevsr); in pci_init_board()
301 porpllsr = in_be32(&gur->porpllsr); in pci_init_board()
339 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
/external/u-boot/board/freescale/mpc8544ds/
Dmpc8544ds.c27 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in checkboard() local
33 if ((uint)&gur->porpllsr != 0xe00e0000) { in checkboard()
34 printf("immap size error %lx\n",(ulong)&gur->porpllsr); in checkboard()
65 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local
73 devdisr = in_be32(&gur->devdisr); in pci_init_board()
74 pordevsr = in_be32(&gur->pordevsr); in pci_init_board()
75 porpllsr = in_be32(&gur->porpllsr); in pci_init_board()
117 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ in pci_init_board()
124 setbits_be32(&gur->devdisr, _DEVDISR_PCIE1); /* disable */ in pci_init_board()
131 setbits_be32(&gur->devdisr, _DEVDISR_PCIE2); /* disable */ in pci_init_board()
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/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dmp.c44 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in wake_secondary_core_n() local
53 gur_out32(&gur->scratchrw[6], mpidr); in wake_secondary_core_n()
62 while (gur_in32(&gur->scratchrw[6]) != 0) in wake_secondary_core_n()
69 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in fsl_layerscape_wake_seconday_cores() local
100 gur_out32(&gur->bootlocptrh, (u32)(gd->relocaddr >> 32)); in fsl_layerscape_wake_seconday_cores()
101 gur_out32(&gur->bootlocptrl, (u32)gd->relocaddr); in fsl_layerscape_wake_seconday_cores()
103 svr = gur_in32(&gur->svr); in fsl_layerscape_wake_seconday_cores()
106 gur_out32(&gur->scratchrw[6], 1); in fsl_layerscape_wake_seconday_cores()
116 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores()
125 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores()
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