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Searched refs:hiOperand (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/subzero/src/
DIcePhiLoweringImpl.h42 auto *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest)); in prelowerPhis32Bit()
50 PhiHi->addArgument(Target->hiOperand(Src), Label); in prelowerPhis32Bit()
DIceTargetLoweringMIPS32.cpp2299 Operand *TargetMIPS32::hiOperand(Operand *Operand) { in hiOperand() function in Ice::MIPS32::TargetMIPS32
2470 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerInt64Arithmetic()
2483 Src0HiR = legalizeToReg(hiOperand(Src0)); in lowerInt64Arithmetic()
2484 Src1HiR = legalizeToReg(hiOperand(Src1)); in lowerInt64Arithmetic()
2498 Src0HiR = legalizeToReg(hiOperand(Src0)); in lowerInt64Arithmetic()
2499 Src1HiR = legalizeToReg(hiOperand(Src1)); in lowerInt64Arithmetic()
2510 Src0HiR = legalizeToReg(hiOperand(Src0)); in lowerInt64Arithmetic()
2511 Src1HiR = legalizeToReg(hiOperand(Src1)); in lowerInt64Arithmetic()
2525 Src0HiR = legalizeToReg(hiOperand(Src0)); in lowerInt64Arithmetic()
2526 Src1HiR = legalizeToReg(hiOperand(Src1)); in lowerInt64Arithmetic()
[all …]
DIceTargetLoweringARM32.cpp2123 Operand *TargetARM32::hiOperand(Operand *Operand) { in hiOperand() function in Ice::ARM32::TargetARM32
2569 div0Check(IceType_i64, loOperand(Src1), hiOperand(Src1)); in preambleDivRem()
2591 Int32Operands SrcsHi(hiOperand(Src0), hiOperand(Src1)); in lowerInt64Arithmetic()
2596 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerInt64Arithmetic()
3541 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerAssign()
3542 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg | Legal_Flex); in lowerAssign()
3736 Operand *Hi = hiOperand(Arg); in lowerCall()
3929 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerCast()
3981 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); in lowerCast()
4450 Int32Operands SrcsHi(hiOperand(Src0), hiOperand(Src1)); in lowerInt64IcmpCond()
[all …]
DIceTargetLoweringX86BaseImpl.h1412 TargetX86Base<TraitsType>::hiOperand(Operand *Operand) {
1971 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
1973 Operand *Src0Hi = hiOperand(Src0);
1975 Operand *Src1Hi = hiOperand(Src1);
2854 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
2911 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
3157 SpillHi = hiOperand(Src0RM);
3161 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
3208 _mov(T_Hi, hiOperand(Src0));
3699 Src0HiRM = legalize(hiOperand(Src0), Legal_Reg | Legal_Mem);
[all …]
DIceTargetLoweringX8632.cpp375 legalizeToReg(hiOperand(Value), Traits::RegisterSet::Reg_edx); in moveReturnValueToRegister()
DIceTargetLoweringX86Base.h227 hiOperand(Operand *Operand);
229 typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *) { in hiOperand() function
DIceTargetLoweringMIPS32.h712 Operand *hiOperand(Operand *Operand);
DIceTargetLoweringARM32.h168 Operand *hiOperand(Operand *Operand);