| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 71 if (Pred.isCtrl()) in numberRCValPredInSU()
108 if (Succ.isCtrl()) in numberRCValSuccInSU()
144 if (Succ.isCtrl()) in numberCtrlDepsInSU()
153 if (Pred.isCtrl()) in numberCtrlPredInSU()
270 if (Succ.isCtrl()) in isResourceAvailable()
497 if (Pred.isCtrl() || (Pred.getSUnit()->NumRegDefsLeft == 0)) in scheduledNode()
513 if (!Succ.isCtrl()) in scheduledNode()
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| D | ScheduleDAGRRList.cpp | 1056 if (Pred.isCtrl()) in TryUnfoldSU()
1064 if (Succ.isCtrl()) in TryUnfoldSU()
1093 !D.isCtrl() && NewSU->NumRegDefsLeft > 0) in TryUnfoldSU()
1945 if (Pred.isCtrl()) continue; // ignore chain preds in CalcNodeSethiUllmanNumber()
1968 if (Pred.isCtrl()) continue; // ignore chain preds in CalcNodeSethiUllmanNumber()
2071 if (Pred.isCtrl()) in HighRegPressure()
2120 if (Pred.isCtrl()) in RegPressureDiff()
2163 if (Pred.isCtrl()) in scheduledNode()
2245 if (Pred.isCtrl()) in unscheduledNode()
2313 if (Succ.isCtrl()) continue; // ignore chain succs in closestSucc()
[all …]
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| D | ScheduleDAGSDNodes.cpp | 495 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) { in AddSchedEdges()
764 if (I->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
773 if (II->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
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| D | ScheduleDAGFast.cpp | 285 if (Pred.isCtrl()) in CopyAndMoveSuccessors()
294 if (Succ.isCtrl()) in CopyAndMoveSuccessors()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 74 if (I->isCtrl()) in numberRCValPredInSU()
112 if (I->isCtrl()) in numberRCValSuccInSU()
149 if (I->isCtrl()) in numberCtrlDepsInSU()
159 if (I->isCtrl()) in numberCtrlPredInSU()
278 if (I->isCtrl()) in isResourceAvailable()
511 if (I->isCtrl() || (I->getSUnit()->NumRegDefsLeft == 0)) in scheduledNode()
528 if (!I->isCtrl()) in scheduledNode()
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| D | ScheduleDAGRRList.cpp | 1031 if (Pred.isCtrl()) in CopyAndMoveSuccessors()
1039 if (Succ.isCtrl()) in CopyAndMoveSuccessors()
1068 && !D.isCtrl() && NewSU->NumRegDefsLeft > 0) in CopyAndMoveSuccessors()
1846 if (Pred.isCtrl()) continue; // ignore chain preds in CalcNodeSethiUllmanNumber()
1947 if (Pred.isCtrl()) in HighRegPressure()
1996 if (Pred.isCtrl()) in RegPressureDiff()
2039 if (Pred.isCtrl()) in scheduledNode()
2120 if (Pred.isCtrl()) in unscheduledNode()
2188 if (Succ.isCtrl()) continue; // ignore chain succs in closestSucc()
2206 if (Pred.isCtrl()) continue; // ignore chain preds in calcMaxScratches()
[all …]
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| D | ScheduleDAGSDNodes.cpp | 494 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) { in AddSchedEdges()
762 if (I->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
771 if (II->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
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| D | ScheduleDAGFast.cpp | 287 if (I->isCtrl()) in CopyAndMoveSuccessors()
297 if (I->isCtrl()) in CopyAndMoveSuccessors()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ScheduleDAGEmit.cpp | 39 if (I->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
48 if (II->isCtrl()) continue; // ignore chain preds in EmitPhysRegCopy()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | GCNILPSched.cpp | 66 if (Pred.isCtrl()) continue; // ignore chain preds in CalcNodeSethiUllmanNumber()
110 if (Succ.isCtrl()) continue; // ignore chain succs in closestSucc()
125 if (Pred.isCtrl()) continue; // ignore chain preds in calcMaxScratches()
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| D | SIMachineScheduler.cpp | 1252 SuccDep.isCtrl() ? NoData : Data); in createBlocksForVariant()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 861 if (I->isCtrl()) in CopyAndMoveSuccessors()
870 if (I->isCtrl()) in CopyAndMoveSuccessors()
903 && !D.isCtrl() && NewSU->NumRegDefsLeft > 0) in CopyAndMoveSuccessors()
1737 if (I->isCtrl()) continue; // ignore chain preds in CalcNodeSethiUllmanNumber()
1837 if (I->isCtrl()) in HighRegPressure()
1887 if (I->isCtrl()) in RegPressureDiff()
1931 if (I->isCtrl()) in ScheduledNode()
2013 if (I->isCtrl()) in UnscheduledNode()
2082 if (I->isCtrl()) continue; // ignore chain succs in closestSucc()
2101 if (I->isCtrl()) continue; // ignore chain preds in calcMaxScratches()
[all …]
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| D | ScheduleDAGFast.cpp | 282 if (I->isCtrl()) in CopyAndMoveSuccessors()
292 if (I->isCtrl()) in CopyAndMoveSuccessors()
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| D | ScheduleDAGSDNodes.cpp | 455 if (!SU->addPred(dep) && !dep.isCtrl() && OpSU->NumRegDefsLeft > 1) { in AddSchedEdges()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAG.h | 162 bool isCtrl() const { in isCtrl() function
658 return getSDep().isCtrl();
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ScheduleDAG.h | 169 bool isCtrl() const { in isCtrl() function
626 return getSDep().isCtrl();
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| /external/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAG.h | 158 bool isCtrl() const { in isCtrl() function
671 return getSDep().isCtrl();
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 71 if (SU->Preds[i].isCtrl()) in isBCTRAfterSet()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 71 if (SU->Preds[i].isCtrl()) in isBCTRAfterSet()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 72 if (I->isCtrl()) in isResourceAvailable()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 84 if (S.isCtrl()) in hasDependence()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineScheduler.cpp | 1590 if (Pred.isCtrl()) { in apply()
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| /external/llvm/lib/CodeGen/ |
| D | MachineScheduler.cpp | 1461 if (PI->isCtrl()) { in apply()
|