| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 124 if (MO.isKill()) { in runOnMachineFunction()
152 bool isKill = MO.isKill(); in runOnMachineFunction() local
156 if (isKill) { in runOnMachineFunction()
174 if (MO.isKill() || MI->isRegTiedToDefOperand(i)) { in runOnMachineFunction()
251 bool isKill = false; in runOnMachineFunction() local
257 if (RRMO.isKill()) in runOnMachineFunction()
258 isKill = true; in runOnMachineFunction()
268 if (isKill) { in runOnMachineFunction()
278 bool isKill = true; in runOnMachineFunction() local
284 if (isKill) { in runOnMachineFunction()
[all …]
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| D | TwoAddressInstructionPass.cpp | 218 if (!UseMO.isKill()) in Sink3AddrInstruction()
260 if (MO.isKill()) { in Sink3AddrInstruction()
785 if (MO.isUse() && MO.isKill()) in isSafeToDelete()
985 NewMIs[1]->getOperand(NewSrcIdx).isKill()) { in TryInstructionTransform()
994 if (MO.isKill()) { in TryInstructionTransform()
1203 if (MO.isKill()) { in runOnMachineFunction()
1216 if (MO.isKill()) { in runOnMachineFunction()
1406 if (UseMI->getOperand(1).isKill()) { in CoalesceExtSubRegs()
1473 bool isKill = MI->getOperand(i).isKill(); in EliminateRegSequences() local
1475 !isKill || HasOtherRegSequenceUses(SrcReg, MI, MRI) || in EliminateRegSequences()
[all …]
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| D | VirtRegMap.h | 320 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) { in addSpillPoint() argument
324 I->second.push_back(std::make_pair(virtReg, isKill)); in addSpillPoint()
327 Virts.push_back(std::make_pair(virtReg, isKill)); in addSpillPoint()
341 bool isKill = I->second.back().second; in transferSpillPts() local
343 addSpillPoint(virtReg, isKill, New); in transferSpillPts()
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| D | MachineInstr.cpp | 156 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument
178 IsKill = isKill; in ChangeToRegister()
242 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print()
259 if (isKill() || isDead() || isUndef()) { in print()
261 if (isKill()) OS << "kill"; in print()
264 if (isKill() || isDead()) in print()
776 if (Check == CheckKillDead && MO.isKill() != OMO.isKill()) in isIdenticalTo()
893 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, in findRegisterUseOperandIdx() argument
907 if (!isKill || MO.isKill()) in findRegisterUseOperandIdx()
1104 if (!MO.isReg() || (!MO.isKill() && !MO.isDead())) in copyKillDeadInfo()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 120 bool Reg1IsKill = MI->getOperand(1).isKill(); in commuteInstruction()
121 bool Reg2IsKill = MI->getOperand(2).isKill(); in commuteInstruction()
332 unsigned SrcReg, bool isKill, in StoreRegToStackSlot() argument
341 getKillRegState(isKill)), in StoreRegToStackSlot()
350 getKillRegState(isKill)), in StoreRegToStackSlot()
357 getKillRegState(isKill)), in StoreRegToStackSlot()
366 getKillRegState(isKill)), in StoreRegToStackSlot()
372 getKillRegState(isKill)), in StoreRegToStackSlot()
377 getKillRegState(isKill)), in StoreRegToStackSlot()
385 getKillRegState(isKill)), in StoreRegToStackSlot()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 147 bool DstIsKill = MI.getOperand(1).isKill(); in expandArith()
148 bool SrcIsKill = MI.getOperand(2).isKill(); in expandArith()
180 bool DstIsKill = MI.getOperand(1).isKill(); in expandLogic()
181 bool SrcIsKill = MI.getOperand(2).isKill(); in expandLogic()
226 bool SrcIsKill = MI.getOperand(1).isKill(); in expandLogicImm()
278 bool SrcIsKill = MI.getOperand(1).isKill(); in expand()
330 bool SrcIsKill = MI.getOperand(1).isKill(); in expand()
393 bool DstIsKill = MI.getOperand(1).isKill(); in expand()
423 bool DstIsKill = MI.getOperand(0).isKill(); in expand()
424 bool SrcIsKill = MI.getOperand(1).isKill(); in expand()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinInstrInfo.cpp | 173 bool isKill, in storeRegToStackSlot() argument
181 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
189 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
197 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
210 bool isKill, in storeRegToAddr() argument
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| D | BlackfinInstrInfo.h | 56 unsigned SrcReg, bool isKill,
62 unsigned SrcReg, bool isKill,
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| /external/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 238 if (!UseMO.isKill()) in sink3AddrInstruction()
280 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { in sink3AddrInstruction()
880 if (MOReg != Reg && (MO.isKill() || in rescheduleMIBelowKill()
929 bool isKill = in rescheduleMIBelowKill() local
930 MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)); in rescheduleMIBelowKill()
932 ((isKill && Uses.count(MOReg)) || Kills.count(MOReg))) in rescheduleMIBelowKill()
935 if (MOReg == Reg && !isKill) in rescheduleMIBelowKill()
1058 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local
1059 if (MOReg == Reg && !isKill) in rescheduleKillAboveMI()
1062 if (isKill && MOReg != Reg) in rescheduleKillAboveMI()
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| D | MachineInstrBundle.cpp | 152 if (MO.isKill()) in finalizeBundle()
161 if (MO.isKill()) in finalizeBundle()
211 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
213 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
324 if (MO.isKill()) in analyzePhysReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 267 if (!UseMO.isKill()) in sink3AddrInstruction()
309 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { in sink3AddrInstruction()
922 if (MOReg != Reg && (MO.isKill() || in rescheduleMIBelowKill()
971 bool isKill = in rescheduleMIBelowKill() local
972 MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)); in rescheduleMIBelowKill()
973 if (MOReg != Reg && ((isKill && regOverlapsSet(Uses, MOReg, TRI)) || in rescheduleMIBelowKill()
977 if (MOReg == Reg && !isKill) in rescheduleMIBelowKill()
1100 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local
1101 if (MOReg == Reg && !isKill) in rescheduleKillAboveMI()
1104 if (isKill && MOReg != Reg) in rescheduleKillAboveMI()
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| D | MachineInstrBundle.cpp | 154 if (MO.isKill()) in finalizeBundle()
163 if (MO.isKill()) in finalizeBundle()
213 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
215 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
326 if (MO.isKill()) in analyzePhysReg()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 191 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() in processBlock()
195 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() in processBlock()
224 bool AddRegKill = AddendMI->getOperand(1).isKill(); in processBlock()
225 bool KilledProdRegKill = MI->getOperand(KilledProdOp).isKill(); in processBlock()
226 bool OtherProdRegKill = MI->getOperand(OtherProdOp).isKill(); in processBlock()
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| D | PPCInstrInfo.cpp | 353 bool Reg1IsKill = MI.getOperand(1).isKill(); in commuteInstructionImpl()
354 bool Reg2IsKill = MI.getOperand(2).isKill(); in commuteInstructionImpl()
957 unsigned SrcReg, bool isKill, in StoreRegToStackSlot() argument
970 getKillRegState(isKill)), in StoreRegToStackSlot()
976 getKillRegState(isKill)), in StoreRegToStackSlot()
981 getKillRegState(isKill)), in StoreRegToStackSlot()
986 getKillRegState(isKill)), in StoreRegToStackSlot()
991 getKillRegState(isKill)), in StoreRegToStackSlot()
997 getKillRegState(isKill)), in StoreRegToStackSlot()
1003 getKillRegState(isKill)), in StoreRegToStackSlot()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 192 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() in processBlock()
196 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() in processBlock()
225 bool AddRegKill = AddendMI->getOperand(1).isKill(); in processBlock()
226 bool KilledProdRegKill = MI.getOperand(KilledProdOp).isKill(); in processBlock()
227 bool OtherProdRegKill = MI.getOperand(OtherProdOp).isKill(); in processBlock()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 99 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot() argument
102 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0); in storeRegToStackSlot()
115 unsigned SrcReg, bool isKill, int FrameIndex,
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 220 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); in eliminateFrameIndex() local
245 .addReg(Reg, getKillRegState(isKill)) in eliminateFrameIndex()
266 .addReg(Reg, getKillRegState(isKill)) in eliminateFrameIndex()
295 .addReg(Reg, getKillRegState(isKill)) in eliminateFrameIndex()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 79 bool isKill; member
85 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {} in MemOpQueueEntry()
388 if (memOps[i].Position < insertPos && memOps[i].isKill) { in MergeOpsUpdate()
400 bool isKill = memOps[i].isKill || KilledRegs.count(Reg); in MergeOpsUpdate() local
401 Regs.push_back(std::make_pair(Reg, isKill)); in MergeOpsUpdate()
422 memOps[j].isKill = false; in MergeOpsUpdate()
424 memOps[i].isKill = true; in MergeOpsUpdate()
686 bool BaseKill = MI->getOperand(0).isKill(); in MergeBaseUpdateLSMultiple()
824 bool BaseKill = MI->getOperand(1).isKill(); in MergeBaseUpdateLoadStore()
907 getKillRegState(MO.isKill()))); in MergeBaseUpdateLoadStore()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 115 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot() argument
118 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0); in storeRegToStackSlot()
131 unsigned SrcReg, bool isKill, int FrameIndex,
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineInstr.h | 271 bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
359 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
364 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
366 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 393 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
408 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
411 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
414 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
417 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
420 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
425 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 397 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
412 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
415 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
418 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
421 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
424 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
429 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrBuilder.h | 76 unsigned Reg, bool isKill, int Offset) { in addRegOffset() argument
77 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset); in addRegOffset()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonNewValueJump.cpp | 530 if (MI.getOperand(1).isKill()) in runOnMachineFunction()
535 if (MI.getOperand(2).isKill()) in runOnMachineFunction()
615 localMO.isKill() && feederReg == localMO.getReg()) { in runOnMachineFunction()
670 cmpInstr->getOperand(0).isKill()) in runOnMachineFunction()
673 cmpInstr->getOperand(1).isKill()) in runOnMachineFunction()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 297 bool isKill() const { in isKill() function
581 bool isKill = false, bool isDead = false,
607 bool isKill = false, bool isDead = false,
614 assert(!(isKill && isDef) && "Kill flag on def");
618 Op.IsKill = isKill;
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