Searched refs:isSignExtended (Results 1 – 8 of 8) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.h | 359 bool isSignExtended(const MachineInstr &MI, const unsigned depth = 0) const {
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D | PPCMIPeephole.cpp | 608 TII->isSignExtended(*SrcMI)) { in simplifyCode()
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D | PPCInstrInfo.cpp | 1661 if (isSignExtended(*MI)) in optimizeCompareInstr()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4546 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 4605 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 4630 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 4631 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 2501 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 2517 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 2563 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 2564 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL() 8685 if (N0->hasOneUse() && (isSignExtended(N0.getNode(), DAG) || in performMulCombine()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 2173 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 2195 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 2221 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 2222 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 6489 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 6619 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 6645 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 6646 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 7313 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 7453 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 7479 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 7480 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL()
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