| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_clear.c | 339 const struct radv_image_view *iview = fb->attachments[pass_att].attachment; in emit_color_clear() local
340 const uint32_t samples = iview->image->info.samples; in emit_color_clear()
342 unsigned fs_key = radv_format_meta_fs_key(iview->vk_format); in emit_color_clear()
543 const struct radv_image_view *iview, in depth_view_can_fast_clear() argument
549 uint32_t queue_mask = radv_image_queue_family_mask(iview->image, in depth_view_can_fast_clear()
553 clear_rect->rect.extent.width != iview->extent.width || in depth_view_can_fast_clear()
554 clear_rect->rect.extent.height != iview->extent.height) in depth_view_can_fast_clear()
556 if (iview->image->tc_compatible_htile && in depth_view_can_fast_clear()
561 if (iview->image->surface.htile_size && in depth_view_can_fast_clear()
562 iview->base_mip == 0 && in depth_view_can_fast_clear()
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| D | radv_image.c | 976 radv_image_view_make_descriptor(struct radv_image_view *iview, in radv_image_view_make_descriptor() argument
981 struct radv_image *image = iview->image; in radv_image_view_make_descriptor()
982 bool is_stencil = iview->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT; in radv_image_view_make_descriptor()
988 descriptor = iview->storage_descriptor; in radv_image_view_make_descriptor()
990 descriptor = iview->descriptor; in radv_image_view_make_descriptor()
994 …ce.blk_w / vk_format_get_blockwidth(image->vk_format) * vk_format_get_blockwidth(iview->vk_format); in radv_image_view_make_descriptor()
997 hw_level = iview->base_mip; in radv_image_view_make_descriptor()
999 iview->type, in radv_image_view_make_descriptor()
1000 iview->vk_format, in radv_image_view_make_descriptor()
1002 hw_level, hw_level + iview->level_count - 1, in radv_image_view_make_descriptor()
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| D | radv_device.c | 3079 static uint32_t radv_surface_max_layer_count(struct radv_image_view *iview) in radv_surface_max_layer_count() argument
3081 …return iview->type == VK_IMAGE_VIEW_TYPE_3D ? iview->extent.depth : (iview->base_layer + iview->la… in radv_surface_max_layer_count()
3087 struct radv_image_view *iview) in radv_initialise_color_surface() argument
3093 const struct radeon_surf *surf = &iview->image->surface; in radv_initialise_color_surface()
3095 desc = vk_format_description(iview->vk_format); in radv_initialise_color_surface()
3102 va = radv_buffer_get_va(iview->bo) + iview->image->offset; in radv_initialise_color_surface()
3108 if (iview->image->dcc_offset) in radv_initialise_color_surface()
3109 meta = iview->image->surface.u.gfx9.dcc; in radv_initialise_color_surface()
3111 meta = iview->image->surface.u.gfx9.cmask; in radv_initialise_color_surface()
3113 cb->cb_color_attrib |= S_028C74_COLOR_SW_MODE(iview->image->surface.u.gfx9.surf.swizzle_mode) | in radv_initialise_color_surface()
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| D | radv_meta_fast_clear.c | 609 struct radv_image_view iview; in radv_emit_color_decompress() local
611 radv_image_view_init(&iview, cmd_buffer->device, in radv_emit_color_decompress()
632 radv_image_view_to_handle(&iview) in radv_emit_color_decompress()
699 struct radv_image_view iview = {0}; in radv_decompress_dcc_compute() local
715 radv_image_view_init(&iview, cmd_buffer->device, in radv_decompress_dcc_compute()
745 .imageView = radv_image_view_to_handle(&iview), in radv_decompress_dcc_compute()
759 .imageView = radv_image_view_to_handle(&iview), in radv_decompress_dcc_compute()
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| D | radv_meta_blit2d.c | 41 struct radv_image_view *iview, VkFormat depth_format, in create_iview() argument
53 radv_image_view_init(iview, cmd_buffer->device, in create_iview()
93 struct radv_image_view iview; member
130 create_iview(cmd_buffer, src_img, &tmp->iview, depth_format, aspects); in blit2d_bind_src()
152 .imageView = radv_image_view_to_handle(&tmp->iview), in blit2d_bind_src()
163 struct radv_image_view iview; member
176 create_iview(cmd_buffer, dst, &tmp->iview, depth_format, aspects); in blit2d_bind_dst()
183 radv_image_view_to_handle(&tmp->iview), in blit2d_bind_dst()
263 unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); in radv_meta_blit2d_normal_dst()
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| D | radv_meta_decompress.c | 362 struct radv_image_view iview; in radv_process_depth_image_inplace() local
364 radv_image_view_init(&iview, cmd_buffer->device, in radv_process_depth_image_inplace()
386 radv_image_view_to_handle(&iview) in radv_process_depth_image_inplace()
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| D | radv_descriptor_set.c | 634 RADV_FROM_HANDLE(radv_image_view, iview, image_info->imageView); in write_image_descriptor()
638 descriptor = iview->storage_descriptor; in write_image_descriptor()
640 descriptor = iview->descriptor; in write_image_descriptor()
646 radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->bo, 7); in write_image_descriptor()
648 *buffer_list = iview->bo; in write_image_descriptor()
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| D | radv_meta_bufimage.c | 933 struct radv_image_view *iview) in create_iview() argument
937 radv_image_view_init(iview, cmd_buffer->device, in create_iview()
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| /external/mesa3d/src/gallium/drivers/softpipe/ |
| D | sp_image.c | 36 const struct pipe_image_view *iview, in get_image_offset() argument
42 return iview->u.buf.offset; in get_image_offset()
49 base_layer = r_coord + iview->u.tex.first_layer; in get_image_offset()
50 return softpipe_get_tex_image_offset(spr, iview->u.tex.level, base_layer); in get_image_offset()
147 get_dimensions(const struct pipe_image_view *iview, in get_dimensions() argument
156 *width = iview->u.buf.size / util_format_get_blocksize(pformat); in get_dimensions()
169 level = spr->base.target == PIPE_BUFFER ? 0 : iview->u.tex.level; in get_dimensions()
212 struct pipe_image_view *iview; in sp_tgsi_load() local
222 iview = &sp_img->sp_iview[params->unit]; in sp_tgsi_load()
223 spr = (struct softpipe_resource *)iview->resource; in sp_tgsi_load()
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| /external/mesa3d/src/intel/vulkan/ |
| D | anv_image.c | 1082 struct anv_image_view *iview; in anv_CreateImageView() local
1084 iview = vk_zalloc2(&device->alloc, pAllocator, sizeof(*iview), 8, in anv_CreateImageView()
1086 if (iview == NULL) in anv_CreateImageView()
1127 iview->image = image; in anv_CreateImageView()
1134 iview->aspect_mask = remap_aspect_flags(expanded_aspects); in anv_CreateImageView()
1135 iview->n_planes = anv_image_aspect_get_planes(iview->aspect_mask); in anv_CreateImageView()
1136 iview->vk_format = pCreateInfo->format; in anv_CreateImageView()
1138 iview->extent = (VkExtent3D) { in anv_CreateImageView()
1152 anv_plane_to_aspect(iview->aspect_mask, vplane); in anv_CreateImageView()
1157 iview->planes[vplane].image_plane = iplane; in anv_CreateImageView()
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| D | genX_cmd_buffer.c | 230 struct anv_image_view *iview = cmd_state->framebuffer->attachments[att]; in color_attachment_compute_aux_usage() local
232 assert(iview->n_planes == 1); in color_attachment_compute_aux_usage()
234 if (iview->planes[0].isl.base_array_layer >= in color_attachment_compute_aux_usage()
235 anv_image_aux_layers(iview->image, VK_IMAGE_ASPECT_COLOR_BIT, in color_attachment_compute_aux_usage()
236 iview->planes[0].isl.base_level)) { in color_attachment_compute_aux_usage()
244 } else if (iview->image->planes[0].aux_usage == ISL_AUX_USAGE_MCS) { in color_attachment_compute_aux_usage()
249 } else if (iview->image->planes[0].aux_usage == ISL_AUX_USAGE_CCS_E) { in color_attachment_compute_aux_usage()
265 if (isl_format_supports_ccs_e(&device->info, iview->planes[0].isl.format)) { in color_attachment_compute_aux_usage()
276 anv_perf_warn(device->instance, iview->image, in color_attachment_compute_aux_usage()
284 assert(iview->image->planes[0].aux_surface.isl.usage & ISL_SURF_USAGE_CCS_BIT); in color_attachment_compute_aux_usage()
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| D | anv_dump.c | 422 struct anv_image_view *iview = fb->attachments[i]; in anv_dump_add_framebuffer() local
425 for_each_bit(b, iview->image->aspects) { in anv_dump_add_framebuffer()
442 unsigned plane = anv_image_aspect_to_plane(iview->image->aspects, aspect); in anv_dump_add_framebuffer()
443 dump_add_image(cmd_buffer, (struct anv_image *)iview->image, aspect, in anv_dump_add_framebuffer()
444 iview->planes[plane].isl.base_level, in anv_dump_add_framebuffer()
445 iview->planes[plane].isl.base_array_layer, in anv_dump_add_framebuffer()
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| D | anv_blorp.c | 1178 struct anv_image_view *iview = fb->attachments[a]; in anv_cmd_buffer_clear_subpass() local
1179 const struct anv_image *image = iview->image; in anv_cmd_buffer_clear_subpass()
1208 blorp_fast_clear(&batch, &surf, iview->planes[0].isl.format, in anv_cmd_buffer_clear_subpass()
1209 iview->planes[0].isl.base_level, in anv_cmd_buffer_clear_subpass()
1210 iview->planes[0].isl.base_array_layer, fb->layers, in anv_cmd_buffer_clear_subpass()
1219 blorp_clear(&batch, &surf, iview->planes[0].isl.format, in anv_cmd_buffer_clear_subpass()
1220 anv_swizzle_for_render(iview->planes[0].isl.swizzle), in anv_cmd_buffer_clear_subpass()
1221 iview->planes[0].isl.base_level, in anv_cmd_buffer_clear_subpass()
1222 iview->planes[0].isl.base_array_layer, fb->layers, in anv_cmd_buffer_clear_subpass()
1247 const struct anv_image_view *iview = fb->attachments[ds]; in anv_cmd_buffer_clear_subpass() local
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| D | anv_cmd_buffer.c | 865 const struct anv_image_view *iview = in anv_cmd_buffer_get_depth_stencil_view() local
868 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | in anv_cmd_buffer_get_depth_stencil_view()
871 return iview; in anv_cmd_buffer_get_depth_stencil_view()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | evergreen_state.c | 4095 const struct pipe_image_view *iview; in evergreen_set_shader_images() local
4106 iview = &images[idx]; in evergreen_set_shader_images()
4107 image = iview->resource; in evergreen_set_shader_images()
4112 rview->base = *iview; in evergreen_set_shader_images()
4116 evergreen_setup_immed_buffer(rctx, rview, iview->format); in evergreen_set_shader_images()
4132 iview->u.tex.level, in evergreen_set_shader_images()
4133 iview->u.tex.first_layer, in evergreen_set_shader_images()
4134 iview->u.tex.last_layer, in evergreen_set_shader_images()
4135 iview->format, in evergreen_set_shader_images()
4137 color.dim = S_028C78_WIDTH_MAX(u_minify(image->width0, iview->u.tex.level) - 1) | in evergreen_set_shader_images()
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| /external/virglrenderer/src/ |
| D | vrend_renderer.c | 2577 struct vrend_image_view *iview = &ctx->sub->image_views[shader_type][index]; in vrend_set_single_image_view() local
2589 iview->texture = res; in vrend_set_single_image_view()
2590 iview->format = tex_conv_table[format].internalformat; in vrend_set_single_image_view()
2591 iview->access = access; in vrend_set_single_image_view()
2592 iview->u.buf.offset = layer_offset; in vrend_set_single_image_view()
2593 iview->u.buf.size = level_size; in vrend_set_single_image_view()
2596 iview->texture = NULL; in vrend_set_single_image_view()
2597 iview->format = 0; in vrend_set_single_image_view()
3634 struct vrend_image_view *iview; in vrend_draw_bind_images_shader() local
3652 iview = &ctx->sub->image_views[shader_type][i]; in vrend_draw_bind_images_shader()
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