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Searched refs:link_bw (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/board/gdsys/common/
Ddp501.c52 u8 link_bw; in dp501_link_training() local
58 link_bw = 0x0a; in dp501_link_training()
60 link_bw = 0x06; in dp501_link_training()
61 if (link_bw != val) in dp501_link_training()
63 val * 270, link_bw * 270); in dp501_link_training()
64 i2c_reg_write(addr, 0x5d, link_bw); /* set link_bw */ in dp501_link_training()
/external/u-boot/drivers/video/tegra124/
Ddp.c429 link_cfg->link_bw); in tegra_dc_dp_dump_link_cfg()
452 switch (cfg->link_bw) { in _tegra_dp_lower_link_config()
455 cfg->link_bw = SOR_LINK_SPEED_G2_7; in _tegra_dp_lower_link_config()
459 cfg->link_bw = SOR_LINK_SPEED_G1_62; in _tegra_dp_lower_link_config()
463 cfg->link_bw = SOR_LINK_SPEED_G2_7; in _tegra_dp_lower_link_config()
470 debug("dp: Error link rate %d\n", cfg->link_bw); in _tegra_dp_lower_link_config()
485 const u32 link_rate = 27 * link_cfg->link_bw * 1000 * 1000; in tegra_dc_dp_calc_config()
708 link_cfg->link_bw = link_cfg->max_link_bw; in tegra_dc_dp_init_max_link_cfg()
737 u8 link_bw) in tegra_dp_set_link_bandwidth() argument
739 tegra_dc_sor_set_link_bandwidth(sor, link_bw); in tegra_dp_set_link_bandwidth()
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Dsor.c167 reg_val = (link_cfg->link_bw == SOR_LINK_SPEED_G5_4) ? in tegra_dc_sor_set_dp_linkctl()
279 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_dp_mode()
386 void tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw, in tegra_dc_sor_read_link_config() argument
393 *link_bw = (reg_val & CLK_CNTRL_DP_LINK_SPEED_MASK) in tegra_dc_sor_read_link_config()
416 void tegra_dc_sor_set_link_bandwidth(struct udevice *dev, u8 link_bw) in tegra_dc_sor_set_link_bandwidth() argument
422 link_bw << CLK_CNTRL_DP_LINK_SPEED_SHIFT); in tegra_dc_sor_set_link_bandwidth()
842 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_lane_parm()
866 switch (link_cfg->link_bw) { in tegra_dc_sor_set_voltage_swing()
875 debug("Invalid sor link bandwidth: %d\n", link_cfg->link_bw); in tegra_dc_sor_set_voltage_swing()
Dsor.h853 u8 link_bw; member
883 void tegra_dc_sor_set_link_bandwidth(struct udevice *dev, u8 link_bw);
888 void tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw,