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Searched refs:mrc (Results 1 – 25 of 129) sorted by relevance

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/external/u-boot/arch/arm/cpu/armv7/
Dstart.S46 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
71 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
153 mrc p15, 0, r0, c1, c0, 0
166 mrc p15, 0, r0, c1, c0, 0 @ read system control register
172 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
178 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
184 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
189 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
195 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
201 mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR)
[all …]
Dnonsec_virt.S32 mrc p15, 0, \tmp, c0, c1, 1 @ read ID_PFR1
61 mrc p15, 0, r5, c1, c0, 1
68 mrc p15, 0, r5, c1, c0, 1
74 mrc p15, 0, r5, c1, c1, 0 @ read SCR
91 mrc p15, 0, r4, c0, c1, 1 @ read ID_PFR1
116 mrc p15, 4, \addr, c15, c0, 0 @ read CBAR
178 mrc p15, 0, r0, c1, c1, 2
191 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
Dpsci.S158 mrc p15, 0, r7, c1, c1, 0
183 mrc p15, 0, r0, c0, c0, 5 /* read MPIDR */
193 mrc p15, 1, r0, c0, c0, 1 @ read clidr
207 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
240 mrc p15, 0, r0, c1, c0, 1 @ ACTLR
250 mrc p15, 0, r0, c1, c0, 1 @ ACTLR
265 mrc p15, 0, r0, c1, c0, 0 @ SCTLR
/external/u-boot/doc/device-tree-bindings/misc/
Dintel,baytrail-fsp.txt34 - fsp,mrc-debug-msg
51 - fsp,mrc-init-tseg-size
52 - fsp,mrc-init-mmio-size
53 - fsp,mrc-init-spd-addr1
54 - fsp,mrc-init-spd-addr2
102 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
103 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
104 fsp,mrc-init-spd-addr1 = <0xa0>;
105 fsp,mrc-init-spd-addr2 = <0xa2>;
/external/u-boot/arch/arm/mach-rmobile/
Dlowlevel_init_ca15.S14 mrc p15, 0, r4, c0, c0, 5 /* mpidr */
52 mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
58 mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */
72 mrc p15, 0, r0, c1, c0, 1
/external/tcpdump/
Dprint-igmp.c207 u_int mrc; in print_igmpv3_query() local
219 mrc = bp[1]; in print_igmpv3_query()
220 if (mrc < 128) { in print_igmpv3_query()
221 mrt = mrc; in print_igmpv3_query()
223 mrt = ((mrc & 0x0f) | 0x10) << (((mrc & 0x70) >> 4) + 3); in print_igmpv3_query()
225 if (mrc != 100) { in print_igmpv3_query()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/Windows/
Dtls.ll16 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
37 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
58 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
79 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
100 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
121 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
142 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
/external/llvm/test/CodeGen/ARM/Windows/
Dtls.ll16 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
37 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
58 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
79 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
100 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
121 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
142 ; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2
/external/u-boot/arch/x86/dts/
Dgalileo.dts8 #include <dt-bindings/mrc/quark.h>
47 mrc {
48 compatible = "intel,quark-mrc";
143 rw-mrc-cache {
144 label = "rw-mrc-cache";
Dcherryhill.dts151 rw-mrc-cache {
152 label = "rw-mrc-cache";
164 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_4MB>;
165 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
166 fsp,mrc-init-spd-addr1 = <0xa0>;
167 fsp,mrc-init-spd-addr2 = <0xa2>;
Dbayleybay.dts180 rw-mrc-cache {
181 label = "rw-mrc-cache";
239 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
240 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
241 fsp,mrc-init-spd-addr1 = <0xa0>;
242 fsp,mrc-init-spd-addr2 = <0xa2>;
Dbaytrail_som-db5800-som-6867.dts203 rw-mrc-cache {
204 label = "rw-mrc-cache";
262 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
263 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
264 fsp,mrc-init-spd-addr1 = <0xa0>;
265 fsp,mrc-init-spd-addr2 = <0xa2>;
Dminnowmax.dts204 rw-mrc-cache {
205 label = "rw-mrc-cache";
263 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
264 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
265 fsp,mrc-init-spd-addr1 = <0xa0>;
266 fsp,mrc-init-spd-addr2 = <0xa2>;
Ddfi-bt700.dtsi201 rw-mrc-cache {
202 label = "rw-mrc-cache";
260 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
261 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
262 fsp,mrc-init-spd-addr1 = <0xa0>;
263 fsp,mrc-init-spd-addr2 = <0xa2>;
Dconga-qeval20-qa3-e3845.dts190 rw-mrc-cache {
191 label = "rw-mrc-cache";
249 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
250 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
251 fsp,mrc-init-spd-addr1 = <0xa0>;
252 fsp,mrc-init-spd-addr2 = <0xa2>;
/external/llvm/test/CodeGen/ARM/
Dsegmented-stacks.ll20 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
39 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
67 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
86 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
112 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
131 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
157 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
176 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
202 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
221 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
/external/u-boot/arch/arm/cpu/armv7/sunxi/
Dfel_utils.S19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
21 mrc p15, 0, lr, c12, c0, 0 @ Read VBAR
23 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dsegmented-stacks.ll20 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
39 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
67 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
86 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
112 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
131 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
157 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
176 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
202 ; ARM-linux-NEXT: mrc p15, #0, r4, c13, c0, #3
221 ; ARM-android-NEXT: mrc p15, #0, r4, c13, c0, #3
/external/u-boot/arch/arm/mach-uniphier/arm32/
Dlowlevel_init.S23 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
42 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
53 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)
74 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
Dpsci_smp.S14 mrc p15, 0, r1, c1, c0, 0 @ SCTLR (System Control Register)
26 mrc p15, 0, r1, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg)
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dintrinsics.ll6 ; CHECK: mrc
7 %0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
39 declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind
/external/u-boot/arch/arm/cpu/pxa/
Dstart.S107 mrc p15, 0, r0, c1, c0, 0
124 mrc p15, 0, \reg, c2, c0, 0
138 mrc p15, 0, r0, c1, c0, 0
/external/u-boot/arch/arm/cpu/arm926ejs/
Dstart.S79 mrc p15, 0, r15, c7, c10, 3
89 mrc p15, 0, r0, c1, c0, 0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt18 # CHECK: mrc p14
21 # CHECK: mrc p15
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt18 # CHECK: mrc p14
21 # CHECK: mrc p15

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