| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/ScalarEvolution/ |
| D | pr18606.ll | 5 ; CEHCK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
6 ; CHECK: %mul.30 = mul nsw i32 %mul.29, %mul.29
26 %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
27 %mul.1 = mul nsw i32 %mul, %mul
28 %mul.2 = mul nsw i32 %mul.1, %mul.1
29 %mul.3 = mul nsw i32 %mul.2, %mul.2
30 %mul.4 = mul nsw i32 %mul.3, %mul.3
31 %mul.5 = mul nsw i32 %mul.4, %mul.4
32 %mul.6 = mul nsw i32 %mul.5, %mul.5
33 %mul.7 = mul nsw i32 %mul.6, %mul.6
[all …]
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| D | flags-from-poison.ll | 3 ; Positive and negative tests for inferring flags like nsw from
11 ; Example where an add should get the nsw flag, so that a sext can be
13 define void @test-add-nsw(float* %input, i32 %offset, i32 %numIterations) {
14 ; CHECK-LABEL: @test-add-nsw
21 ; CHECK: --> {%offset,+,1}<nsw>
22 %index32 = add nsw i32 %i, %offset
25 ; CHECK: --> {(sext i32 %offset to i64),+,1}<nsw>
29 %nexti = add nsw i32 %i, 1
84 ; With no load to trigger UB from poison, we cannot infer nsw.
94 %index32 = add nsw i32 %i, %offset
[all …]
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| D | cache_loop_exit_limit.ll | 31 %mul = mul nsw i32 %0, %0
37 %add22 = add nsw i32 %add22.sink, 1024
41 %mul.1 = mul nsw i32 %add22.sink, %add22.sink
47 %add22.1 = add nsw i32 %add22.sink.1, 2048
51 %mul.2 = mul nsw i32 %add22.sink.1, %add22.sink.1
57 %add22.2 = add nsw i32 %add22.sink.2, 4096
61 %mul.3 = mul nsw i32 %add22.sink.2, %add22.sink.2
67 %add22.3 = add nsw i32 %add22.sink.3, 8192
71 %mul.4 = mul nsw i32 %add22.sink.3, %add22.sink.3
77 %add22.4 = add nsw i32 %add22.sink.4, 16384
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Bitcode/ |
| D | binaryIntInstructions.3.2.ll | 28 ; CHECK: %res7 = add nsw i1 %x1, %x1
29 %res7 = add nsw i1 %x1, %x1
31 ; CHECK: %res8 = add nuw nsw i1 %x1, %x1
32 %res8 = add nuw nsw i1 %x1, %x1
39 ; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
40 %res1 = add nuw nsw <2 x i8> %x1, %x1
42 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
43 %res2 = add nuw nsw <3 x i8> %x2, %x2
45 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
46 %res3 = add nuw nsw <4 x i8> %x3, %x3
[all …]
|
| /external/llvm/test/Bitcode/ |
| D | binaryIntInstructions.3.2.ll | 28 ; CHECK: %res7 = add nsw i1 %x1, %x1
29 %res7 = add nsw i1 %x1, %x1
31 ; CHECK: %res8 = add nuw nsw i1 %x1, %x1
32 %res8 = add nuw nsw i1 %x1, %x1
39 ; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
40 %res1 = add nuw nsw <2 x i8> %x1, %x1
42 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
43 %res2 = add nuw nsw <3 x i8> %x2, %x2
45 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
46 %res3 = add nuw nsw <4 x i8> %x3, %x3
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | hwloop-phi-subreg.ll | 14 %v1 = add nsw i64 0, %v0
15 %v2 = add nsw i64 %v1, 0
16 %v3 = add nsw i64 %v2, 0
17 %v4 = add nsw i64 %v3, 0
18 %v5 = add nsw i64 %v4, 0
19 %v6 = add nsw i64 %v5, 0
23 %v10 = mul nsw i64 %v9, %v9
24 %v11 = add nsw i64 %v6, %v10
25 %v12 = add nsw i64 %v11, 0
26 %v13 = add nsw i64 0, %v12
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | abs_abs.ll | 7 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
12 %sub = sub nsw i32 0, %x
15 %sub16 = sub nsw i32 0, %cond
23 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X]]
28 %sub = sub nsw <2 x i32> zeroinitializer, %x
31 %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
39 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
44 %sub = sub nsw i32 0, %x
47 %sub16 = sub nsw i32 0, %cond
55 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
[all …]
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| /external/llvm/test/Transforms/InstCombine/ |
| D | abs_abs.ll | 5 %sub = sub nsw i32 0, %x
8 %sub16 = sub nsw i32 0, %cond
13 ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
20 %sub = sub nsw i32 0, %x
23 %sub16 = sub nsw i32 0, %cond
28 ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
35 %sub = sub nsw i32 0, %x
38 %sub16 = sub nsw i32 0, %cond
43 ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
50 %sub = sub nsw i32 0, %x
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | knownbits-recursion.ll | 25 %tmp8 = mul nsw i32 %tmp7, %tmp7
27 %tmp10 = mul nuw nsw i32 %tmp9, %tmp9
29 %tmp12 = mul nuw nsw i32 %tmp11, %tmp11
31 %tmp14 = mul nuw nsw i32 %tmp13, %tmp13
33 %tmp16 = mul nuw nsw i32 %tmp15, %tmp15
35 %tmp18 = mul nuw nsw i32 %tmp17, %tmp17
37 %tmp20 = mul nuw nsw i32 %tmp19, %tmp19
39 %tmp22 = mul nuw nsw i32 %tmp21, %tmp21
41 %tmp24 = mul nuw nsw i32 %tmp23, %tmp23
43 %tmp26 = mul nuw nsw i32 %tmp25, %tmp25
[all …]
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| /external/llvm/test/Analysis/ScalarEvolution/ |
| D | flags-from-poison.ll | 3 ; Positive and negative tests for inferring flags like nsw from
11 ; Example where an add should get the nsw flag, so that a sext can be
13 define void @test-add-nsw(float* %input, i32 %offset, i32 %numIterations) {
14 ; CHECK-LABEL: @test-add-nsw
21 ; CHECK: --> {%offset,+,1}<nsw>
22 %index32 = add nsw i32 %i, %offset
25 ; CHECK: --> {(sext i32 %offset to i64),+,1}<nsw>
29 %nexti = add nsw i32 %i, 1
84 ; With no load to trigger UB from poison, we cannot infer nsw.
94 %index32 = add nsw i32 %i, %offset
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | mul_pow2.ll | 12 %mul = shl nsw i32 %x, 1
20 %mul = mul nsw i32 %x, 3
28 %mul = shl nsw i32 %x, 2
37 %mul = mul nsw i32 %x, 5
46 %mul = mul nsw i32 %x, 6
55 %mul = mul nsw i64 %x, 6
66 %mul = mul nsw i64 %ext, 6
75 %mul = mul nsw i64 %ext, 6
83 %mul = mul nsw i32 %x, 6
92 %mul = mul nsw i32 %x, 6
[all …]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | 2010-11-15-SpillEarlyClobber.ll | 44 %1 = add nsw i32 %0, 0
51 %5 = sub nsw i32 %3, %4
54 %8 = sub nsw i32 %6, %7
57 %11 = sub nsw i32 %9, %10
60 %14 = sub nsw i32 %12, %13
63 %17 = add nsw i32 %16, %15
64 %18 = sub nsw i32 %15, %16
66 %20 = add nsw i32 %19, %2
67 %21 = sub nsw i32 %19, %2
68 %22 = add nsw i32 %14, %5
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | 2010-11-15-SpillEarlyClobber.ll | 43 %1 = add nsw i32 %0, 0
50 %5 = sub nsw i32 %3, %4
53 %8 = sub nsw i32 %6, %7
56 %11 = sub nsw i32 %9, %10
59 %14 = sub nsw i32 %12, %13
62 %17 = add nsw i32 %16, %15
63 %18 = sub nsw i32 %15, %16
65 %20 = add nsw i32 %19, %2
66 %21 = sub nsw i32 %19, %2
67 %22 = add nsw i32 %14, %5
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | 2010-11-15-SpillEarlyClobber.ll | 43 %1 = add nsw i32 %0, 0
50 %5 = sub nsw i32 %3, %4
53 %8 = sub nsw i32 %6, %7
56 %11 = sub nsw i32 %9, %10
59 %14 = sub nsw i32 %12, %13
62 %17 = add nsw i32 %16, %15
63 %18 = sub nsw i32 %15, %16
65 %20 = add nsw i32 %19, %2
66 %21 = sub nsw i32 %19, %2
67 %22 = add nsw i32 %14, %5
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/ |
| D | sdiv.ll | 8 %negx = sub nsw i32 0, %x
17 %negx = sub nsw <2 x i32> zeroinitializer, %x
26 %xy = sub nsw i32 %x, %y
27 %yx = sub nsw i32 %y, %x
36 %xy = sub nsw <2 x i32> %x, %y
37 %yx = sub nsw <2 x i32> %y, %x
47 %negx = sub nsw i32 0, %x
56 %negx = sub nsw i32 0, %x
67 %negx = sub i32 0, %x ; not nsw
74 ; CHECK-NEXT: [[XY:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
[all …]
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| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| D | horizontal.ll | 29 %sub = sub nsw i32 %0, %1
31 %sub3 = sub nsw i32 0, %sub
33 %add = add nsw i32 %sub3.sub, %s.026
38 %sub6 = sub nsw i32 %2, %3
40 %sub9 = sub nsw i32 0, %sub6
42 %add11 = add nsw i32 %add, %v.1
47 %sub14 = sub nsw i32 %4, %5
49 %sub17 = sub nsw i32 0, %sub14
51 %add19 = add nsw i32 %add11, %sub17.sub14
56 %sub22 = sub nsw i32 %6, %7
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/X86/ |
| D | mul_slm_16bit.ll | 35 ; SLM: cost of 3 for VF 4 {{.*}} mul nsw i32
36 %mul = mul nsw i32 %conv3, %conv
39 ; SLM: cost of 5 for VF 4 {{.*}} mul nsw i32
41 %mul2 = mul nsw i32 %conv4, %conv
45 ; SLM: cost of 3 for VF 4 {{.*}} mul nsw i32
47 %mul3 = mul nsw i32 %conv5, %conv4
51 ; SLM: cost of 3 for VF 4 {{.*}} mul nsw i32
52 %mul4 = mul nsw i32 -120, %conv3
56 ; SLM: cost of 5 for VF 4 {{.*}} mul nsw i32
57 %mul5 = mul nsw i32 250, %conv3
[all …]
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| /external/llvm/test/Assembler/ |
| D | flags.ll | 25 ; CHECK: %z = add nsw i64 %x, %y
26 %z = add nsw i64 %x, %y
31 ; CHECK: %z = sub nsw i64 %x, %y
32 %z = sub nsw i64 %x, %y
37 ; CHECK: %z = mul nsw i64 %x, %y
38 %z = mul nsw i64 %x, %y
61 ; CHECK: %z = add nuw nsw i64 %x, %y
62 %z = add nuw nsw i64 %x, %y
67 ; CHECK: %z = sub nuw nsw i64 %x, %y
68 %z = sub nuw nsw i64 %x, %y
[all …]
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| /external/swiftshader/third_party/LLVM/test/Assembler/ |
| D | flags.ll | 24 ; CHECK: %z = add nsw i64 %x, %y
25 %z = add nsw i64 %x, %y
30 ; CHECK: %z = sub nsw i64 %x, %y
31 %z = sub nsw i64 %x, %y
36 ; CHECK: %z = mul nsw i64 %x, %y
37 %z = mul nsw i64 %x, %y
60 ; CHECK: %z = add nuw nsw i64 %x, %y
61 %z = add nuw nsw i64 %x, %y
66 ; CHECK: %z = sub nuw nsw i64 %x, %y
67 %z = sub nuw nsw i64 %x, %y
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Assembler/ |
| D | flags.ll | 25 ; CHECK: %z = add nsw i64 %x, %y
26 %z = add nsw i64 %x, %y
31 ; CHECK: %z = sub nsw i64 %x, %y
32 %z = sub nsw i64 %x, %y
37 ; CHECK: %z = mul nsw i64 %x, %y
38 %z = mul nsw i64 %x, %y
61 ; CHECK: %z = add nuw nsw i64 %x, %y
62 %z = add nuw nsw i64 %x, %y
67 ; CHECK: %z = sub nuw nsw i64 %x, %y
68 %z = sub nuw nsw i64 %x, %y
[all …]
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| /external/llvm/test/Transforms/Reassociate/ |
| D | no-op.ll | 12 %a0 = add nsw i32 %a, 1
13 ; CHECK-NEXT: %a0 = add nsw i32 %a, 1
14 %m0 = mul nsw i32 3, %a
15 ; CHECK-NEXT: %m0 = mul nsw i32 %a, 3
16 %a1 = add nsw i32 %a0, %b
17 ; CHECK-NEXT: %a1 = add nsw i32 %a0, %b
18 %m1 = mul nsw i32 %b, %m0
19 ; CHECK-NEXT: %m1 = mul nsw i32 %m0, %b
27 ; The initial add doesn't change so should not lose the nsw flag.
29 %a0 = add nsw i32 %b, %a
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/ |
| D | no-op.ll | 12 %a0 = add nsw i32 %a, 1
13 ; CHECK-NEXT: %a0 = add nsw i32 %a, 1
14 %m0 = mul nsw i32 3, %a
15 ; CHECK-NEXT: %m0 = mul nsw i32 %a, 3
16 %a1 = add nsw i32 %a0, %b
17 ; CHECK-NEXT: %a1 = add nsw i32 %a0, %b
18 %m1 = mul nsw i32 %b, %m0
19 ; CHECK-NEXT: %m1 = mul nsw i32 %m0, %b
27 ; The initial add doesn't change so should not lose the nsw flag.
29 %a0 = add nsw i32 %b, %a
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/DependenceAnalysis/ |
| D | Propagating.ll | 33 %add = add nsw i64 %i.03, %j.02
34 %add4 = add nsw i64 %i.03, 1
37 %add6 = add nsw i64 %i.03, %j.02
42 %inc = add nsw i64 %j.02, 1
48 %inc10 = add nsw i64 %i.03, 1
89 %add = add nsw i64 %j.03, %k.02
90 %add7 = add nsw i64 %i.05, 1
91 %sub = sub nsw i64 %j.03, %i.05
94 %add10 = add nsw i64 %j.03, %k.02
95 %sub11 = sub nsw i64 %j.03, %i.05
[all …]
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| /external/llvm/test/Analysis/DependenceAnalysis/ |
| D | Propagating.ll | 33 %add = add nsw i64 %i.03, %j.02
34 %add4 = add nsw i64 %i.03, 1
37 %add6 = add nsw i64 %i.03, %j.02
42 %inc = add nsw i64 %j.02, 1
48 %inc10 = add nsw i64 %i.03, 1
88 %add = add nsw i64 %j.03, %k.02
89 %add7 = add nsw i64 %i.05, 1
90 %sub = sub nsw i64 %j.03, %i.05
93 %add10 = add nsw i64 %j.03, %k.02
94 %sub11 = sub nsw i64 %j.03, %i.05
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/AArch64/ |
| D | arbitrary-induction-step.ll | 16 ; CHECK: mul nsw <4 x i32>
17 ; CHECK: mul nsw <4 x i32>
18 ; CHECK: add nsw <4 x i32>
19 ; CHECK: add nsw <4 x i32>
25 ; FORCE-VEC: mul nsw <2 x i32>
26 ; FORCE-VEC: add nsw <2 x i32>
39 %mul = mul nsw i32 %0, %i
40 %add = add nsw i32 %mul, %sum
41 %add1 = add nsw i32 %i, 2
60 ; CHECK: mul nsw <4 x i32>
[all …]
|