| /external/u-boot/arch/x86/cpu/efi/ |
| D | payload.c | 98 int num_banks; in dram_init_banksize() local
108 for (num_banks = 0; in dram_init_banksize()
109 desc < end && num_banks < CONFIG_NR_DRAM_BANKS; in dram_init_banksize()
118 gd->bd->bi_dram[num_banks].start = desc->physical_start; in dram_init_banksize()
119 gd->bd->bi_dram[num_banks].size = desc->num_pages << in dram_init_banksize()
121 num_banks++; in dram_init_banksize()
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| /external/libdrm/radeon/ |
| D | radeon_surface.c | 103 uint32_t num_banks; member
240 surf_man->hw_info.num_banks = 4; in r6_init_hw_info()
243 surf_man->hw_info.num_banks = 8; in r6_init_hw_info()
246 surf_man->hw_info.num_banks = 8; in r6_init_hw_info()
371 xalign = (surf_man->hw_info.group_bytes * surf_man->hw_info.num_banks) / in r6_surface_init_2d()
373 xalign = MAX2(tilew * surf_man->hw_info.num_banks, xalign); in r6_surface_init_2d()
383 surf_man->hw_info.num_banks * in r6_surface_init_2d()
525 surf_man->hw_info.num_banks = 4; in eg_init_hw_info()
528 surf_man->hw_info.num_banks = 8; in eg_init_hw_info()
531 surf_man->hw_info.num_banks = 16; in eg_init_hw_info()
[all …]
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| /external/mesa3d/src/amd/addrlib/inc/chip/r800/ |
| D | si_gb_reg.h | 112 unsigned int num_banks : 2; member
122 unsigned int num_banks : 2; member
132 unsigned int num_banks : 2; member
144 unsigned int num_banks : 2; member
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| /external/u-boot/arch/x86/cpu/intel_common/ |
| D | mrc.c | 56 int num_banks; in mrc_common_dram_init_banksize() local
59 for (i = 0, num_banks = 0; i < info->num_areas; i++) { in mrc_common_dram_init_banksize()
64 gd->bd->bi_dram[num_banks].start = area->start; in mrc_common_dram_init_banksize()
65 gd->bd->bi_dram[num_banks].size = area->size; in mrc_common_dram_init_banksize()
66 num_banks++; in mrc_common_dram_init_banksize()
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| /external/u-boot/drivers/pinctrl/exynos/ |
| D | pinctrl-exynos.h | 54 int num_banks; member
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| /external/u-boot/arch/x86/cpu/broadwell/ |
| D | cpu.c | 462 int num_banks; in configure_mca() local
465 num_banks = msr.lo & 0xff; in configure_mca()
473 for (i = 0; i < num_banks; i++) in configure_mca()
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| /external/u-boot/drivers/pinctrl/meson/ |
| D | pinctrl-meson.h | 35 unsigned int num_banks; member
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| D | pinctrl-meson-gxbb.c | 419 .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
431 .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
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| D | pinctrl-meson-gxl.c | 701 .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks),
713 .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks),
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| D | pinctrl-meson.c | 134 for (i = 0; i < priv->data->num_banks; i++) { in meson_gpio_calc_reg_and_bit()
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| /external/blktrace/iowatcher/ |
| D | blkparse.c | 473 u64 num_banks; in parse_fio_bank_message() local
506 num_banks = strtoll(s, &next, 10); in parse_fio_bank_message()
512 *num_banks_ret = num_banks; in parse_fio_bank_message()
587 u64 num_banks = 0; in find_extreme_offsets() local
605 &offset, &num_banks)) { in find_extreme_offsets()
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| /external/mesa3d/src/amd/common/ |
| D | ac_surface.h | 89 unsigned num_banks:5; /* max 16 */ member
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| D | ac_surface.c | 436 surf->u.legacy.num_banks = csio->pTileInfo->banks; in gfx6_surface_settings()
635 AddrTileInfoIn.banks = surf->u.legacy.num_banks; in gfx6_compute_surface()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_radeon_winsys.h | 140 unsigned num_banks; member
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| D | radv_image.c | 643 metadata->u.legacy.num_banks = surface->u.legacy.num_banks; in radv_init_metadata()
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| /external/kernel-headers/original/uapi/linux/ |
| D | kfd_ioctl.h | 307 __u32 num_banks; /* from KFD */ member
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_winsys.h | 196 unsigned num_banks; member
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| D | r600_texture.c | 344 metadata->u.legacy.num_banks = surface->u.legacy.num_banks; in r600_texture_init_metadata()
372 surf->u.legacy.num_banks = metadata->u.legacy.num_banks; in r600_surface_import_metadata()
1121 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in si_print_texture_info()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_texture.c | 289 metadata->u.legacy.num_banks = surface->u.legacy.num_banks; in r600_texture_init_metadata()
305 surf->u.legacy.num_banks = metadata->u.legacy.num_banks; in r600_surface_import_metadata()
823 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in r600_print_texture_info()
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| /external/u-boot/arch/arm/mach-omap2/ |
| D | emif-common.c | 656 config_reg |= addressing->num_banks << EMIF_REG_IBANK_SHIFT; in get_sdram_config_reg()
690 if (addressing->num_banks == BANKS8) in get_sdram_tim_1_reg()
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| /external/u-boot/drivers/pinctrl/rockchip/ |
| D | pinctrl_rk3188.c | 405 int num_banks; member
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| D | pinctrl_rk3288.c | 25 int num_banks; member
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_bo.c | 523 tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(md->u.legacy.num_banks)-1); in radv_amdgpu_winsys_bo_set_metadata()
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| /external/u-boot/arch/arm/include/asm/ |
| D | emif.h | 1132 u8 num_banks; member
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_bo.c | 1108 md->u.legacy.num_banks = 2 << AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in amdgpu_buffer_get_metadata()
1141 tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(md->u.legacy.num_banks)-1); in amdgpu_buffer_set_metadata()
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