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Searched refs:pfpnacc (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-3dnow.s42 pfpnacc %mm0, %mm2 label
43 pfpnacc (%rax), %mm2 label
115 # CHECK-NEXT: 1 3 1.00 pfpnacc %mm0, %mm2
116 # CHECK-NEXT: 2 9 1.00 * pfpnacc (%rax), %mm2
183 # CHECK-NEXT: - - - 1.00 - - - - pfpnacc %mm0, %mm2
184 # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfpnacc (%rax), %mm2
/external/llvm/test/MC/X86/
D3DNow.s89 pfpnacc %mm2, %mm1 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
D3DNow.s91 pfpnacc %mm2, %mm1 label
/external/swiftshader/third_party/LLVM/test/MC/X86/
D3DNow.s89 pfpnacc %mm2, %mm1 label
/external/capstone/suite/MC/X86/
D3DNow.s.cs28 0x0f,0x0f,0xca,0x8e = pfpnacc %mm2, %mm1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D3dnow-schedule.ll197 ; CHECK-NEXT: pfpnacc %mm1, %mm0 # sched: [3:1.00]
198 ; CHECK-NEXT: pfpnacc (%rdi), %mm0 # sched: [9:1.00]
201 %1 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %a0, x86_mmx %a1)
203 %3 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %1, x86_mmx %2)
207 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
Dstack-folding-3dnow.ll113 ;CHECK: pfpnacc {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
115 %2 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %a, x86_mmx %b) nounwind readnone
118 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll790 ; X86-NEXT: pfpnacc %mm1, %mm2
802 ; X64-NEXT: pfpnacc %mm0, %mm1
809 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %0, x86_mmx %1)
814 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
/external/llvm/test/CodeGen/X86/
Dstack-folding-3dnow.ll113 ;CHECK: pfpnacc {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
115 %2 = call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %a, x86_mmx %b) nounwind readnone
118 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll256 ; CHECK: pfpnacc
260 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %0, x86_mmx %1)
265 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D3dnow-intrinsics.ll256 ; CHECK: pfpnacc
260 %2 = tail call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %0, x86_mmx %1)
265 declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Damd3dnow.txt69 # CHECK: pfpnacc %mm0, %mm2
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86Instr3DNow.td101 defm PFPNACC : I3DNow_binop_rm_int<0x8E, "pfpnacc", "a">;
DX86GenAsmMatcher.inc4302 { X86::PFPNACCrr, "pfpnacc", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0},
4303 { X86::PFPNACCrm, "pfpnacc", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
DX86GenAsmWriter.inc3957 "n\t\000pfmul\t\000pfnacc\t\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000"
DX86GenAsmWriter1.inc3925 "\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000pfrcp\t\000pfrsqit1\t\000p"
/external/llvm/lib/Target/X86/
DX86Instr3DNow.td102 defm PFPNACC : I3DNow_binop_rm_int<0x8E, "pfpnacc", "a">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Instr3DNow.td110 defm PFPNACC : I3DNow_binop_rm_int<0x8E, "pfpnacc", WriteFAdd, 0, "a">;
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen122 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
649 "llvm.x86.3dnowa.pfpnacc",
3750 if (NameR.substr(9, 8) != ".pfpnacc")
3752 return Intrinsic::x86_3dnowa_pfpnacc; // "86.3dnowa.pfpnacc"
6221 case Intrinsic::x86_3dnowa_pfpnacc: // llvm.x86.3dnowa.pfpnacc
7553 case Intrinsic::x86_3dnowa_pfpnacc: // llvm.x86.3dnowa.pfpnacc
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc5426 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc6632 "mpgt\005pfmax\005pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpi"
8517 …{ 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }…
8518 …{ 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR6…
23057 …{ 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }…
23058 …{ 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem6…
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen4442 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
10500 "llvm.x86.3dnowa.pfpnacc",
18440 1, // llvm.x86.3dnowa.pfpnacc
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen4442 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
10500 "llvm.x86.3dnowa.pfpnacc",
18440 1, // llvm.x86.3dnowa.pfpnacc
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen4442 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
10500 "llvm.x86.3dnowa.pfpnacc",
18440 1, // llvm.x86.3dnowa.pfpnacc
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen4436 x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
10460 "llvm.x86.3dnowa.pfpnacc",
18345 1, // llvm.x86.3dnowa.pfpnacc

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