Home
last modified time | relevance | path

Searched refs:pfsubr (Results 1 – 25 of 32) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-3dnow.s63 pfsubr %mm0, %mm2 label
64 pfsubr (%rax), %mm2 label
129 # CHECK-NEXT: 1 3 1.00 pfsubr %mm0, %mm2
130 # CHECK-NEXT: 2 9 1.00 * pfsubr (%rax), %mm2
197 # CHECK-NEXT: - - - 1.00 - - - - pfsubr %mm0, %mm2
198 # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfsubr (%rax), %mm2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dcommute-3dnow.ll42 ; X32-NEXT: pfsubr (%ecx), %mm0
50 ; X64-NEXT: pfsubr (%rdx), %mm0
70 ; X32-NEXT: pfsubr (%eax), %mm0
78 ; X64-NEXT: pfsubr (%rsi), %mm0
85 %4 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %1, x86_mmx %2)
86 %5 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %3, x86_mmx %4)
90 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx)
D3dnow-schedule.ll302 ; CHECK-NEXT: pfsubr %mm1, %mm0 # sched: [3:1.00]
303 ; CHECK-NEXT: pfsubr (%rdi), %mm0 # sched: [9:1.00]
306 %1 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %a0, x86_mmx %a1)
308 %3 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %1, x86_mmx %2)
312 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
Dstack-folding-3dnow.ll176 ;CHECK: pfsubr {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
178 %2 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %a, x86_mmx %b) nounwind readnone
181 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll619 ; X86-NEXT: pfsubr %mm1, %mm2
631 ; X64-NEXT: pfsubr %mm0, %mm1
638 %2 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %0, x86_mmx %1)
643 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
/external/llvm/test/MC/X86/
D3DNow.s61 pfsubr %mm2, %mm1 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
D3DNow.s61 pfsubr %mm2, %mm1 label
/external/swiftshader/third_party/LLVM/test/MC/X86/
D3DNow.s61 pfsubr %mm2, %mm1 label
/external/capstone/suite/MC/X86/
D3DNow.s.cs20 0x0f,0x0f,0xca,0xaa = pfsubr %mm2, %mm1
/external/llvm/test/CodeGen/X86/
Dstack-folding-3dnow.ll176 ;CHECK: pfsubr {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
178 %2 = call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %a, x86_mmx %b) nounwind readnone
181 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll195 ; CHECK: pfsubr
199 %2 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %0, x86_mmx %1)
204 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D3dnow-intrinsics.ll195 ; CHECK: pfsubr
199 %2 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %0, x86_mmx %1)
204 declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Damd3dnow.txt63 # CHECK: pfsubr %mm2, %mm1
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86Instr3DNow.td82 defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr">;
DX86GenAsmMatcher.inc4316 { X86::PFSUBRrr, "pfsubr", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0},
4317 { X86::PFSUBRrm, "pfsubr", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
DX86GenAsmWriter.inc3958 "pfrcp\t\000pfrsqit1\t\000pfrsqrt\t\000pfsubr\t\000pfsub\t\000phminposuw"
DX86GenAsmWriter1.inc3926 "frsqrt\t\000pfsubr\t\000pfsub\t\000phminposuw\t\000pi2fd\t\000pi2fw\t\000"
/external/llvm/lib/Target/X86/
DX86Instr3DNow.td82 defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Instr3DNow.td73 defm PFSUBR : I3DNow_binop_rm_int<0xAA, "pfsubr", WriteFAdd, 1>;
/external/mesa3d/src/mesa/x86-64/
Dxform4.S336 pfsubr %mm7, %mm3 /* | -x2 */
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen117 x86_3dnow_pfsubr, // llvm.x86.3dnow.pfsubr
644 "llvm.x86.3dnow.pfsubr",
2624 if (NameR.substr(9, 6) != "pfsubr")
2626 return Intrinsic::x86_3dnow_pfsubr; // "86.3dnow.pfsubr"
6218 case Intrinsic::x86_3dnow_pfsubr: // llvm.x86.3dnow.pfsubr
7550 case Intrinsic::x86_3dnow_pfsubr: // llvm.x86.3dnow.pfsubr
/external/mesa3d/src/mesa/x86/
Dassyntax.h1608 #define PFSUBR(a, b) pfsubr P_ARG2(a, b)
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc5421 x86_3dnow_pfsubr, // llvm.x86.3dnow.pfsubr
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc6633 "t1\010pfrcpit2\010pfrsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007p"
8531 …{ 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, …
8532 …{ 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 …
23071 …{ 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, …
23072 …{ 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 …

12