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Searched refs:phys_level0_sa (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/intel/isl/
Disl.c437 const struct isl_extent4d *phys_level0_sa) in isl_choose_array_pitch_span() argument
469 if (phys_level0_sa->array_len == 1) { in isl_choose_array_pitch_span()
518 assert(phys_level0_sa->array_len == 1); in isl_choose_array_pitch_span()
522 if (phys_level0_sa->array_len == 1) { in isl_choose_array_pitch_span()
674 struct isl_extent4d *phys_level0_sa) in isl_calc_phys_level0_extent_sa() argument
694 *phys_level0_sa = (struct isl_extent4d) { in isl_calc_phys_level0_extent_sa()
719 *phys_level0_sa = (struct isl_extent4d) { in isl_calc_phys_level0_extent_sa()
733 *phys_level0_sa = (struct isl_extent4d) { in isl_calc_phys_level0_extent_sa()
746 *phys_level0_sa = (struct isl_extent4d) { in isl_calc_phys_level0_extent_sa()
754 &phys_level0_sa->w, in isl_calc_phys_level0_extent_sa()
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Disl.h1147 struct isl_extent4d phys_level0_sa; member
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_fbo.c660 const unsigned d_width = depth_mt->surf.phys_level0_sa.width; in intel_validate_framebuffer()
661 const unsigned d_height = depth_mt->surf.phys_level0_sa.height; in intel_validate_framebuffer()
663 depth_mt->surf.phys_level0_sa.depth : in intel_validate_framebuffer()
664 depth_mt->surf.phys_level0_sa.array_len; in intel_validate_framebuffer()
666 const unsigned s_width = stencil_mt->surf.phys_level0_sa.width; in intel_validate_framebuffer()
667 const unsigned s_height = stencil_mt->surf.phys_level0_sa.height; in intel_validate_framebuffer()
669 stencil_mt->surf.phys_level0_sa.depth : in intel_validate_framebuffer()
670 stencil_mt->surf.phys_level0_sa.array_len; in intel_validate_framebuffer()
Dbrw_clear.c154 (minify(mt->surf.phys_level0_sa.width, in brw_fast_clear_depth()
Dintel_mipmap_tree.c446 return surf->phys_level0_sa.array_len; in get_num_phys_layers()
449 return minify(surf->phys_level0_sa.array_len, level); in get_num_phys_layers()
451 return minify(surf->phys_level0_sa.depth, level); in get_num_phys_layers()
1542 unsigned width = minify(src_mt->surf.phys_level0_sa.width, in intel_miptree_copy_slice()
1544 unsigned height = minify(src_mt->surf.phys_level0_sa.height, in intel_miptree_copy_slice()
1803 uint32_t width = minify(mt->surf.phys_level0_sa.width, level); in intel_miptree_level_enable_hiz()
1804 uint32_t height = minify(mt->surf.phys_level0_sa.height, level); in intel_miptree_level_enable_hiz()
2993 minify(src->surf.phys_level0_sa.depth, level) : in intel_update_r8stencil()
2994 src->surf.phys_level0_sa.array_len; in intel_update_r8stencil()
Dintel_blit.c356 const unsigned h0 = src_mt->surf.phys_level0_sa.height; in intel_miptree_blit()
361 const unsigned h0 = dst_mt->surf.phys_level0_sa.height; in intel_miptree_blit()
Dintel_screen.c443 image->width = minify(mt->surf.phys_level0_sa.width, in intel_setup_image_from_mipmap_tree()
445 image->height = minify(mt->surf.phys_level0_sa.height, in intel_setup_image_from_mipmap_tree()
Dbrw_blorp.c1059 apply_y_flip(&y0, &y1, minify(src_mt->surf.phys_level0_sa.height, in brw_blorp_download_miptree()
/external/mesa3d/src/intel/blorp/
Dblorp_blit.c1432 info->surf.phys_level0_sa.w += info->tile_x_sa; in blorp_surf_convert_to_single_slice()
1433 info->surf.phys_level0_sa.h += info->tile_y_sa; in blorp_surf_convert_to_single_slice()
1452 info->surf.logical_level0_px = info->surf.phys_level0_sa; in surf_fake_interleaved_msaa()
1558 info->surf.phys_level0_sa.width *= 3; in surf_fake_rgb_with_red()
1950 info->surf.phys_level0_sa.width = size * px_size_sa.w; in shrink_surface_params()
1954 info->surf.phys_level0_sa.height = size * px_size_sa.h; in shrink_surface_params()
2379 assert(info->surf.phys_level0_sa.width % fmtl->bw == 0); in blorp_surf_convert_to_uncompressed()
2380 assert(info->surf.phys_level0_sa.height % fmtl->bh == 0); in blorp_surf_convert_to_uncompressed()
2381 info->surf.phys_level0_sa.width /= fmtl->bw; in blorp_surf_convert_to_uncompressed()
2382 info->surf.phys_level0_sa.height /= fmtl->bh; in blorp_surf_convert_to_uncompressed()
/external/mesa3d/src/intel/isl/tests/
Disl_surf_get_image_offset_test.c100 t_assert_extent4d(&surf->phys_level0_sa, width, height, depth, array_len); in t_assert_phys_level0_sa()
/external/mesa3d/src/intel/vulkan/
Danv_image.c1008 tmp_surf.phys_level0_sa.width /= fmtl->bw; in anv_image_fill_surface_state()
1009 tmp_surf.phys_level0_sa.height /= fmtl->bh; in anv_image_fill_surface_state()