| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/ |
| D | resources-3dnow.s | 72 pmulhrw %mm0, %mm2 label
73 pmulhrw (%rax), %mm2 label
135 # CHECK-NEXT: 1 5 1.00 pmulhrw %mm0, %mm2
136 # CHECK-NEXT: 2 10 1.00 * pmulhrw (%rax), %mm2
203 # CHECK-NEXT: - - 1.00 - - - - - pmulhrw %mm0, %mm2
204 # CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhrw (%rax), %mm2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | commute-3dnow.ll | 250 ; X32-NEXT: pmulhrw (%eax), %mm0
251 ; X32-NEXT: pmulhrw (%ecx), %mm0
258 ; X64-NEXT: pmulhrw (%rsi), %mm0
259 ; X64-NEXT: pmulhrw (%rdx), %mm0
265 %4 = tail call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %1, x86_mmx %2)
266 %5 = tail call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %3, x86_mmx %4)
270 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx)
|
| D | 3dnow-schedule.ll | 347 ; CHECK-NEXT: pmulhrw %mm1, %mm0 # sched: [5:1.00]
348 ; CHECK-NEXT: pmulhrw (%rdi), %mm0 # sched: [10:1.00]
351 %1 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %a0, x86_mmx %a1)
353 %3 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %1, x86_mmx %2)
357 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| D | stack-folding-3dnow.ll | 203 ;CHECK: pmulhrw {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
205 %2 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %a, x86_mmx %b) nounwind readnone
208 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| D | 3dnow-intrinsics.ll | 680 ; X86-NEXT: pmulhrw %mm1, %mm0
686 ; X64-NEXT: pmulhrw %mm1, %mm0
696 %4 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %2, x86_mmx %3)
701 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| /external/llvm/test/MC/X86/ |
| D | 3DNow.s | 67 pmulhrw %mm2, %mm1 label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | 3DNow.s | 67 pmulhrw %mm2, %mm1 label
|
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| D | 3DNow.s | 67 pmulhrw %mm2, %mm1 label
|
| /external/capstone/suite/MC/X86/ |
| D | 3DNow.s.cs | 22 0x0f,0x0f,0xca,0xb7 = pmulhrw %mm2, %mm1
|
| /external/llvm/test/CodeGen/X86/ |
| D | stack-folding-3dnow.ll | 203 ;CHECK: pmulhrw {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
205 %2 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %a, x86_mmx %b) nounwind readnone
208 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| D | 3dnow-intrinsics.ll | 219 ; CHECK: pmulhrw
225 %4 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %2, x86_mmx %3)
230 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | 3dnow-intrinsics.ll | 219 ; CHECK: pmulhrw
225 %4 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %2, x86_mmx %3)
230 declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/ |
| D | amd3dnow.txt | 42 # CHECK: pmulhrw %mm3, %mm0
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86Instr3DNow.td | 84 defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw">;
|
| D | X86GenAsmMatcher.inc | 4430 { X86::PMULHRWrr, "pmulhrw", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0},
4431 { X86::PMULHRWrm, "pmulhrw", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
|
| D | X86GenAsmWriter.inc | 3963 "movzxdq\t\000pmovzxwd\t\000pmovzxwq\t\000pmuldq\t\000pmulhrw\t\000pmull"
|
| D | X86GenAsmWriter1.inc | 3931 "ovzxwq\t\000pmuldq\t\000pmulhrw\t\000pmulld\t\000pop\t\000popa\000popcn"
|
| /external/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 84 defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 75 defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", SchedWriteVecIMul.MMX, 1>;
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 1623 #define PMULHRW(a, b) pmulhrw P_ARG2(a, b)
|
| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Intrinsics.gen | 119 x86_3dnow_pmulhrw, // llvm.x86.3dnow.pmulhrw
646 "llvm.x86.3dnow.pmulhrw",
3244 return Intrinsic::x86_3dnow_pmulhrw; // "86.3dnow.pmulhrw"
6219 case Intrinsic::x86_3dnow_pmulhrw: // llvm.x86.3dnow.pmulhrw
7551 case Intrinsic::x86_3dnow_pmulhrw: // llvm.x86.3dnow.pmulhrw
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
| D | IntrinsicEnums.inc | 5423 x86_3dnow_pmulhrw, // llvm.x86.3dnow.pmulhrw
|
| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| D | testfile45.expect.bz2 | |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 6640 "mulhrsw\007pmulhrw\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003"
8645 …{ 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }…
8646 …{ 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR6…
23185 …{ 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }…
23186 …{ 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem6…
|