Searched refs:regs_written (Results 1 – 16 of 16) sorted by relevance
95 for (unsigned i = 0; i < regs_written(inst); i++) in dead_code_eliminate()113 for (unsigned i = 0; i < regs_written(inst); i++) { in dead_code_eliminate()
202 unsigned written = regs_written(inst); in create_copy_instr()237 assert(regs_written(copy) == written); in create_copy_instr()287 int written = regs_written(entry->generator); in opt_cse_local()
1048 for (unsigned r = 0; r < regs_written(inst); r++) { in calculate_deps()1053 for (unsigned r = 0; r < regs_written(inst); r++) { in calculate_deps()1075 for (unsigned r = 0; r < regs_written(inst); r++) in calculate_deps()1176 for (unsigned r = 0; r < regs_written(inst); r++) in calculate_deps()1179 for (unsigned r = 0; r < regs_written(inst); r++) { in calculate_deps()1199 for (unsigned r = 0; r < regs_written(inst); r++) in calculate_deps()1295 for (unsigned j = 0; j < regs_written(inst); ++j) { in calculate_deps()1376 for (unsigned j = 0; j < regs_written(inst); ++j) in calculate_deps()
46 fsv_assert(inst->dst.offset / REG_SIZE + regs_written(inst) <= in validate()
197 channels_remaining -= regs_written(inst); in register_coalesce()213 channels_remaining -= regs_written(inst); in register_coalesce()
829 spill_costs[inst->dst.nr] += regs_written(inst) * block_scale; in choose_spill_reg()946 fs_reg spill_src(VGRF, alloc.allocate(regs_written(inst))); in spill_reg()992 regs_written(inst)); in spill_reg()995 subset_spill_offset, regs_written(inst)); in spill_reg()
183 regs_written(entry->generator)), in opt_cse_local()
1767 for (unsigned j = 1; j < regs_written(inst); j++) in split_virtual_grfs()2734 remap[dst] = alloc.allocate(regs_written(inst)); in opt_register_renaming()3254 int write_len = regs_written(inst); in insert_gen4_pre_send_dependency_workarounds()3287 for (unsigned i = 0; i < regs_written(scan_inst); i++) { in insert_gen4_pre_send_dependency_workarounds()3325 int write_len = regs_written(inst); in insert_gen4_post_send_dependency_workarounds()3637 low = fs_reg(VGRF, alloc.allocate(regs_written(inst)), in lower_integer_multiplication()3644 fs_reg high(VGRF, alloc.allocate(regs_written(inst)), in lower_integer_multiplication()3922 payload.nr = bld.shader->alloc.allocate(regs_written(load)); in lower_fb_write_logical_send()3943 inst->mlen = regs_written(load); in lower_fb_write_logical_send()4216 if (!inst->eot && regs_written(inst) != 4 * reg_width) { in lower_sampler_logical_send_gen7()[all …]
134 for (unsigned j = 0; j < regs_written(inst); j++) { in setup_def_use()
413 regs_written(const vec4_instruction *inst) in regs_written() function
423 regs_written(const fs_inst *inst) in regs_written() function
516 p.require_contiguous(reg_of(inst->dst), regs_written(inst)); in shader_reg_partitioning()
1492 if (inst->dst.file == VGRF && regs_written(inst) > 1) in split_virtual_grfs()
53 bool regs_written[MAX_NUM_PASSES_ATI][MAX_NUM_FRAGMENT_REGISTERS_ATI]; member129 if (t->regs_written[t->current_pass][src_type - GL_REG_0_ATI]) { in get_source()323 if (t->regs_written[0][reg]) { in compile_setupinst()341 t->regs_written[t->current_pass][r] = true; in compile_setupinst()396 t->regs_written[t->current_pass][dstreg] = true; in compile_instruction()406 if (t->regs_written[numPasses-1][0]) { in finalize_shader()
136 info->regs_written = 0; in ir2_shader_assemble()513 info->regs_written |= (1 << reg->num); in reg_update_stats()514 } else if (!(info->regs_written & (1 << reg->num))) { in reg_update_stats()
40 uint64_t regs_written; member