/external/llvm/test/CodeGen/AMDGPU/ |
D | uniform-cfg.ll | 62 ; SI-DAG: s_cmp_lg_i32 s{{[0-9]+}}, 0 170 ; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 199 ; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 312 ; SI: s_cmp_lg_i32 {{s[0-9]+}}, 0 336 ; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 371 ; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0
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D | skip-if-dead.ll | 90 ; CHECK: s_cmp_lg_i32 s{{[0-9]+}}, 0 140 ; CHECK: s_cmp_lg_i32 s{{[0-9]+}}, 0
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D | indirect-addressing-si.ll | 318 ; CHECK: s_cmp_lg_i32 357 ; CHECK: s_cmp_lg_i32
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/external/llvm/test/MC/AMDGPU/ |
D | sopc.s | 12 s_cmp_lg_i32 s1, s2 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | sopc.s | 12 s_cmp_lg_i32 s1, s2 label
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D | gfx7_asm_all.s | 20424 s_cmp_lg_i32 s1, s2 label 20427 s_cmp_lg_i32 s103, s2 label 20430 s_cmp_lg_i32 flat_scratch_lo, s2 label 20433 s_cmp_lg_i32 flat_scratch_hi, s2 label 20436 s_cmp_lg_i32 vcc_lo, s2 label 20439 s_cmp_lg_i32 vcc_hi, s2 label 20442 s_cmp_lg_i32 tba_lo, s2 label 20445 s_cmp_lg_i32 tba_hi, s2 label 20448 s_cmp_lg_i32 tma_lo, s2 label 20451 s_cmp_lg_i32 tma_hi, s2 label [all …]
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D | gfx8_asm_all.s | 21198 s_cmp_lg_i32 s1, s2 label 21201 s_cmp_lg_i32 s101, s2 label 21204 s_cmp_lg_i32 flat_scratch_lo, s2 label 21207 s_cmp_lg_i32 flat_scratch_hi, s2 label 21210 s_cmp_lg_i32 vcc_lo, s2 label 21213 s_cmp_lg_i32 vcc_hi, s2 label 21216 s_cmp_lg_i32 tba_lo, s2 label 21219 s_cmp_lg_i32 tba_hi, s2 label 21222 s_cmp_lg_i32 tma_lo, s2 label 21225 s_cmp_lg_i32 tma_hi, s2 label [all …]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sopc_vi.txt | 6 # GCN: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | sopc_vi.txt | 6 # GCN: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf]
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D | gfx8_dasm_all.txt | 17934 # CHECK: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf] 17937 # CHECK: s_cmp_lg_i32 s101, s2 ; encoding: [0x65,0x02,0x01,0xbf] 17940 # CHECK: s_cmp_lg_i32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x01,0xbf] 17943 # CHECK: s_cmp_lg_i32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x01,0xbf] 17946 # CHECK: s_cmp_lg_i32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x01,0xbf] 17949 # CHECK: s_cmp_lg_i32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x01,0xbf] 17952 # CHECK: s_cmp_lg_i32 tba_lo, s2 ; encoding: [0x6c,0x02,0x01,0xbf] 17955 # CHECK: s_cmp_lg_i32 tba_hi, s2 ; encoding: [0x6d,0x02,0x01,0xbf] 17958 # CHECK: s_cmp_lg_i32 tma_lo, s2 ; encoding: [0x6e,0x02,0x01,0xbf] 17961 # CHECK: s_cmp_lg_i32 tma_hi, s2 ; encoding: [0x6f,0x02,0x01,0xbf] [all …]
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D | gfx9_dasm_all.txt | 16725 # CHECK: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf] 16728 # CHECK: s_cmp_lg_i32 s101, s2 ; encoding: [0x65,0x02,0x01,0xbf] 16731 # CHECK: s_cmp_lg_i32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x01,0xbf] 16734 # CHECK: s_cmp_lg_i32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x01,0xbf] 16737 # CHECK: s_cmp_lg_i32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x01,0xbf] 16740 # CHECK: s_cmp_lg_i32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x01,0xbf] 16743 # CHECK: s_cmp_lg_i32 m0, s2 ; encoding: [0x7c,0x02,0x01,0xbf] 16746 # CHECK: s_cmp_lg_i32 exec_lo, s2 ; encoding: [0x7e,0x02,0x01,0xbf] 16749 # CHECK: s_cmp_lg_i32 exec_hi, s2 ; encoding: [0x7f,0x02,0x01,0xbf] 16752 # CHECK: s_cmp_lg_i32 0, s2 ; encoding: [0x80,0x02,0x01,0xbf] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 627 def S_CMPK_LG_I32 : SOPK_SCC <"s_cmpk_lg_i32", "s_cmp_lg_i32", 1>; 760 def S_CMP_LG_I32 : SOPC_CMP_32 <0x01, "s_cmp_lg_i32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 485 s_cmp_lg_i32 src0, src1
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D | AMDGPUAsmGFX8.rst | 505 s_cmp_lg_i32 src0, src1
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D | AMDGPUAsmGFX9.rst | 657 s_cmp_lg_i32 src0, src1
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 330 def S_CMP_LG_I32 : SOPC_CMP_32 <0x00000001, "s_cmp_lg_i32", COND_NE>;
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