/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | uniform-cfg.ll | 61 ; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0 168 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0 197 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0 284 ; SI: s_cmp_lg_u32 [[I]], 0 306 ; GCN: s_cmp_lg_u32 {{s[0-9]+}}, 0 332 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0 366 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
|
D | early-if-convert.ll | 249 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1 270 ; GCN: s_cmp_lg_u32 296 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1 320 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1 345 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1 365 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
|
D | si-lower-control-flow-unreachable-block.ll | 55 ; GCN: s_cmp_lg_u32
|
D | indirect-addressing-si-noopt.ll | 25 ; CHECK: s_cmp_lg_u32
|
D | skip-if-dead.ll | 98 ; CHECK: s_cmp_lg_u32 s{{[0-9]+}}, 0 148 ; CHECK: s_cmp_lg_u32 s{{[0-9]+}}, 0
|
D | sgpr-control-flow.ll | 37 ; SI: s_cmp_lg_u32
|
D | spill-m0.ll | 13 ; GCN-DAG: s_cmp_lg_u32
|
D | nested-loop-conditions.ll | 62 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
|
D | branch-relaxation.ll | 399 ; GCN: s_cmp_lg_u32
|
/external/llvm/test/MC/AMDGPU/ |
D | sopc.s | 30 s_cmp_lg_u32 s1, s2 label
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | sopc.s | 30 s_cmp_lg_u32 s1, s2 label
|
D | gfx7_asm_all.s | 21126 s_cmp_lg_u32 s1, s2 label 21129 s_cmp_lg_u32 s103, s2 label 21132 s_cmp_lg_u32 flat_scratch_lo, s2 label 21135 s_cmp_lg_u32 flat_scratch_hi, s2 label 21138 s_cmp_lg_u32 vcc_lo, s2 label 21141 s_cmp_lg_u32 vcc_hi, s2 label 21144 s_cmp_lg_u32 tba_lo, s2 label 21147 s_cmp_lg_u32 tba_hi, s2 label 21150 s_cmp_lg_u32 tma_lo, s2 label 21153 s_cmp_lg_u32 tma_hi, s2 label [all …]
|
D | gfx8_asm_all.s | 21900 s_cmp_lg_u32 s1, s2 label 21903 s_cmp_lg_u32 s101, s2 label 21906 s_cmp_lg_u32 flat_scratch_lo, s2 label 21909 s_cmp_lg_u32 flat_scratch_hi, s2 label 21912 s_cmp_lg_u32 vcc_lo, s2 label 21915 s_cmp_lg_u32 vcc_hi, s2 label 21918 s_cmp_lg_u32 tba_lo, s2 label 21921 s_cmp_lg_u32 tba_hi, s2 label 21924 s_cmp_lg_u32 tma_lo, s2 label 21927 s_cmp_lg_u32 tma_hi, s2 label [all …]
|
/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sopc_vi.txt | 24 # GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | sopc_vi.txt | 24 # GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
|
D | gfx8_dasm_all.txt | 18636 # CHECK: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf] 18639 # CHECK: s_cmp_lg_u32 s101, s2 ; encoding: [0x65,0x02,0x07,0xbf] 18642 # CHECK: s_cmp_lg_u32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x07,0xbf] 18645 # CHECK: s_cmp_lg_u32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x07,0xbf] 18648 # CHECK: s_cmp_lg_u32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x07,0xbf] 18651 # CHECK: s_cmp_lg_u32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x07,0xbf] 18654 # CHECK: s_cmp_lg_u32 tba_lo, s2 ; encoding: [0x6c,0x02,0x07,0xbf] 18657 # CHECK: s_cmp_lg_u32 tba_hi, s2 ; encoding: [0x6d,0x02,0x07,0xbf] 18660 # CHECK: s_cmp_lg_u32 tma_lo, s2 ; encoding: [0x6e,0x02,0x07,0xbf] 18663 # CHECK: s_cmp_lg_u32 tma_hi, s2 ; encoding: [0x6f,0x02,0x07,0xbf] [all …]
|
D | gfx9_dasm_all.txt | 17247 # CHECK: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf] 17250 # CHECK: s_cmp_lg_u32 s101, s2 ; encoding: [0x65,0x02,0x07,0xbf] 17253 # CHECK: s_cmp_lg_u32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x07,0xbf] 17256 # CHECK: s_cmp_lg_u32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x07,0xbf] 17259 # CHECK: s_cmp_lg_u32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x07,0xbf] 17262 # CHECK: s_cmp_lg_u32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x07,0xbf] 17265 # CHECK: s_cmp_lg_u32 m0, s2 ; encoding: [0x7c,0x02,0x07,0xbf] 17268 # CHECK: s_cmp_lg_u32 exec_lo, s2 ; encoding: [0x7e,0x02,0x07,0xbf] 17271 # CHECK: s_cmp_lg_u32 exec_hi, s2 ; encoding: [0x7f,0x02,0x07,0xbf] 17274 # CHECK: s_cmp_lg_u32 0, s2 ; encoding: [0x80,0x02,0x07,0xbf] [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 635 def S_CMPK_LG_U32 : SOPK_SCC <"s_cmpk_lg_u32", "s_cmp_lg_u32", 0>; 766 def S_CMP_LG_U32 : SOPC_CMP_32 <0x07, "s_cmp_lg_u32", COND_NE>;
|
/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 486 s_cmp_lg_u32 src0, src1
|
D | AMDGPUAsmGFX8.rst | 506 s_cmp_lg_u32 src0, src1
|
D | AMDGPUAsmGFX9.rst | 658 s_cmp_lg_u32 src0, src1
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 336 def S_CMP_LG_U32 : SOPC_CMP_32 <0x00000007, "s_cmp_lg_u32", COND_NE >;
|