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Searched refs:s_cmp_lg_u32 (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Duniform-cfg.ll61 ; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0
168 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
197 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
284 ; SI: s_cmp_lg_u32 [[I]], 0
306 ; GCN: s_cmp_lg_u32 {{s[0-9]+}}, 0
332 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
366 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
Dearly-if-convert.ll249 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
270 ; GCN: s_cmp_lg_u32
296 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
320 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
345 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
365 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0
Dsi-lower-control-flow-unreachable-block.ll55 ; GCN: s_cmp_lg_u32
Dindirect-addressing-si-noopt.ll25 ; CHECK: s_cmp_lg_u32
Dskip-if-dead.ll98 ; CHECK: s_cmp_lg_u32 s{{[0-9]+}}, 0
148 ; CHECK: s_cmp_lg_u32 s{{[0-9]+}}, 0
Dsgpr-control-flow.ll37 ; SI: s_cmp_lg_u32
Dspill-m0.ll13 ; GCN-DAG: s_cmp_lg_u32
Dnested-loop-conditions.ll62 ; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1
Dbranch-relaxation.ll399 ; GCN: s_cmp_lg_u32
/external/llvm/test/MC/AMDGPU/
Dsopc.s30 s_cmp_lg_u32 s1, s2 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dsopc.s30 s_cmp_lg_u32 s1, s2 label
Dgfx7_asm_all.s21126 s_cmp_lg_u32 s1, s2 label
21129 s_cmp_lg_u32 s103, s2 label
21132 s_cmp_lg_u32 flat_scratch_lo, s2 label
21135 s_cmp_lg_u32 flat_scratch_hi, s2 label
21138 s_cmp_lg_u32 vcc_lo, s2 label
21141 s_cmp_lg_u32 vcc_hi, s2 label
21144 s_cmp_lg_u32 tba_lo, s2 label
21147 s_cmp_lg_u32 tba_hi, s2 label
21150 s_cmp_lg_u32 tma_lo, s2 label
21153 s_cmp_lg_u32 tma_hi, s2 label
[all …]
Dgfx8_asm_all.s21900 s_cmp_lg_u32 s1, s2 label
21903 s_cmp_lg_u32 s101, s2 label
21906 s_cmp_lg_u32 flat_scratch_lo, s2 label
21909 s_cmp_lg_u32 flat_scratch_hi, s2 label
21912 s_cmp_lg_u32 vcc_lo, s2 label
21915 s_cmp_lg_u32 vcc_hi, s2 label
21918 s_cmp_lg_u32 tba_lo, s2 label
21921 s_cmp_lg_u32 tba_hi, s2 label
21924 s_cmp_lg_u32 tma_lo, s2 label
21927 s_cmp_lg_u32 tma_hi, s2 label
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsopc_vi.txt24 # GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dsopc_vi.txt24 # GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
Dgfx8_dasm_all.txt18636 # CHECK: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
18639 # CHECK: s_cmp_lg_u32 s101, s2 ; encoding: [0x65,0x02,0x07,0xbf]
18642 # CHECK: s_cmp_lg_u32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x07,0xbf]
18645 # CHECK: s_cmp_lg_u32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x07,0xbf]
18648 # CHECK: s_cmp_lg_u32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x07,0xbf]
18651 # CHECK: s_cmp_lg_u32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x07,0xbf]
18654 # CHECK: s_cmp_lg_u32 tba_lo, s2 ; encoding: [0x6c,0x02,0x07,0xbf]
18657 # CHECK: s_cmp_lg_u32 tba_hi, s2 ; encoding: [0x6d,0x02,0x07,0xbf]
18660 # CHECK: s_cmp_lg_u32 tma_lo, s2 ; encoding: [0x6e,0x02,0x07,0xbf]
18663 # CHECK: s_cmp_lg_u32 tma_hi, s2 ; encoding: [0x6f,0x02,0x07,0xbf]
[all …]
Dgfx9_dasm_all.txt17247 # CHECK: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
17250 # CHECK: s_cmp_lg_u32 s101, s2 ; encoding: [0x65,0x02,0x07,0xbf]
17253 # CHECK: s_cmp_lg_u32 flat_scratch_lo, s2 ; encoding: [0x66,0x02,0x07,0xbf]
17256 # CHECK: s_cmp_lg_u32 flat_scratch_hi, s2 ; encoding: [0x67,0x02,0x07,0xbf]
17259 # CHECK: s_cmp_lg_u32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x07,0xbf]
17262 # CHECK: s_cmp_lg_u32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x07,0xbf]
17265 # CHECK: s_cmp_lg_u32 m0, s2 ; encoding: [0x7c,0x02,0x07,0xbf]
17268 # CHECK: s_cmp_lg_u32 exec_lo, s2 ; encoding: [0x7e,0x02,0x07,0xbf]
17271 # CHECK: s_cmp_lg_u32 exec_hi, s2 ; encoding: [0x7f,0x02,0x07,0xbf]
17274 # CHECK: s_cmp_lg_u32 0, s2 ; encoding: [0x80,0x02,0x07,0xbf]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td635 def S_CMPK_LG_U32 : SOPK_SCC <"s_cmpk_lg_u32", "s_cmp_lg_u32", 0>;
766 def S_CMP_LG_U32 : SOPC_CMP_32 <0x07, "s_cmp_lg_u32", COND_NE>;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst486 s_cmp_lg_u32 src0, src1
DAMDGPUAsmGFX8.rst506 s_cmp_lg_u32 src0, src1
DAMDGPUAsmGFX9.rst658 s_cmp_lg_u32 src0, src1
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td336 def S_CMP_LG_U32 : SOPC_CMP_32 <0x00000007, "s_cmp_lg_u32", COND_NE >;