/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | cttz_zero_undef.ll | 16 ; SI: s_ff1_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]] 85 ; SI: s_ff1_i32_b32 s{{[0-9]+}}, s{{[0-9]+}} 97 ; SI: s_ff1_i32_b32 s{{[0-9]+}}, s{{[0-9]+}} 109 ; SI: s_ff1_i32_b32 121 ; SI: s_ff1_i32_b32 s{{[0-9]+}}, s{{[0-9]+}} 122 ; SI: s_ff1_i32_b32 s{{[0-9]+}}, s{{[0-9]+}}
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/external/llvm/test/MC/AMDGPU/ |
D | sop1.s | 115 s_ff1_i32_b32 s1, s2 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | sop1.s | 118 s_ff1_i32_b32 s1, s2 label
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D | gfx7_asm_all.s | 11823 s_ff1_i32_b32 s5, s1 label 11826 s_ff1_i32_b32 s103, s1 label 11829 s_ff1_i32_b32 flat_scratch_lo, s1 label 11832 s_ff1_i32_b32 flat_scratch_hi, s1 label 11835 s_ff1_i32_b32 vcc_lo, s1 label 11838 s_ff1_i32_b32 vcc_hi, s1 label 11841 s_ff1_i32_b32 tba_lo, s1 label 11844 s_ff1_i32_b32 tba_hi, s1 label 11847 s_ff1_i32_b32 tma_lo, s1 label 11850 s_ff1_i32_b32 tma_hi, s1 label [all …]
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D | gfx8_asm_all.s | 12438 s_ff1_i32_b32 s5, s1 label 12441 s_ff1_i32_b32 s101, s1 label 12444 s_ff1_i32_b32 flat_scratch_lo, s1 label 12447 s_ff1_i32_b32 flat_scratch_hi, s1 label 12450 s_ff1_i32_b32 vcc_lo, s1 label 12453 s_ff1_i32_b32 vcc_hi, s1 label 12456 s_ff1_i32_b32 tba_lo, s1 label 12459 s_ff1_i32_b32 tba_hi, s1 label 12462 s_ff1_i32_b32 tma_lo, s1 label 12465 s_ff1_i32_b32 tma_hi, s1 label [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | cttz_zero_undef.ll | 11 ; SI: s_ff1_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop1_vi.txt | 78 # VI: s_ff1_i32_b32 s1, s2 ; encoding: [0x02,0x10,0x81,0xbe]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop1_vi.txt | 87 # VI: s_ff1_i32_b32 s1, s2 ; encoding: [0x02,0x10,0x81,0xbe]
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D | gfx8_dasm_all.txt | 9174 # CHECK: s_ff1_i32_b32 s5, s1 ; encoding: [0x01,0x10,0x85,0xbe] 9177 # CHECK: s_ff1_i32_b32 s101, s1 ; encoding: [0x01,0x10,0xe5,0xbe] 9180 # CHECK: s_ff1_i32_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x10,0xe6,0xbe] 9183 # CHECK: s_ff1_i32_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x10,0xe7,0xbe] 9186 # CHECK: s_ff1_i32_b32 vcc_lo, s1 ; encoding: [0x01,0x10,0xea,0xbe] 9189 # CHECK: s_ff1_i32_b32 vcc_hi, s1 ; encoding: [0x01,0x10,0xeb,0xbe] 9192 # CHECK: s_ff1_i32_b32 tba_lo, s1 ; encoding: [0x01,0x10,0xec,0xbe] 9195 # CHECK: s_ff1_i32_b32 tba_hi, s1 ; encoding: [0x01,0x10,0xed,0xbe] 9198 # CHECK: s_ff1_i32_b32 tma_lo, s1 ; encoding: [0x01,0x10,0xee,0xbe] 9201 # CHECK: s_ff1_i32_b32 tma_hi, s1 ; encoding: [0x01,0x10,0xef,0xbe] [all …]
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D | gfx9_dasm_all.txt | 10119 # CHECK: s_ff1_i32_b32 s5, s1 ; encoding: [0x01,0x10,0x85,0xbe] 10122 # CHECK: s_ff1_i32_b32 s101, s1 ; encoding: [0x01,0x10,0xe5,0xbe] 10125 # CHECK: s_ff1_i32_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x10,0xe6,0xbe] 10128 # CHECK: s_ff1_i32_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x10,0xe7,0xbe] 10131 # CHECK: s_ff1_i32_b32 vcc_lo, s1 ; encoding: [0x01,0x10,0xea,0xbe] 10134 # CHECK: s_ff1_i32_b32 vcc_hi, s1 ; encoding: [0x01,0x10,0xeb,0xbe] 10137 # CHECK: s_ff1_i32_b32 m0, s1 ; encoding: [0x01,0x10,0xfc,0xbe] 10140 # CHECK: s_ff1_i32_b32 exec_lo, s1 ; encoding: [0x01,0x10,0xfe,0xbe] 10143 # CHECK: s_ff1_i32_b32 exec_hi, s1 ; encoding: [0x01,0x10,0xff,0xbe] 10146 # CHECK: s_ff1_i32_b32 s5, s101 ; encoding: [0x65,0x10,0x85,0xbe] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 174 def S_FF1_I32_B32 : SOP1_32 <"s_ff1_i32_b32",
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 387 s_ff1_i32_b32 dst, src0
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D | AMDGPUAsmGFX8.rst | 404 s_ff1_i32_b32 dst, src0
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D | AMDGPUAsmGFX9.rst | 546 s_ff1_i32_b32 dst, src0
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 131 defm S_FF1_I32_B32 : SOP1_32 <sop1<0x13, 0x10>, "s_ff1_i32_b32",
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