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Searched refs:s_lshl_b64 (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dshl.ll212 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}
254 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 64, s{{[0-9]+}}
262 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 1, s{{[0-9]+}}
270 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{[0-9]+}}
278 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -1.0, s{{[0-9]+}}
286 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 0.5, s{{[0-9]+}}
294 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -0.5, s{{[0-9]+}}
302 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 2.0, s{{[0-9]+}}
310 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -2.0, s{{[0-9]+}}
318 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 4.0, s{{[0-9]+}}
[all …]
Drotl.i64.ll5 ; BOTH-DAG: s_lshl_b64
Drotr.i64.ll7 ; BOTH-DAG: s_lshl_b64
Dtrunc.ll36 ; SI: s_lshl_b64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
Dsext-in-reg.ll79 ; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
93 ; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
107 ; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
122 ; SI: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dlshl64-to-32.ll5 ; GCN-NOT: s_lshl_b64
16 ; GCN-NOT: s_lshl_b64
26 ; GCN: s_lshl_b64
37 ; GCN: s_lshl_b64
Dshl.ll303 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}
345 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 64, s{{[0-9]+}}
353 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 1, s{{[0-9]+}}
361 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{[0-9]+}}
369 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -1.0, s{{[0-9]+}}
377 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 0.5, s{{[0-9]+}}
385 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -0.5, s{{[0-9]+}}
393 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 2.0, s{{[0-9]+}}
401 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, -2.0, s{{[0-9]+}}
409 ; SI: s_lshl_b64 s{{\[[0-9]+:[0-9]+\]}}, 4.0, s{{[0-9]+}}
[all …]
Drotl.i64.ll5 ; BOTH-DAG: s_lshl_b64
Drotr.i64.ll7 ; BOTH-DAG: s_lshl_b64
Dtrunc.ll41 ; GCN: s_lshl_b64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
Dsext-in-reg.ll80 ; GCN: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
94 ; GCN: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
108 ; GCN: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
123 ; GCN: s_lshl_b64 [[VAL:s\[[0-9]+:[0-9]+\]]]
Dinsert_vector_elt.ll271 ; VI: s_lshl_b64 s{{\[}}[[MASK_SHIFT_LO:[0-9]+]]:[[MASK_SHIFT_HI:[0-9]+]]{{\]}}, s{{\[}}[[MASK_LO]]…
/external/llvm/test/MC/AMDGPU/
Dsop2.s111 s_lshl_b64 s[2:3], s[4:5], s6 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dsop2.s117 s_lshl_b64 s[2:3], s[4:5], s6 label
Dgfx7_asm_all.s18369 s_lshl_b64 s[10:11], s[2:3], s2 label
18372 s_lshl_b64 s[12:13], s[2:3], s2 label
18375 s_lshl_b64 s[102:103], s[2:3], s2 label
18378 s_lshl_b64 flat_scratch, s[2:3], s2 label
18381 s_lshl_b64 vcc, s[2:3], s2 label
18384 s_lshl_b64 tba, s[2:3], s2 label
18387 s_lshl_b64 tma, s[2:3], s2 label
18390 s_lshl_b64 ttmp[10:11], s[2:3], s2 label
18393 s_lshl_b64 exec, s[2:3], s2 label
18396 s_lshl_b64 s[10:11], s[4:5], s2 label
[all …]
Dgfx8_asm_all.s19041 s_lshl_b64 s[10:11], s[2:3], s2 label
19044 s_lshl_b64 s[12:13], s[2:3], s2 label
19047 s_lshl_b64 s[100:101], s[2:3], s2 label
19050 s_lshl_b64 flat_scratch, s[2:3], s2 label
19053 s_lshl_b64 vcc, s[2:3], s2 label
19056 s_lshl_b64 tba, s[2:3], s2 label
19059 s_lshl_b64 tma, s[2:3], s2 label
19062 s_lshl_b64 ttmp[10:11], s[2:3], s2 label
19065 s_lshl_b64 exec, s[2:3], s2 label
19068 s_lshl_b64 s[10:11], s[4:5], s2 label
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dsop2_vi.txt54 # VI: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8e]
Dgfx8_dasm_all.txt15777 # CHECK: s_lshl_b64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x8a,0x8e]
15780 # CHECK: s_lshl_b64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x8c,0x8e]
15783 # CHECK: s_lshl_b64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0xe4,0x8e]
15786 # CHECK: s_lshl_b64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0xe6,0x8e]
15789 # CHECK: s_lshl_b64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0xea,0x8e]
15792 # CHECK: s_lshl_b64 tba, s[2:3], s2 ; encoding: [0x02,0x02,0xec,0x8e]
15795 # CHECK: s_lshl_b64 tma, s[2:3], s2 ; encoding: [0x02,0x02,0xee,0x8e]
15798 # CHECK: s_lshl_b64 ttmp[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0xfa,0x8e]
15801 # CHECK: s_lshl_b64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0xfe,0x8e]
15804 # CHECK: s_lshl_b64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x8a,0x8e]
[all …]
Dgfx9_dasm_all.txt14826 # CHECK: s_lshl_b64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x8a,0x8e]
14829 # CHECK: s_lshl_b64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x8c,0x8e]
14832 # CHECK: s_lshl_b64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0xe4,0x8e]
14835 # CHECK: s_lshl_b64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0xe6,0x8e]
14838 # CHECK: s_lshl_b64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0xea,0x8e]
14841 # CHECK: s_lshl_b64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0xfe,0x8e]
14844 # CHECK: s_lshl_b64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x8a,0x8e]
14847 # CHECK: s_lshl_b64 s[10:11], s[100:101], s2 ; encoding: [0x64,0x02,0x8a,0x8e]
14850 # CHECK: s_lshl_b64 s[10:11], flat_scratch, s2 ; encoding: [0x66,0x02,0x8a,0x8e]
14853 # CHECK: s_lshl_b64 s[10:11], vcc, s2 ; encoding: [0x6a,0x02,0x8a,0x8e]
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsop2_vi.txt54 # VI: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8e]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td437 def S_LSHL_B64 : SOP2_64_32 <"s_lshl_b64",
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst444 s_lshl_b64 dst, src0, src1
DAMDGPUAsmGFX8.rst462 s_lshl_b64 dst, src0, src1
DAMDGPUAsmGFX9.rst609 s_lshl_b64 dst, src0, src1
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td281 defm S_LSHL_B64 : SOP2_64_32 <sop2<0x1f, 0x1d>, "s_lshl_b64",